sb1250_mac.h revision 1.3
1 /* ********************************************************************* 2 * SB1250 Board Support Package 3 * 4 * MAC constants and macros File: sb1250_mac.h 5 * 6 * This module contains constants and macros for the SB1250's 7 * ethernet controllers. 8 * 9 * SB1250 specification level: User's manual 1/02/02 10 * 11 * Author: Mitch Lichtenberg (mpl (at) broadcom.com) 12 * 13 ********************************************************************* 14 * 15 * Copyright 2000,2001 16 * Broadcom Corporation. All rights reserved. 17 * 18 * This software is furnished under license and may be used and 19 * copied only in accordance with the following terms and 20 * conditions. Subject to these conditions, you may download, 21 * copy, install, use, modify and distribute modified or unmodified 22 * copies of this software in source and/or binary form. No title 23 * or ownership is transferred hereby. 24 * 25 * 1) Any source code used, modified or distributed must reproduce 26 * and retain this copyright notice and list of conditions as 27 * they appear in the source file. 28 * 29 * 2) No right is granted to use any trade name, trademark, or 30 * logo of Broadcom Corporation. Neither the "Broadcom 31 * Corporation" name nor any trademark or logo of Broadcom 32 * Corporation may be used to endorse or promote products 33 * derived from this software without the prior written 34 * permission of Broadcom Corporation. 35 * 36 * 3) THIS SOFTWARE IS PROVIDED "AS-IS" AND ANY EXPRESS OR 37 * IMPLIED WARRANTIES, INCLUDING BUT NOT LIMITED TO, ANY IMPLIED 38 * WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR 39 * PURPOSE, OR NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT 40 * SHALL BROADCOM BE LIABLE FOR ANY DAMAGES WHATSOEVER, AND IN 41 * PARTICULAR, BROADCOM SHALL NOT BE LIABLE FOR DIRECT, INDIRECT, 42 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 43 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 44 * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR 45 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 46 * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR 47 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE), EVEN IF ADVISED OF 48 * THE POSSIBILITY OF SUCH DAMAGE. 49 ********************************************************************* */ 50 51 52 #ifndef _SB1250_MAC_H 53 #define _SB1250_MAC_H 54 55 #include "sb1250_defs.h" 56 57 /* ********************************************************************* 58 * Ethernet MAC Registers 59 ********************************************************************* */ 60 61 /* 62 * MAC Configuration Register (Table 9-13) 63 * Register: MAC_CFG_0 64 * Register: MAC_CFG_1 65 * Register: MAC_CFG_2 66 */ 67 68 69 #define M_MAC_RESERVED0 _SB_MAKEMASK1(0) 70 #define M_MAC_TX_HOLD_SOP_EN _SB_MAKEMASK1(1) 71 #define M_MAC_RETRY_EN _SB_MAKEMASK1(2) 72 #define M_MAC_RET_DRPREQ_EN _SB_MAKEMASK1(3) 73 #define M_MAC_RET_UFL_EN _SB_MAKEMASK1(4) 74 #define M_MAC_BURST_EN _SB_MAKEMASK1(5) 75 76 #define S_MAC_TX_PAUSE _SB_MAKE64(6) 77 #define M_MAC_TX_PAUSE_CNT _SB_MAKEMASK(3,S_MAC_TX_PAUSE) 78 #define V_MAC_TX_PAUSE_CNT(x) _SB_MAKEVALUE(x,S_MAC_TX_PAUSE) 79 80 #define K_MAC_TX_PAUSE_CNT_512 0 81 #define K_MAC_TX_PAUSE_CNT_1K 1 82 #define K_MAC_TX_PAUSE_CNT_2K 2 83 #define K_MAC_TX_PAUSE_CNT_4K 3 84 #define K_MAC_TX_PAUSE_CNT_8K 4 85 #define K_MAC_TX_PAUSE_CNT_16K 5 86 #define K_MAC_TX_PAUSE_CNT_32K 6 87 #define K_MAC_TX_PAUSE_CNT_64K 7 88 89 #define V_MAC_TX_PAUSE_CNT_512 V_MAC_TX_PAUSE_CNT(K_MAC_TX_PAUSE_CNT_512) 90 #define V_MAC_TX_PAUSE_CNT_1K V_MAC_TX_PAUSE_CNT(K_MAC_TX_PAUSE_CNT_1K) 91 #define V_MAC_TX_PAUSE_CNT_2K V_MAC_TX_PAUSE_CNT(K_MAC_TX_PAUSE_CNT_2K) 92 #define V_MAC_TX_PAUSE_CNT_4K V_MAC_TX_PAUSE_CNT(K_MAC_TX_PAUSE_CNT_4K) 93 #define V_MAC_TX_PAUSE_CNT_8K V_MAC_TX_PAUSE_CNT(K_MAC_TX_PAUSE_CNT_8K) 94 #define V_MAC_TX_PAUSE_CNT_16K V_MAC_TX_PAUSE_CNT(K_MAC_TX_PAUSE_CNT_16K) 95 #define V_MAC_TX_PAUSE_CNT_32K V_MAC_TX_PAUSE_CNT(K_MAC_TX_PAUSE_CNT_32K) 96 #define V_MAC_TX_PAUSE_CNT_64K V_MAC_TX_PAUSE_CNT(K_MAC_TX_PAUSE_CNT_64K) 97 98 #define M_MAC_RESERVED1 _SB_MAKEMASK(8,9) 99 100 #define M_MAC_AP_STAT_EN _SB_MAKEMASK1(17) 101 #define M_MAC_RESERVED2 _SB_MAKEMASK1(18) 102 #define M_MAC_DRP_ERRPKT_EN _SB_MAKEMASK1(19) 103 #define M_MAC_DRP_FCSERRPKT_EN _SB_MAKEMASK1(20) 104 #define M_MAC_DRP_CODEERRPKT_EN _SB_MAKEMASK1(21) 105 #define M_MAC_DRP_DRBLERRPKT_EN _SB_MAKEMASK1(22) 106 #define M_MAC_DRP_RNTPKT_EN _SB_MAKEMASK1(23) 107 #define M_MAC_DRP_OSZPKT_EN _SB_MAKEMASK1(24) 108 #define M_MAC_DRP_LENERRPKT_EN _SB_MAKEMASK1(25) 109 110 #define M_MAC_RESERVED3 _SB_MAKEMASK(6,26) 111 112 #define M_MAC_BYPASS_SEL _SB_MAKEMASK1(32) 113 #define M_MAC_HDX_EN _SB_MAKEMASK1(33) 114 115 #define S_MAC_SPEED_SEL _SB_MAKE64(34) 116 #define M_MAC_SPEED_SEL _SB_MAKEMASK(2,S_MAC_SPEED_SEL) 117 #define V_MAC_SPEED_SEL(x) _SB_MAKEVALUE(x,S_MAC_SPEED_SEL) 118 #define G_MAC_SPEED_SEL(x) _SB_GETVALUE(x,S_MAC_SPEED_SEL,M_MAC_SPEED_SEL) 119 120 #define K_MAC_SPEED_SEL_10MBPS 0 121 #define K_MAC_SPEED_SEL_100MBPS 1 122 #define K_MAC_SPEED_SEL_1000MBPS 2 123 #define K_MAC_SPEED_SEL_RESERVED 3 124 125 #define V_MAC_SPEED_SEL_10MBPS V_MAC_SPEED_SEL(K_MAC_SPEED_SEL_10MBPS) 126 #define V_MAC_SPEED_SEL_100MBPS V_MAC_SPEED_SEL(K_MAC_SPEED_SEL_100MBPS) 127 #define V_MAC_SPEED_SEL_1000MBPS V_MAC_SPEED_SEL(K_MAC_SPEED_SEL_1000MBPS) 128 #define V_MAC_SPEED_SEL_RESERVED V_MAC_SPEED_SEL(K_MAC_SPEED_SEL_RESERVED) 129 130 #define M_MAC_TX_CLK_EDGE_SEL _SB_MAKEMASK1(36) 131 #define M_MAC_LOOPBACK_SEL _SB_MAKEMASK1(37) 132 #define M_MAC_FAST_SYNC _SB_MAKEMASK1(38) 133 #define M_MAC_SS_EN _SB_MAKEMASK1(39) 134 135 #define S_MAC_BYPASS_CFG _SB_MAKE64(40) 136 #define M_MAC_BYPASS_CFG _SB_MAKEMASK(2,S_MAC_BYPASS_CFG) 137 #define V_MAC_BYPASS_CFG(x) _SB_MAKEVALUE(x,S_MAC_BYPASS_CFG) 138 #define G_MAC_BYPASS_CFG(x) _SB_GETVALUE(x,S_MAC_BYPASS_CFG,M_MAC_BYPASS_CFG) 139 140 #define K_MAC_BYPASS_GMII 0 141 #define K_MAC_BYPASS_ENCODED 1 142 #define K_MAC_BYPASS_SOP 2 143 #define K_MAC_BYPASS_EOP 3 144 145 #define M_MAC_BYPASS_16 _SB_MAKEMASK1(42) 146 #define M_MAC_BYPASS_FCS_CHK _SB_MAKEMASK1(43) 147 148 #if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) 149 #define M_MAC_RX_CH_SEL_MSB _SB_MAKEMASK1(44) 150 #endif /* 1250 PASS2 || 112x PASS1 */ 151 152 #if SIBYTE_HDR_FEATURE(112x, PASS1) 153 #define M_MAC_SPLIT_CH_SEL _SB_MAKEMASK1(45) 154 #endif /* 112x PASS1 */ 155 156 #define S_MAC_BYPASS_IFG _SB_MAKE64(46) 157 #define M_MAC_BYPASS_IFG _SB_MAKEMASK(8,S_MAC_BYPASS_IFG) 158 #define V_MAC_BYPASS_IFG(x) _SB_MAKEVALUE(x,S_MAC_BYPASS_IFG) 159 #define G_MAC_BYPASS_IFG(x) _SB_GETVALUE(x,S_MAC_BYPASS_IFG,M_MAC_BYPASS_IFG) 160 161 #define K_MAC_FC_CMD_DISABLED 0 162 #define K_MAC_FC_CMD_ENABLED 1 163 #define K_MAC_FC_CMD_ENAB_FALSECARR 2 164 165 #define V_MAC_FC_CMD_DISABLED V_MAC_FC_CMD(K_MAC_FC_CMD_DISABLED) 166 #define V_MAC_FC_CMD_ENABLED V_MAC_FC_CMD(K_MAC_FC_CMD_ENABLED) 167 #define V_MAC_FC_CMD_ENAB_FALSECARR V_MAC_FC_CMD(K_MAC_FC_CMD_ENAB_FALSECARR) 168 169 #define M_MAC_FC_SEL _SB_MAKEMASK1(54) 170 171 #define S_MAC_FC_CMD _SB_MAKE64(55) 172 #define M_MAC_FC_CMD _SB_MAKEMASK(2,S_MAC_FC_CMD) 173 #define V_MAC_FC_CMD(x) _SB_MAKEVALUE(x,S_MAC_FC_CMD) 174 #define G_MAC_FC_CMD(x) _SB_GETVALUE(x,S_MAC_FC_CMD,M_MAC_FC_CMD) 175 176 #define S_MAC_RX_CH_SEL _SB_MAKE64(57) 177 #define M_MAC_RX_CH_SEL _SB_MAKEMASK(7,S_MAC_RX_CH_SEL) 178 #define V_MAC_RX_CH_SEL(x) _SB_MAKEVALUE(x,S_MAC_RX_CH_SEL) 179 #define G_MAC_RX_CH_SEL(x) _SB_GETVALUE(x,S_MAC_RX_CH_SEL,M_MAC_RX_CH_SEL) 180 181 182 /* 183 * MAC Enable Registers 184 * Register: MAC_ENABLE_0 185 * Register: MAC_ENABLE_1 186 * Register: MAC_ENABLE_2 187 */ 188 189 #define M_MAC_RXDMA_EN0 _SB_MAKEMASK1(0) 190 #define M_MAC_RXDMA_EN1 _SB_MAKEMASK1(1) 191 #define M_MAC_TXDMA_EN0 _SB_MAKEMASK1(4) 192 #define M_MAC_TXDMA_EN1 _SB_MAKEMASK1(5) 193 194 #define M_MAC_PORT_RESET _SB_MAKEMASK1(8) 195 196 #define M_MAC_RX_ENABLE _SB_MAKEMASK1(10) 197 #define M_MAC_TX_ENABLE _SB_MAKEMASK1(11) 198 #define M_MAC_BYP_RX_ENABLE _SB_MAKEMASK1(12) 199 #define M_MAC_BYP_TX_ENABLE _SB_MAKEMASK1(13) 200 201 /* 202 * MAC DMA Control Register 203 * Register: MAC_TXD_CTL_0 204 * Register: MAC_TXD_CTL_1 205 * Register: MAC_TXD_CTL_2 206 */ 207 208 #define S_MAC_TXD_WEIGHT0 _SB_MAKE64(0) 209 #define M_MAC_TXD_WEIGHT0 _SB_MAKEMASK(4,S_MAC_TXD_WEIGHT0) 210 #define V_MAC_TXD_WEIGHT0(x) _SB_MAKEVALUE(x,S_MAC_TXD_WEIGHT0) 211 #define G_MAC_TXD_WEIGHT0(x) _SB_GETVALUE(x,S_MAC_TXD_WEIGHT0,M_MAC_TXD_WEIGHT0) 212 213 #define S_MAC_TXD_WEIGHT1 _SB_MAKE64(4) 214 #define M_MAC_TXD_WEIGHT1 _SB_MAKEMASK(4,S_MAC_TXD_WEIGHT1) 215 #define V_MAC_TXD_WEIGHT1(x) _SB_MAKEVALUE(x,S_MAC_TXD_WEIGHT1) 216 #define G_MAC_TXD_WEIGHT1(x) _SB_GETVALUE(x,S_MAC_TXD_WEIGHT1,M_MAC_TXD_WEIGHT1) 217 218 /* 219 * MAC Fifo Threshhold registers (Table 9-14) 220 * Register: MAC_THRSH_CFG_0 221 * Register: MAC_THRSH_CFG_1 222 * Register: MAC_THRSH_CFG_2 223 */ 224 225 #define S_MAC_TX_WR_THRSH _SB_MAKE64(0) 226 #if SIBYTE_HDR_FEATURE_UP_TO(1250, PASS1) 227 /* XXX: Can't enable, as it has the same name as a pass2+ define below. */ 228 /* #define M_MAC_TX_WR_THRSH _SB_MAKEMASK(6,S_MAC_TX_WR_THRSH) */ 229 #endif /* up to 1250 PASS1 */ 230 #if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) 231 #define M_MAC_TX_WR_THRSH _SB_MAKEMASK(7,S_MAC_TX_WR_THRSH) 232 #endif /* 1250 PASS2 || 112x PASS1 */ 233 #define V_MAC_TX_WR_THRSH(x) _SB_MAKEVALUE(x,S_MAC_TX_WR_THRSH) 234 #define G_MAC_TX_WR_THRSH(x) _SB_GETVALUE(x,S_MAC_TX_WR_THRSH,M_MAC_TX_WR_THRSH) 235 236 #define S_MAC_TX_RD_THRSH _SB_MAKE64(8) 237 #if SIBYTE_HDR_FEATURE_UP_TO(1250, PASS1) 238 /* XXX: Can't enable, as it has the same name as a pass2+ define below. */ 239 /* #define M_MAC_TX_RD_THRSH _SB_MAKEMASK(6,S_MAC_TX_RD_THRSH) */ 240 #endif /* up to 1250 PASS1 */ 241 #if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) 242 #define M_MAC_TX_RD_THRSH _SB_MAKEMASK(7,S_MAC_TX_RD_THRSH) 243 #endif /* 1250 PASS2 || 112x PASS1 */ 244 #define V_MAC_TX_RD_THRSH(x) _SB_MAKEVALUE(x,S_MAC_TX_RD_THRSH) 245 #define G_MAC_TX_RD_THRSH(x) _SB_GETVALUE(x,S_MAC_TX_RD_THRSH,M_MAC_TX_RD_THRSH) 246 247 #define S_MAC_TX_RL_THRSH _SB_MAKE64(16) 248 #define M_MAC_TX_RL_THRSH _SB_MAKEMASK(4,S_MAC_TX_RL_THRSH) 249 #define V_MAC_TX_RL_THRSH(x) _SB_MAKEVALUE(x,S_MAC_TX_RL_THRSH) 250 #define G_MAC_TX_RL_THRSH(x) _SB_GETVALUE(x,S_MAC_TX_RL_THRSH,M_MAC_TX_RL_THRSH) 251 252 #define S_MAC_RX_PL_THRSH _SB_MAKE64(24) 253 #define M_MAC_RX_PL_THRSH _SB_MAKEMASK(6,S_MAC_RX_PL_THRSH) 254 #define V_MAC_RX_PL_THRSH(x) _SB_MAKEVALUE(x,S_MAC_RX_PL_THRSH) 255 #define G_MAC_RX_PL_THRSH(x) _SB_GETVALUE(x,S_MAC_RX_PL_THRSH,M_MAC_RX_PL_THRSH) 256 257 #define S_MAC_RX_RD_THRSH _SB_MAKE64(32) 258 #define M_MAC_RX_RD_THRSH _SB_MAKEMASK(6,S_MAC_RX_RD_THRSH) 259 #define V_MAC_RX_RD_THRSH(x) _SB_MAKEVALUE(x,S_MAC_RX_RD_THRSH) 260 #define G_MAC_RX_RD_THRSH(x) _SB_GETVALUE(x,S_MAC_RX_RD_THRSH,M_MAC_RX_RD_THRSH) 261 262 #define S_MAC_RX_RL_THRSH _SB_MAKE64(40) 263 #define M_MAC_RX_RL_THRSH _SB_MAKEMASK(6,S_MAC_RX_RL_THRSH) 264 #define V_MAC_RX_RL_THRSH(x) _SB_MAKEVALUE(x,S_MAC_RX_RL_THRSH) 265 #define G_MAC_RX_RL_THRSH(x) _SB_GETVALUE(x,S_MAC_RX_RL_THRSH,M_MAC_RX_RL_THRSH) 266 267 #if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) 268 #define S_MAC_ENC_FC_THRSH _SB_MAKE64(56) 269 #define M_MAC_ENC_FC_THRSH _SB_MAKEMASK(6,S_MAC_ENC_FC_THRSH) 270 #define V_MAC_ENC_FC_THRSH(x) _SB_MAKEVALUE(x,S_MAC_ENC_FC_THRSH) 271 #define G_MAC_ENC_FC_THRSH(x) _SB_GETVALUE(x,S_MAC_ENC_FC_THRSH,M_MAC_ENC_FC_THRSH) 272 #endif /* 1250 PASS2 || 112x PASS1 */ 273 274 /* 275 * MAC Frame Configuration Registers (Table 9-15) 276 * Register: MAC_FRAME_CFG_0 277 * Register: MAC_FRAME_CFG_1 278 * Register: MAC_FRAME_CFG_2 279 */ 280 281 /* XXXCGD: ??? Unused in pass2? */ 282 #define S_MAC_IFG_RX _SB_MAKE64(0) 283 #define M_MAC_IFG_RX _SB_MAKEMASK(6,S_MAC_IFG_RX) 284 #define V_MAC_IFG_RX(x) _SB_MAKEVALUE(x,S_MAC_IFG_RX) 285 #define G_MAC_IFG_RX(x) _SB_GETVALUE(x,S_MAC_IFG_RX,M_MAC_IFG_RX) 286 287 #if SIBYTE_HDR_FEATURE(112x, PASS1) 288 #define S_MAC_PRE_LEN _SB_MAKE64(0) 289 #define M_MAC_PRE_LEN _SB_MAKEMASK(6,S_MAC_PRE_LEN) 290 #define V_MAC_PRE_LEN(x) _SB_MAKEVALUE(x,S_MAC_PRE_LEN) 291 #define G_MAC_PRE_LEN(x) _SB_GETVALUE(x,S_MAC_PRE_LEN,M_MAC_PRE_LEN) 292 #endif /* 112x PASS1 */ 293 294 #define S_MAC_IFG_TX _SB_MAKE64(6) 295 #define M_MAC_IFG_TX _SB_MAKEMASK(6,S_MAC_IFG_TX) 296 #define V_MAC_IFG_TX(x) _SB_MAKEVALUE(x,S_MAC_IFG_TX) 297 #define G_MAC_IFG_TX(x) _SB_GETVALUE(x,S_MAC_IFG_TX,M_MAC_IFG_TX) 298 299 #define S_MAC_IFG_THRSH _SB_MAKE64(12) 300 #define M_MAC_IFG_THRSH _SB_MAKEMASK(6,S_MAC_IFG_THRSH) 301 #define V_MAC_IFG_THRSH(x) _SB_MAKEVALUE(x,S_MAC_IFG_THRSH) 302 #define G_MAC_IFG_THRSH(x) _SB_GETVALUE(x,S_MAC_IFG_THRSH,M_MAC_IFG_THRSH) 303 304 #define S_MAC_BACKOFF_SEL _SB_MAKE64(18) 305 #define M_MAC_BACKOFF_SEL _SB_MAKEMASK(4,S_MAC_BACKOFF_SEL) 306 #define V_MAC_BACKOFF_SEL(x) _SB_MAKEVALUE(x,S_MAC_BACKOFF_SEL) 307 #define G_MAC_BACKOFF_SEL(x) _SB_GETVALUE(x,S_MAC_BACKOFF_SEL,M_MAC_BACKOFF_SEL) 308 309 #define S_MAC_LFSR_SEED _SB_MAKE64(22) 310 #define M_MAC_LFSR_SEED _SB_MAKEMASK(8,S_MAC_LFSR_SEED) 311 #define V_MAC_LFSR_SEED(x) _SB_MAKEVALUE(x,S_MAC_LFSR_SEED) 312 #define G_MAC_LFSR_SEED(x) _SB_GETVALUE(x,S_MAC_LFSR_SEED,M_MAC_LFSR_SEED) 313 314 #define S_MAC_SLOT_SIZE _SB_MAKE64(30) 315 #define M_MAC_SLOT_SIZE _SB_MAKEMASK(10,S_MAC_SLOT_SIZE) 316 #define V_MAC_SLOT_SIZE(x) _SB_MAKEVALUE(x,S_MAC_SLOT_SIZE) 317 #define G_MAC_SLOT_SIZE(x) _SB_GETVALUE(x,S_MAC_SLOT_SIZE,M_MAC_SLOT_SIZE) 318 319 #define S_MAC_MIN_FRAMESZ _SB_MAKE64(40) 320 #define M_MAC_MIN_FRAMESZ _SB_MAKEMASK(8,S_MAC_MIN_FRAMESZ) 321 #define V_MAC_MIN_FRAMESZ(x) _SB_MAKEVALUE(x,S_MAC_MIN_FRAMESZ) 322 #define G_MAC_MIN_FRAMESZ(x) _SB_GETVALUE(x,S_MAC_MIN_FRAMESZ,M_MAC_MIN_FRAMESZ) 323 324 #define S_MAC_MAX_FRAMESZ _SB_MAKE64(48) 325 #define M_MAC_MAX_FRAMESZ _SB_MAKEMASK(16,S_MAC_MAX_FRAMESZ) 326 #define V_MAC_MAX_FRAMESZ(x) _SB_MAKEVALUE(x,S_MAC_MAX_FRAMESZ) 327 #define G_MAC_MAX_FRAMESZ(x) _SB_GETVALUE(x,S_MAC_MAX_FRAMESZ,M_MAC_MAX_FRAMESZ) 328 329 /* 330 * These constants are used to configure the fields within the Frame 331 * Configuration Register. 332 */ 333 334 #define K_MAC_IFG_RX_10 _SB_MAKE64(0) /* See table 176, not used */ 335 #define K_MAC_IFG_RX_100 _SB_MAKE64(0) 336 #define K_MAC_IFG_RX_1000 _SB_MAKE64(0) 337 338 #define K_MAC_IFG_TX_10 _SB_MAKE64(20) 339 #define K_MAC_IFG_TX_100 _SB_MAKE64(20) 340 #define K_MAC_IFG_TX_1000 _SB_MAKE64(8) 341 342 #define K_MAC_IFG_THRSH_10 _SB_MAKE64(4) 343 #define K_MAC_IFG_THRSH_100 _SB_MAKE64(4) 344 #define K_MAC_IFG_THRSH_1000 _SB_MAKE64(0) 345 346 #define K_MAC_SLOT_SIZE_10 _SB_MAKE64(0) 347 #define K_MAC_SLOT_SIZE_100 _SB_MAKE64(0) 348 #define K_MAC_SLOT_SIZE_1000 _SB_MAKE64(0) 349 350 #define V_MAC_IFG_RX_10 V_MAC_IFG_RX(K_MAC_IFG_RX_10) 351 #define V_MAC_IFG_RX_100 V_MAC_IFG_RX(K_MAC_IFG_RX_100) 352 #define V_MAC_IFG_RX_1000 V_MAC_IFG_RX(K_MAC_IFG_RX_1000) 353 354 #define V_MAC_IFG_TX_10 V_MAC_IFG_TX(K_MAC_IFG_TX_10) 355 #define V_MAC_IFG_TX_100 V_MAC_IFG_TX(K_MAC_IFG_TX_100) 356 #define V_MAC_IFG_TX_1000 V_MAC_IFG_TX(K_MAC_IFG_TX_1000) 357 358 #define V_MAC_IFG_THRSH_10 V_MAC_IFG_THRSH(K_MAC_IFG_THRSH_10) 359 #define V_MAC_IFG_THRSH_100 V_MAC_IFG_THRSH(K_MAC_IFG_THRSH_100) 360 #define V_MAC_IFG_THRSH_1000 V_MAC_IFG_THRSH(K_MAC_IFG_THRSH_1000) 361 362 #define V_MAC_SLOT_SIZE_10 V_MAC_SLOT_SIZE(K_MAC_SLOT_SIZE_10) 363 #define V_MAC_SLOT_SIZE_100 V_MAC_SLOT_SIZE(K_MAC_SLOT_SIZE_100) 364 #define V_MAC_SLOT_SIZE_1000 V_MAC_SLOT_SIZE(K_MAC_SLOT_SIZE_1000) 365 366 #define K_MAC_MIN_FRAMESZ_FIFO _SB_MAKE64(9) 367 #define K_MAC_MIN_FRAMESZ_DEFAULT _SB_MAKE64(64) 368 #define K_MAC_MAX_FRAMESZ_DEFAULT _SB_MAKE64(1518) 369 #define K_MAC_MAX_FRAMESZ_JUMBO _SB_MAKE64(9216) 370 371 #define V_MAC_MIN_FRAMESZ_FIFO V_MAC_MIN_FRAMESZ(K_MAC_MIN_FRAMESZ_FIFO) 372 #define V_MAC_MIN_FRAMESZ_DEFAULT V_MAC_MIN_FRAMESZ(K_MAC_MIN_FRAMESZ_DEFAULT) 373 #define V_MAC_MAX_FRAMESZ_DEFAULT V_MAC_MAX_FRAMESZ(K_MAC_MAX_FRAMESZ_DEFAULT) 374 #define V_MAC_MAX_FRAMESZ_JUMBO V_MAC_MAX_FRAMESZ(K_MAC_MAX_FRAMESZ_JUMBO) 375 376 /* 377 * MAC VLAN Tag Registers (Table 9-16) 378 * Register: MAC_VLANTAG_0 379 * Register: MAC_VLANTAG_1 380 * Register: MAC_VLANTAG_2 381 */ 382 383 #define S_MAC_VLAN_TAG _SB_MAKE64(0) 384 #define M_MAC_VLAN_TAG _SB_MAKEMASK(32,S_MAC_VLAN_TAG) 385 #define V_MAC_VLAN_TAG(x) _SB_MAKEVALUE(x,S_MAC_VLAN_TAG) 386 #define G_MAC_VLAN_TAG(x) _SB_GETVALUE(x,S_MAC_VLAN_TAG,M_MAC_VLAN_TAG) 387 388 #if SIBYTE_HDR_FEATURE(112x, PASS1) 389 #define S_MAC_TX_PKT_OFFSET _SB_MAKE64(32) 390 #define M_MAC_TX_PKT_OFFSET _SB_MAKEMASK(8,S_MAC_TX_PKT_OFFSET) 391 #define V_MAC_TX_PKT_OFFSET(x) _SB_MAKEVALUE(x,S_MAC_TX_PKT_OFFSET) 392 #define G_MAC_TX_PKT_OFFSET(x) _SB_GETVALUE(x,S_MAC_TX_PKT_OFFSET,M_MAC_TX_PKT_OFFSET) 393 394 #define S_MAC_TX_CRC_OFFSET _SB_MAKE64(40) 395 #define M_MAC_TX_CRC_OFFSET _SB_MAKEMASK(8,S_MAC_TX_CRC_OFFSET) 396 #define V_MAC_TX_CRC_OFFSET(x) _SB_MAKEVALUE(x,S_MAC_TX_CRC_OFFSET) 397 #define G_MAC_TX_CRC_OFFSET(x) _SB_GETVALUE(x,S_MAC_TX_CRC_OFFSET,M_MAC_TX_CRC_OFFSET) 398 399 #define M_MAC_CH_BASE_FC_EN _SB_MAKEMASK1(48) 400 #endif /* 112x PASS1 */ 401 402 /* 403 * MAC Status Registers (Table 9-17) 404 * Also used for the MAC Interrupt Mask Register (Table 9-18) 405 * Register: MAC_STATUS_0 406 * Register: MAC_STATUS_1 407 * Register: MAC_STATUS_2 408 * Register: MAC_INT_MASK_0 409 * Register: MAC_INT_MASK_1 410 * Register: MAC_INT_MASK_2 411 */ 412 413 /* 414 * Use these constants to shift the appropriate channel 415 * into the CH0 position so the same tests can be used 416 * on each channel. 417 */ 418 419 #define S_MAC_RX_CH0 _SB_MAKE64(0) 420 #define S_MAC_RX_CH1 _SB_MAKE64(8) 421 #define S_MAC_TX_CH0 _SB_MAKE64(16) 422 #define S_MAC_TX_CH1 _SB_MAKE64(24) 423 424 #define S_MAC_TXCHANNELS _SB_MAKE64(16) /* this is 1st TX chan */ 425 #define S_MAC_CHANWIDTH _SB_MAKE64(8) /* bits between channels */ 426 427 /* 428 * These are the same as RX channel 0. The idea here 429 * is that you'll use one of the "S_" things above 430 * and pass just the six bits to a DMA-channel-specific ISR 431 */ 432 #define M_MAC_INT_CHANNEL _SB_MAKEMASK(8,0) 433 #define M_MAC_INT_EOP_COUNT _SB_MAKEMASK1(0) 434 #define M_MAC_INT_EOP_TIMER _SB_MAKEMASK1(1) 435 #define M_MAC_INT_EOP_SEEN _SB_MAKEMASK1(2) 436 #define M_MAC_INT_HWM _SB_MAKEMASK1(3) 437 #define M_MAC_INT_LWM _SB_MAKEMASK1(4) 438 #define M_MAC_INT_DSCR _SB_MAKEMASK1(5) 439 #define M_MAC_INT_ERR _SB_MAKEMASK1(6) 440 #define M_MAC_INT_DZERO _SB_MAKEMASK1(7) /* only for TX channels */ 441 #define M_MAC_INT_DROP _SB_MAKEMASK1(7) /* only for RX channels */ 442 443 /* 444 * In the following definitions we use ch (0/1) and txrx (TX=1, RX=0, see 445 * also DMA_TX/DMA_RX in sb_regs.h). 446 */ 447 #define S_MAC_STATUS_CH_OFFSET(ch,txrx) _SB_MAKE64(((ch) + 2 * (txrx)) * S_MAC_CHANWIDTH) 448 449 #define M_MAC_STATUS_CHANNEL(ch,txrx) _SB_MAKEVALUE(_SB_MAKEMASK(8,0),S_MAC_STATUS_CH_OFFSET(ch,txrx)) 450 #define M_MAC_STATUS_EOP_COUNT(ch,txrx) _SB_MAKEVALUE(M_MAC_INT_EOP_COUNT,S_MAC_STATUS_CH_OFFSET(ch,txrx)) 451 #define M_MAC_STATUS_EOP_TIMER(ch,txrx) _SB_MAKEVALUE(M_MAC_INT_EOP_TIMER,S_MAC_STATUS_CH_OFFSET(ch,txrx)) 452 #define M_MAC_STATUS_EOP_SEEN(ch,txrx) _SB_MAKEVALUE(M_MAC_INT_EOP_SEEN,S_MAC_STATUS_CH_OFFSET(ch,txrx)) 453 #define M_MAC_STATUS_HWM(ch,txrx) _SB_MAKEVALUE(M_MAC_INT_HWM,S_MAC_STATUS_CH_OFFSET(ch,txrx)) 454 #define M_MAC_STATUS_LWM(ch,txrx) _SB_MAKEVALUE(M_MAC_INT_LWM,S_MAC_STATUS_CH_OFFSET(ch,txrx)) 455 #define M_MAC_STATUS_DSCR(ch,txrx) _SB_MAKEVALUE(M_MAC_INT_DSCR,S_MAC_STATUS_CH_OFFSET(ch,txrx)) 456 #define M_MAC_STATUS_ERR(ch,txrx) _SB_MAKEVALUE(M_MAC_INT_ERR,S_MAC_STATUS_CH_OFFSET(ch,txrx)) 457 #define M_MAC_STATUS_DZERO(ch,txrx) _SB_MAKEVALUE(M_MAC_INT_DZERO,S_MAC_STATUS_CH_OFFSET(ch,txrx)) 458 #define M_MAC_STATUS_DROP(ch,txrx) _SB_MAKEVALUE(M_MAC_INT_DROP,S_MAC_STATUS_CH_OFFSET(ch,txrx)) 459 #define M_MAC_STATUS_OTHER_ERR _SB_MAKEVALUE(_SB_MAKEMASK(7,0),40) 460 461 462 #define M_MAC_RX_UNDRFL _SB_MAKEMASK1(40) 463 #define M_MAC_RX_OVRFL _SB_MAKEMASK1(41) 464 #define M_MAC_TX_UNDRFL _SB_MAKEMASK1(42) 465 #define M_MAC_TX_OVRFL _SB_MAKEMASK1(43) 466 #define M_MAC_LTCOL_ERR _SB_MAKEMASK1(44) 467 #define M_MAC_EXCOL_ERR _SB_MAKEMASK1(45) 468 #define M_MAC_CNTR_OVRFL_ERR _SB_MAKEMASK1(46) 469 #if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) 470 #define M_MAC_SPLIT_EN _SB_MAKEMASK1(47) /* interrupt mask only */ 471 #endif /* 1250 PASS2 || 112x PASS1 */ 472 473 #define S_MAC_COUNTER_ADDR _SB_MAKE64(47) 474 #define M_MAC_COUNTER_ADDR _SB_MAKEMASK(5,S_MAC_COUNTER_ADDR) 475 #define V_MAC_COUNTER_ADDR(x) _SB_MAKEVALUE(x,S_MAC_COUNTER_ADDR) 476 #define G_MAC_COUNTER_ADDR(x) _SB_GETVALUE(x,S_MAC_COUNTER_ADDR,M_MAC_COUNTER_ADDR) 477 478 #if SIBYTE_HDR_FEATURE(112x, PASS1) 479 #define M_MAC_TX_PAUSE_ON _SB_MAKEMASK1(52) 480 #endif /* 112x PASS1 */ 481 482 /* 483 * MAC Fifo Pointer Registers (Table 9-19) [Debug register] 484 * Register: MAC_FIFO_PTRS_0 485 * Register: MAC_FIFO_PTRS_1 486 * Register: MAC_FIFO_PTRS_2 487 */ 488 489 #define S_MAC_TX_WRPTR _SB_MAKE64(0) 490 #define M_MAC_TX_WRPTR _SB_MAKEMASK(6,S_MAC_TX_WRPTR) 491 #define V_MAC_TX_WRPTR(x) _SB_MAKEVALUE(x,S_MAC_TX_WRPTR) 492 #define G_MAC_TX_WRPTR(x) _SB_GETVALUE(x,S_MAC_TX_WRPTR,M_MAC_TX_WRPTR) 493 494 #define S_MAC_TX_RDPTR _SB_MAKE64(8) 495 #define M_MAC_TX_RDPTR _SB_MAKEMASK(6,S_MAC_TX_RDPTR) 496 #define V_MAC_TX_RDPTR(x) _SB_MAKEVALUE(x,S_MAC_TX_RDPTR) 497 #define G_MAC_TX_RDPTR(x) _SB_GETVALUE(x,S_MAC_TX_RDPTR,M_MAC_TX_RDPTR) 498 499 #define S_MAC_RX_WRPTR _SB_MAKE64(16) 500 #define M_MAC_RX_WRPTR _SB_MAKEMASK(6,S_MAC_RX_WRPTR) 501 #define V_MAC_RX_WRPTR(x) _SB_MAKEVALUE(x,S_MAC_RX_WRPTR) 502 #define G_MAC_RX_WRPTR(x) _SB_GETVALUE(x,S_MAC_RX_WRPTR,M_MAC_TX_WRPTR) 503 504 #define S_MAC_RX_RDPTR _SB_MAKE64(24) 505 #define M_MAC_RX_RDPTR _SB_MAKEMASK(6,S_MAC_RX_RDPTR) 506 #define V_MAC_RX_RDPTR(x) _SB_MAKEVALUE(x,S_MAC_RX_RDPTR) 507 #define G_MAC_RX_RDPTR(x) _SB_GETVALUE(x,S_MAC_RX_RDPTR,M_MAC_TX_RDPTR) 508 509 /* 510 * MAC Fifo End Of Packet Count Registers (Table 9-20) [Debug register] 511 * Register: MAC_EOPCNT_0 512 * Register: MAC_EOPCNT_1 513 * Register: MAC_EOPCNT_2 514 */ 515 516 #define S_MAC_TX_EOP_COUNTER _SB_MAKE64(0) 517 #define M_MAC_TX_EOP_COUNTER _SB_MAKEMASK(6,S_MAC_TX_EOP_COUNTER) 518 #define V_MAC_TX_EOP_COUNTER(x) _SB_MAKEVALUE(x,S_MAC_TX_EOP_COUNTER) 519 #define G_MAC_TX_EOP_COUNTER(x) _SB_GETVALUE(x,S_MAC_TX_EOP_COUNTER,M_MAC_TX_EOP_COUNTER) 520 521 #define S_MAC_RX_EOP_COUNTER _SB_MAKE64(8) 522 #define M_MAC_RX_EOP_COUNTER _SB_MAKEMASK(6,S_MAC_RX_EOP_COUNTER) 523 #define V_MAC_RX_EOP_COUNTER(x) _SB_MAKEVALUE(x,S_MAC_RX_EOP_COUNTER) 524 #define G_MAC_RX_EOP_COUNTER(x) _SB_GETVALUE(x,S_MAC_RX_EOP_COUNTER,M_MAC_RX_EOP_COUNTER) 525 526 /* 527 * MAC Recieve Address Filter Exact Match Registers (Table 9-21) 528 * Registers: MAC_ADDR0_0 through MAC_ADDR7_0 529 * Registers: MAC_ADDR0_1 through MAC_ADDR7_1 530 * Registers: MAC_ADDR0_2 through MAC_ADDR7_2 531 */ 532 533 /* No bitfields */ 534 535 /* 536 * MAC Receive Address Filter Mask Registers 537 * Registers: MAC_ADDRMASK0_0 and MAC_ADDRMASK0_1 538 * Registers: MAC_ADDRMASK1_0 and MAC_ADDRMASK1_1 539 * Registers: MAC_ADDRMASK2_0 and MAC_ADDRMASK2_1 540 */ 541 542 /* No bitfields */ 543 544 /* 545 * MAC Recieve Address Filter Hash Match Registers (Table 9-22) 546 * Registers: MAC_HASH0_0 through MAC_HASH7_0 547 * Registers: MAC_HASH0_1 through MAC_HASH7_1 548 * Registers: MAC_HASH0_2 through MAC_HASH7_2 549 */ 550 551 /* No bitfields */ 552 553 /* 554 * MAC Transmit Source Address Registers (Table 9-23) 555 * Register: MAC_ETHERNET_ADDR_0 556 * Register: MAC_ETHERNET_ADDR_1 557 * Register: MAC_ETHERNET_ADDR_2 558 */ 559 560 /* No bitfields */ 561 562 /* 563 * MAC Packet Type Configuration Register 564 * Register: MAC_TYPE_CFG_0 565 * Register: MAC_TYPE_CFG_1 566 * Register: MAC_TYPE_CFG_2 567 */ 568 569 #define S_TYPECFG_TYPESIZE _SB_MAKE64(16) 570 571 #define S_TYPECFG_TYPE0 _SB_MAKE64(0) 572 #define M_TYPECFG_TYPE0 _SB_MAKEMASK(16,S_TYPECFG_TYPE0) 573 #define V_TYPECFG_TYPE0(x) _SB_MAKEVALUE(x,S_TYPECFG_TYPE0) 574 #define G_TYPECFG_TYPE0(x) _SB_GETVALUE(x,S_TYPECFG_TYPE0,M_TYPECFG_TYPE0) 575 576 #define S_TYPECFG_TYPE1 _SB_MAKE64(0) 577 #define M_TYPECFG_TYPE1 _SB_MAKEMASK(16,S_TYPECFG_TYPE1) 578 #define V_TYPECFG_TYPE1(x) _SB_MAKEVALUE(x,S_TYPECFG_TYPE1) 579 #define G_TYPECFG_TYPE1(x) _SB_GETVALUE(x,S_TYPECFG_TYPE1,M_TYPECFG_TYPE1) 580 581 #define S_TYPECFG_TYPE2 _SB_MAKE64(0) 582 #define M_TYPECFG_TYPE2 _SB_MAKEMASK(16,S_TYPECFG_TYPE2) 583 #define V_TYPECFG_TYPE2(x) _SB_MAKEVALUE(x,S_TYPECFG_TYPE2) 584 #define G_TYPECFG_TYPE2(x) _SB_GETVALUE(x,S_TYPECFG_TYPE2,M_TYPECFG_TYPE2) 585 586 #define S_TYPECFG_TYPE3 _SB_MAKE64(0) 587 #define M_TYPECFG_TYPE3 _SB_MAKEMASK(16,S_TYPECFG_TYPE3) 588 #define V_TYPECFG_TYPE3(x) _SB_MAKEVALUE(x,S_TYPECFG_TYPE3) 589 #define G_TYPECFG_TYPE3(x) _SB_GETVALUE(x,S_TYPECFG_TYPE3,M_TYPECFG_TYPE3) 590 591 /* 592 * MAC Receive Address Filter Control Registers (Table 9-24) 593 * Register: MAC_ADFILTER_CFG_0 594 * Register: MAC_ADFILTER_CFG_1 595 * Register: MAC_ADFILTER_CFG_2 596 */ 597 598 #define M_MAC_ALLPKT_EN _SB_MAKEMASK1(0) 599 #define M_MAC_UCAST_EN _SB_MAKEMASK1(1) 600 #define M_MAC_UCAST_INV _SB_MAKEMASK1(2) 601 #define M_MAC_MCAST_EN _SB_MAKEMASK1(3) 602 #define M_MAC_MCAST_INV _SB_MAKEMASK1(4) 603 #define M_MAC_BCAST_EN _SB_MAKEMASK1(5) 604 #define M_MAC_DIRECT_INV _SB_MAKEMASK1(6) 605 #if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) 606 #define M_MAC_ALLMCAST_EN _SB_MAKEMASK1(7) 607 #endif /* 1250 PASS2 || 112x PASS1 */ 608 609 #define S_MAC_IPHDR_OFFSET _SB_MAKE64(8) 610 #define M_MAC_IPHDR_OFFSET _SB_MAKEMASK(8,S_MAC_IPHDR_OFFSET) 611 #define V_MAC_IPHDR_OFFSET(x) _SB_MAKEVALUE(x,S_MAC_IPHDR_OFFSET) 612 #define G_MAC_IPHDR_OFFSET(x) _SB_GETVALUE(x,S_MAC_IPHDR_OFFSET,M_MAC_IPHDR_OFFSET) 613 614 #if SIBYTE_HDR_FEATURE(112x, PASS1) 615 #define S_MAC_RX_CRC_OFFSET _SB_MAKE64(16) 616 #define M_MAC_RX_CRC_OFFSET _SB_MAKEMASK(8,S_MAC_RX_CRC_OFFSET) 617 #define V_MAC_RX_CRC_OFFSET(x) _SB_MAKEVALUE(x,S_MAC_RX_CRC_OFFSET) 618 #define G_MAC_RX_CRC_OFFSET(x) _SB_GETVALUE(x,S_MAC_RX_CRC_OFFSET,M_MAC_RX_CRC_OFFSET) 619 620 #define S_MAC_RX_PKT_OFFSET _SB_MAKE64(24) 621 #define M_MAC_RX_PKT_OFFSET _SB_MAKEMASK(8,S_MAC_RX_PKT_OFFSET) 622 #define V_MAC_RX_PKT_OFFSET(x) _SB_MAKEVALUE(x,S_MAC_RX_PKT_OFFSET) 623 #define G_MAC_RX_PKT_OFFSET(x) _SB_GETVALUE(x,S_MAC_RX_PKT_OFFSET,M_MAC_RX_PKT_OFFSET) 624 625 #define M_MAC_FWDPAUSE_EN _SB_MAKEMASK1(32) 626 #define M_MAC_VLAN_DET_EN _SB_MAKEMASK1(33) 627 628 #define S_MAC_RX_CH_MSN_SEL _SB_MAKE64(34) 629 #define M_MAC_RX_CH_MSN_SEL _SB_MAKEMASK(8,S_MAC_RX_CH_MSN_SEL) 630 #define V_MAC_RX_CH_MSN_SEL(x) _SB_MAKEVALUE(x,S_MAC_RX_CH_MSN_SEL) 631 #define G_MAC_RX_CH_MSN_SEL(x) _SB_GETVALUE(x,S_MAC_RX_CH_MSN_SEL,M_MAC_RX_CH_MSN_SEL) 632 #endif /* 112x PASS1 */ 633 634 /* 635 * MAC Receive Channel Select Registers (Table 9-25) 636 */ 637 638 /* no bitfields */ 639 640 /* 641 * MAC MII Management Interface Registers (Table 9-26) 642 * Register: MAC_MDIO_0 643 * Register: MAC_MDIO_1 644 * Register: MAC_MDIO_2 645 */ 646 647 #define S_MAC_MDC 0 648 #define S_MAC_MDIO_DIR 1 649 #define S_MAC_MDIO_OUT 2 650 #define S_MAC_GENC 3 651 #define S_MAC_MDIO_IN 4 652 653 #define M_MAC_MDC _SB_MAKEMASK1(S_MAC_MDC) 654 #define M_MAC_MDIO_DIR _SB_MAKEMASK1(S_MAC_MDIO_DIR) 655 #define M_MAC_MDIO_DIR_INPUT _SB_MAKEMASK1(S_MAC_MDIO_DIR) 656 #define M_MAC_MDIO_OUT _SB_MAKEMASK1(S_MAC_MDIO_OUT) 657 #define M_MAC_GENC _SB_MAKEMASK1(S_MAC_GENC) 658 #define M_MAC_MDIO_IN _SB_MAKEMASK1(S_MAC_MDIO_IN) 659 660 #endif 661
Indexes created Tue Sep 30 20:09:53 GMT 2025