sb1250_mac.h revision 1.4
1 /* ********************************************************************* 2 * SB1250 Board Support Package 3 * 4 * MAC constants and macros File: sb1250_mac.h 5 * 6 * This module contains constants and macros for the SB1250's 7 * ethernet controllers. 8 * 9 * SB1250 specification level: User's manual 1/02/02 10 * 11 * Author: Mitch Lichtenberg (mpl (at) broadcom.com) 12 * 13 ********************************************************************* 14 * 15 * Copyright 2000,2001,2002,2003 16 * Broadcom Corporation. All rights reserved. 17 * 18 * This software is furnished under license and may be used and 19 * copied only in accordance with the following terms and 20 * conditions. Subject to these conditions, you may download, 21 * copy, install, use, modify and distribute modified or unmodified 22 * copies of this software in source and/or binary form. No title 23 * or ownership is transferred hereby. 24 * 25 * 1) Any source code used, modified or distributed must reproduce 26 * and retain this copyright notice and list of conditions 27 * as they appear in the source file. 28 * 29 * 2) No right is granted to use any trade name, trademark, or 30 * logo of Broadcom Corporation. The "Broadcom Corporation" 31 * name may not be used to endorse or promote products derived 32 * from this software without the prior written permission of 33 * Broadcom Corporation. 34 * 35 * 3) THIS SOFTWARE IS PROVIDED "AS-IS" AND ANY EXPRESS OR 36 * IMPLIED WARRANTIES, INCLUDING BUT NOT LIMITED TO, ANY IMPLIED 37 * WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR 38 * PURPOSE, OR NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT 39 * SHALL BROADCOM BE LIABLE FOR ANY DAMAGES WHATSOEVER, AND IN 40 * PARTICULAR, BROADCOM SHALL NOT BE LIABLE FOR DIRECT, INDIRECT, 41 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 42 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 43 * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR 44 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 45 * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR 46 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE), EVEN IF ADVISED OF 47 * THE POSSIBILITY OF SUCH DAMAGE. 48 ********************************************************************* */ 49 50 51 #ifndef _SB1250_MAC_H 52 #define _SB1250_MAC_H 53 54 #include "sb1250_defs.h" 55 56 /* ********************************************************************* 57 * Ethernet MAC Registers 58 ********************************************************************* */ 59 60 /* 61 * MAC Configuration Register (Table 9-13) 62 * Register: MAC_CFG_0 63 * Register: MAC_CFG_1 64 * Register: MAC_CFG_2 65 */ 66 67 68 #define M_MAC_RESERVED0 _SB_MAKEMASK1(0) 69 #define M_MAC_TX_HOLD_SOP_EN _SB_MAKEMASK1(1) 70 #define M_MAC_RETRY_EN _SB_MAKEMASK1(2) 71 #define M_MAC_RET_DRPREQ_EN _SB_MAKEMASK1(3) 72 #define M_MAC_RET_UFL_EN _SB_MAKEMASK1(4) 73 #define M_MAC_BURST_EN _SB_MAKEMASK1(5) 74 75 #define S_MAC_TX_PAUSE _SB_MAKE64(6) 76 #define M_MAC_TX_PAUSE_CNT _SB_MAKEMASK(3,S_MAC_TX_PAUSE) 77 #define V_MAC_TX_PAUSE_CNT(x) _SB_MAKEVALUE(x,S_MAC_TX_PAUSE) 78 79 #define K_MAC_TX_PAUSE_CNT_512 0 80 #define K_MAC_TX_PAUSE_CNT_1K 1 81 #define K_MAC_TX_PAUSE_CNT_2K 2 82 #define K_MAC_TX_PAUSE_CNT_4K 3 83 #define K_MAC_TX_PAUSE_CNT_8K 4 84 #define K_MAC_TX_PAUSE_CNT_16K 5 85 #define K_MAC_TX_PAUSE_CNT_32K 6 86 #define K_MAC_TX_PAUSE_CNT_64K 7 87 88 #define V_MAC_TX_PAUSE_CNT_512 V_MAC_TX_PAUSE_CNT(K_MAC_TX_PAUSE_CNT_512) 89 #define V_MAC_TX_PAUSE_CNT_1K V_MAC_TX_PAUSE_CNT(K_MAC_TX_PAUSE_CNT_1K) 90 #define V_MAC_TX_PAUSE_CNT_2K V_MAC_TX_PAUSE_CNT(K_MAC_TX_PAUSE_CNT_2K) 91 #define V_MAC_TX_PAUSE_CNT_4K V_MAC_TX_PAUSE_CNT(K_MAC_TX_PAUSE_CNT_4K) 92 #define V_MAC_TX_PAUSE_CNT_8K V_MAC_TX_PAUSE_CNT(K_MAC_TX_PAUSE_CNT_8K) 93 #define V_MAC_TX_PAUSE_CNT_16K V_MAC_TX_PAUSE_CNT(K_MAC_TX_PAUSE_CNT_16K) 94 #define V_MAC_TX_PAUSE_CNT_32K V_MAC_TX_PAUSE_CNT(K_MAC_TX_PAUSE_CNT_32K) 95 #define V_MAC_TX_PAUSE_CNT_64K V_MAC_TX_PAUSE_CNT(K_MAC_TX_PAUSE_CNT_64K) 96 97 #define M_MAC_RESERVED1 _SB_MAKEMASK(8,9) 98 99 #define M_MAC_AP_STAT_EN _SB_MAKEMASK1(17) 100 #define M_MAC_RESERVED2 _SB_MAKEMASK1(18) 101 #define M_MAC_DRP_ERRPKT_EN _SB_MAKEMASK1(19) 102 #define M_MAC_DRP_FCSERRPKT_EN _SB_MAKEMASK1(20) 103 #define M_MAC_DRP_CODEERRPKT_EN _SB_MAKEMASK1(21) 104 #define M_MAC_DRP_DRBLERRPKT_EN _SB_MAKEMASK1(22) 105 #define M_MAC_DRP_RNTPKT_EN _SB_MAKEMASK1(23) 106 #define M_MAC_DRP_OSZPKT_EN _SB_MAKEMASK1(24) 107 #define M_MAC_DRP_LENERRPKT_EN _SB_MAKEMASK1(25) 108 109 #define M_MAC_RESERVED3 _SB_MAKEMASK(6,26) 110 111 #define M_MAC_BYPASS_SEL _SB_MAKEMASK1(32) 112 #define M_MAC_HDX_EN _SB_MAKEMASK1(33) 113 114 #define S_MAC_SPEED_SEL _SB_MAKE64(34) 115 #define M_MAC_SPEED_SEL _SB_MAKEMASK(2,S_MAC_SPEED_SEL) 116 #define V_MAC_SPEED_SEL(x) _SB_MAKEVALUE(x,S_MAC_SPEED_SEL) 117 #define G_MAC_SPEED_SEL(x) _SB_GETVALUE(x,S_MAC_SPEED_SEL,M_MAC_SPEED_SEL) 118 119 #define K_MAC_SPEED_SEL_10MBPS 0 120 #define K_MAC_SPEED_SEL_100MBPS 1 121 #define K_MAC_SPEED_SEL_1000MBPS 2 122 #define K_MAC_SPEED_SEL_RESERVED 3 123 124 #define V_MAC_SPEED_SEL_10MBPS V_MAC_SPEED_SEL(K_MAC_SPEED_SEL_10MBPS) 125 #define V_MAC_SPEED_SEL_100MBPS V_MAC_SPEED_SEL(K_MAC_SPEED_SEL_100MBPS) 126 #define V_MAC_SPEED_SEL_1000MBPS V_MAC_SPEED_SEL(K_MAC_SPEED_SEL_1000MBPS) 127 #define V_MAC_SPEED_SEL_RESERVED V_MAC_SPEED_SEL(K_MAC_SPEED_SEL_RESERVED) 128 129 #define M_MAC_TX_CLK_EDGE_SEL _SB_MAKEMASK1(36) 130 #define M_MAC_LOOPBACK_SEL _SB_MAKEMASK1(37) 131 #define M_MAC_FAST_SYNC _SB_MAKEMASK1(38) 132 #define M_MAC_SS_EN _SB_MAKEMASK1(39) 133 134 #define S_MAC_BYPASS_CFG _SB_MAKE64(40) 135 #define M_MAC_BYPASS_CFG _SB_MAKEMASK(2,S_MAC_BYPASS_CFG) 136 #define V_MAC_BYPASS_CFG(x) _SB_MAKEVALUE(x,S_MAC_BYPASS_CFG) 137 #define G_MAC_BYPASS_CFG(x) _SB_GETVALUE(x,S_MAC_BYPASS_CFG,M_MAC_BYPASS_CFG) 138 139 #define K_MAC_BYPASS_GMII 0 140 #define K_MAC_BYPASS_ENCODED 1 141 #define K_MAC_BYPASS_SOP 2 142 #define K_MAC_BYPASS_EOP 3 143 144 #define M_MAC_BYPASS_16 _SB_MAKEMASK1(42) 145 #define M_MAC_BYPASS_FCS_CHK _SB_MAKEMASK1(43) 146 147 #if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) 148 #define M_MAC_RX_CH_SEL_MSB _SB_MAKEMASK1(44) 149 #endif /* 1250 PASS2 || 112x PASS1 */ 150 151 #if SIBYTE_HDR_FEATURE(112x, PASS1) 152 #define M_MAC_SPLIT_CH_SEL _SB_MAKEMASK1(45) 153 #endif /* 112x PASS1 */ 154 155 #define S_MAC_BYPASS_IFG _SB_MAKE64(46) 156 #define M_MAC_BYPASS_IFG _SB_MAKEMASK(8,S_MAC_BYPASS_IFG) 157 #define V_MAC_BYPASS_IFG(x) _SB_MAKEVALUE(x,S_MAC_BYPASS_IFG) 158 #define G_MAC_BYPASS_IFG(x) _SB_GETVALUE(x,S_MAC_BYPASS_IFG,M_MAC_BYPASS_IFG) 159 160 #define K_MAC_FC_CMD_DISABLED 0 161 #define K_MAC_FC_CMD_ENABLED 1 162 #define K_MAC_FC_CMD_ENAB_FALSECARR 2 163 164 #define V_MAC_FC_CMD_DISABLED V_MAC_FC_CMD(K_MAC_FC_CMD_DISABLED) 165 #define V_MAC_FC_CMD_ENABLED V_MAC_FC_CMD(K_MAC_FC_CMD_ENABLED) 166 #define V_MAC_FC_CMD_ENAB_FALSECARR V_MAC_FC_CMD(K_MAC_FC_CMD_ENAB_FALSECARR) 167 168 #define M_MAC_FC_SEL _SB_MAKEMASK1(54) 169 170 #define S_MAC_FC_CMD _SB_MAKE64(55) 171 #define M_MAC_FC_CMD _SB_MAKEMASK(2,S_MAC_FC_CMD) 172 #define V_MAC_FC_CMD(x) _SB_MAKEVALUE(x,S_MAC_FC_CMD) 173 #define G_MAC_FC_CMD(x) _SB_GETVALUE(x,S_MAC_FC_CMD,M_MAC_FC_CMD) 174 175 #define S_MAC_RX_CH_SEL _SB_MAKE64(57) 176 #define M_MAC_RX_CH_SEL _SB_MAKEMASK(7,S_MAC_RX_CH_SEL) 177 #define V_MAC_RX_CH_SEL(x) _SB_MAKEVALUE(x,S_MAC_RX_CH_SEL) 178 #define G_MAC_RX_CH_SEL(x) _SB_GETVALUE(x,S_MAC_RX_CH_SEL,M_MAC_RX_CH_SEL) 179 180 181 /* 182 * MAC Enable Registers 183 * Register: MAC_ENABLE_0 184 * Register: MAC_ENABLE_1 185 * Register: MAC_ENABLE_2 186 */ 187 188 #define M_MAC_RXDMA_EN0 _SB_MAKEMASK1(0) 189 #define M_MAC_RXDMA_EN1 _SB_MAKEMASK1(1) 190 #define M_MAC_TXDMA_EN0 _SB_MAKEMASK1(4) 191 #define M_MAC_TXDMA_EN1 _SB_MAKEMASK1(5) 192 193 #define M_MAC_PORT_RESET _SB_MAKEMASK1(8) 194 195 #define M_MAC_RX_ENABLE _SB_MAKEMASK1(10) 196 #define M_MAC_TX_ENABLE _SB_MAKEMASK1(11) 197 #define M_MAC_BYP_RX_ENABLE _SB_MAKEMASK1(12) 198 #define M_MAC_BYP_TX_ENABLE _SB_MAKEMASK1(13) 199 200 /* 201 * MAC DMA Control Register 202 * Register: MAC_TXD_CTL_0 203 * Register: MAC_TXD_CTL_1 204 * Register: MAC_TXD_CTL_2 205 */ 206 207 #define S_MAC_TXD_WEIGHT0 _SB_MAKE64(0) 208 #define M_MAC_TXD_WEIGHT0 _SB_MAKEMASK(4,S_MAC_TXD_WEIGHT0) 209 #define V_MAC_TXD_WEIGHT0(x) _SB_MAKEVALUE(x,S_MAC_TXD_WEIGHT0) 210 #define G_MAC_TXD_WEIGHT0(x) _SB_GETVALUE(x,S_MAC_TXD_WEIGHT0,M_MAC_TXD_WEIGHT0) 211 212 #define S_MAC_TXD_WEIGHT1 _SB_MAKE64(4) 213 #define M_MAC_TXD_WEIGHT1 _SB_MAKEMASK(4,S_MAC_TXD_WEIGHT1) 214 #define V_MAC_TXD_WEIGHT1(x) _SB_MAKEVALUE(x,S_MAC_TXD_WEIGHT1) 215 #define G_MAC_TXD_WEIGHT1(x) _SB_GETVALUE(x,S_MAC_TXD_WEIGHT1,M_MAC_TXD_WEIGHT1) 216 217 /* 218 * MAC Fifo Threshhold registers (Table 9-14) 219 * Register: MAC_THRSH_CFG_0 220 * Register: MAC_THRSH_CFG_1 221 * Register: MAC_THRSH_CFG_2 222 */ 223 224 #define S_MAC_TX_WR_THRSH _SB_MAKE64(0) 225 #if SIBYTE_HDR_FEATURE_UP_TO(1250, PASS1) 226 /* XXX: Can't enable, as it has the same name as a pass2+ define below. */ 227 /* #define M_MAC_TX_WR_THRSH _SB_MAKEMASK(6,S_MAC_TX_WR_THRSH) */ 228 #endif /* up to 1250 PASS1 */ 229 #if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) 230 #define M_MAC_TX_WR_THRSH _SB_MAKEMASK(7,S_MAC_TX_WR_THRSH) 231 #endif /* 1250 PASS2 || 112x PASS1 */ 232 #define V_MAC_TX_WR_THRSH(x) _SB_MAKEVALUE(x,S_MAC_TX_WR_THRSH) 233 #define G_MAC_TX_WR_THRSH(x) _SB_GETVALUE(x,S_MAC_TX_WR_THRSH,M_MAC_TX_WR_THRSH) 234 235 #define S_MAC_TX_RD_THRSH _SB_MAKE64(8) 236 #if SIBYTE_HDR_FEATURE_UP_TO(1250, PASS1) 237 /* XXX: Can't enable, as it has the same name as a pass2+ define below. */ 238 /* #define M_MAC_TX_RD_THRSH _SB_MAKEMASK(6,S_MAC_TX_RD_THRSH) */ 239 #endif /* up to 1250 PASS1 */ 240 #if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) 241 #define M_MAC_TX_RD_THRSH _SB_MAKEMASK(7,S_MAC_TX_RD_THRSH) 242 #endif /* 1250 PASS2 || 112x PASS1 */ 243 #define V_MAC_TX_RD_THRSH(x) _SB_MAKEVALUE(x,S_MAC_TX_RD_THRSH) 244 #define G_MAC_TX_RD_THRSH(x) _SB_GETVALUE(x,S_MAC_TX_RD_THRSH,M_MAC_TX_RD_THRSH) 245 246 #define S_MAC_TX_RL_THRSH _SB_MAKE64(16) 247 #define M_MAC_TX_RL_THRSH _SB_MAKEMASK(4,S_MAC_TX_RL_THRSH) 248 #define V_MAC_TX_RL_THRSH(x) _SB_MAKEVALUE(x,S_MAC_TX_RL_THRSH) 249 #define G_MAC_TX_RL_THRSH(x) _SB_GETVALUE(x,S_MAC_TX_RL_THRSH,M_MAC_TX_RL_THRSH) 250 251 #define S_MAC_RX_PL_THRSH _SB_MAKE64(24) 252 #define M_MAC_RX_PL_THRSH _SB_MAKEMASK(6,S_MAC_RX_PL_THRSH) 253 #define V_MAC_RX_PL_THRSH(x) _SB_MAKEVALUE(x,S_MAC_RX_PL_THRSH) 254 #define G_MAC_RX_PL_THRSH(x) _SB_GETVALUE(x,S_MAC_RX_PL_THRSH,M_MAC_RX_PL_THRSH) 255 256 #define S_MAC_RX_RD_THRSH _SB_MAKE64(32) 257 #define M_MAC_RX_RD_THRSH _SB_MAKEMASK(6,S_MAC_RX_RD_THRSH) 258 #define V_MAC_RX_RD_THRSH(x) _SB_MAKEVALUE(x,S_MAC_RX_RD_THRSH) 259 #define G_MAC_RX_RD_THRSH(x) _SB_GETVALUE(x,S_MAC_RX_RD_THRSH,M_MAC_RX_RD_THRSH) 260 261 #define S_MAC_RX_RL_THRSH _SB_MAKE64(40) 262 #define M_MAC_RX_RL_THRSH _SB_MAKEMASK(6,S_MAC_RX_RL_THRSH) 263 #define V_MAC_RX_RL_THRSH(x) _SB_MAKEVALUE(x,S_MAC_RX_RL_THRSH) 264 #define G_MAC_RX_RL_THRSH(x) _SB_GETVALUE(x,S_MAC_RX_RL_THRSH,M_MAC_RX_RL_THRSH) 265 266 #if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) 267 #define S_MAC_ENC_FC_THRSH _SB_MAKE64(56) 268 #define M_MAC_ENC_FC_THRSH _SB_MAKEMASK(6,S_MAC_ENC_FC_THRSH) 269 #define V_MAC_ENC_FC_THRSH(x) _SB_MAKEVALUE(x,S_MAC_ENC_FC_THRSH) 270 #define G_MAC_ENC_FC_THRSH(x) _SB_GETVALUE(x,S_MAC_ENC_FC_THRSH,M_MAC_ENC_FC_THRSH) 271 #endif /* 1250 PASS2 || 112x PASS1 */ 272 273 /* 274 * MAC Frame Configuration Registers (Table 9-15) 275 * Register: MAC_FRAME_CFG_0 276 * Register: MAC_FRAME_CFG_1 277 * Register: MAC_FRAME_CFG_2 278 */ 279 280 /* XXXCGD: ??? Unused in pass2? */ 281 #define S_MAC_IFG_RX _SB_MAKE64(0) 282 #define M_MAC_IFG_RX _SB_MAKEMASK(6,S_MAC_IFG_RX) 283 #define V_MAC_IFG_RX(x) _SB_MAKEVALUE(x,S_MAC_IFG_RX) 284 #define G_MAC_IFG_RX(x) _SB_GETVALUE(x,S_MAC_IFG_RX,M_MAC_IFG_RX) 285 286 #if SIBYTE_HDR_FEATURE(112x, PASS1) 287 #define S_MAC_PRE_LEN _SB_MAKE64(0) 288 #define M_MAC_PRE_LEN _SB_MAKEMASK(6,S_MAC_PRE_LEN) 289 #define V_MAC_PRE_LEN(x) _SB_MAKEVALUE(x,S_MAC_PRE_LEN) 290 #define G_MAC_PRE_LEN(x) _SB_GETVALUE(x,S_MAC_PRE_LEN,M_MAC_PRE_LEN) 291 #endif /* 112x PASS1 */ 292 293 #define S_MAC_IFG_TX _SB_MAKE64(6) 294 #define M_MAC_IFG_TX _SB_MAKEMASK(6,S_MAC_IFG_TX) 295 #define V_MAC_IFG_TX(x) _SB_MAKEVALUE(x,S_MAC_IFG_TX) 296 #define G_MAC_IFG_TX(x) _SB_GETVALUE(x,S_MAC_IFG_TX,M_MAC_IFG_TX) 297 298 #define S_MAC_IFG_THRSH _SB_MAKE64(12) 299 #define M_MAC_IFG_THRSH _SB_MAKEMASK(6,S_MAC_IFG_THRSH) 300 #define V_MAC_IFG_THRSH(x) _SB_MAKEVALUE(x,S_MAC_IFG_THRSH) 301 #define G_MAC_IFG_THRSH(x) _SB_GETVALUE(x,S_MAC_IFG_THRSH,M_MAC_IFG_THRSH) 302 303 #define S_MAC_BACKOFF_SEL _SB_MAKE64(18) 304 #define M_MAC_BACKOFF_SEL _SB_MAKEMASK(4,S_MAC_BACKOFF_SEL) 305 #define V_MAC_BACKOFF_SEL(x) _SB_MAKEVALUE(x,S_MAC_BACKOFF_SEL) 306 #define G_MAC_BACKOFF_SEL(x) _SB_GETVALUE(x,S_MAC_BACKOFF_SEL,M_MAC_BACKOFF_SEL) 307 308 #define S_MAC_LFSR_SEED _SB_MAKE64(22) 309 #define M_MAC_LFSR_SEED _SB_MAKEMASK(8,S_MAC_LFSR_SEED) 310 #define V_MAC_LFSR_SEED(x) _SB_MAKEVALUE(x,S_MAC_LFSR_SEED) 311 #define G_MAC_LFSR_SEED(x) _SB_GETVALUE(x,S_MAC_LFSR_SEED,M_MAC_LFSR_SEED) 312 313 #define S_MAC_SLOT_SIZE _SB_MAKE64(30) 314 #define M_MAC_SLOT_SIZE _SB_MAKEMASK(10,S_MAC_SLOT_SIZE) 315 #define V_MAC_SLOT_SIZE(x) _SB_MAKEVALUE(x,S_MAC_SLOT_SIZE) 316 #define G_MAC_SLOT_SIZE(x) _SB_GETVALUE(x,S_MAC_SLOT_SIZE,M_MAC_SLOT_SIZE) 317 318 #define S_MAC_MIN_FRAMESZ _SB_MAKE64(40) 319 #define M_MAC_MIN_FRAMESZ _SB_MAKEMASK(8,S_MAC_MIN_FRAMESZ) 320 #define V_MAC_MIN_FRAMESZ(x) _SB_MAKEVALUE(x,S_MAC_MIN_FRAMESZ) 321 #define G_MAC_MIN_FRAMESZ(x) _SB_GETVALUE(x,S_MAC_MIN_FRAMESZ,M_MAC_MIN_FRAMESZ) 322 323 #define S_MAC_MAX_FRAMESZ _SB_MAKE64(48) 324 #define M_MAC_MAX_FRAMESZ _SB_MAKEMASK(16,S_MAC_MAX_FRAMESZ) 325 #define V_MAC_MAX_FRAMESZ(x) _SB_MAKEVALUE(x,S_MAC_MAX_FRAMESZ) 326 #define G_MAC_MAX_FRAMESZ(x) _SB_GETVALUE(x,S_MAC_MAX_FRAMESZ,M_MAC_MAX_FRAMESZ) 327 328 /* 329 * These constants are used to configure the fields within the Frame 330 * Configuration Register. 331 */ 332 333 #define K_MAC_IFG_RX_10 _SB_MAKE64(0) /* See table 176, not used */ 334 #define K_MAC_IFG_RX_100 _SB_MAKE64(0) 335 #define K_MAC_IFG_RX_1000 _SB_MAKE64(0) 336 337 #define K_MAC_IFG_TX_10 _SB_MAKE64(20) 338 #define K_MAC_IFG_TX_100 _SB_MAKE64(20) 339 #define K_MAC_IFG_TX_1000 _SB_MAKE64(8) 340 341 #define K_MAC_IFG_THRSH_10 _SB_MAKE64(4) 342 #define K_MAC_IFG_THRSH_100 _SB_MAKE64(4) 343 #define K_MAC_IFG_THRSH_1000 _SB_MAKE64(0) 344 345 #define K_MAC_SLOT_SIZE_10 _SB_MAKE64(0) 346 #define K_MAC_SLOT_SIZE_100 _SB_MAKE64(0) 347 #define K_MAC_SLOT_SIZE_1000 _SB_MAKE64(0) 348 349 #define V_MAC_IFG_RX_10 V_MAC_IFG_RX(K_MAC_IFG_RX_10) 350 #define V_MAC_IFG_RX_100 V_MAC_IFG_RX(K_MAC_IFG_RX_100) 351 #define V_MAC_IFG_RX_1000 V_MAC_IFG_RX(K_MAC_IFG_RX_1000) 352 353 #define V_MAC_IFG_TX_10 V_MAC_IFG_TX(K_MAC_IFG_TX_10) 354 #define V_MAC_IFG_TX_100 V_MAC_IFG_TX(K_MAC_IFG_TX_100) 355 #define V_MAC_IFG_TX_1000 V_MAC_IFG_TX(K_MAC_IFG_TX_1000) 356 357 #define V_MAC_IFG_THRSH_10 V_MAC_IFG_THRSH(K_MAC_IFG_THRSH_10) 358 #define V_MAC_IFG_THRSH_100 V_MAC_IFG_THRSH(K_MAC_IFG_THRSH_100) 359 #define V_MAC_IFG_THRSH_1000 V_MAC_IFG_THRSH(K_MAC_IFG_THRSH_1000) 360 361 #define V_MAC_SLOT_SIZE_10 V_MAC_SLOT_SIZE(K_MAC_SLOT_SIZE_10) 362 #define V_MAC_SLOT_SIZE_100 V_MAC_SLOT_SIZE(K_MAC_SLOT_SIZE_100) 363 #define V_MAC_SLOT_SIZE_1000 V_MAC_SLOT_SIZE(K_MAC_SLOT_SIZE_1000) 364 365 #define K_MAC_MIN_FRAMESZ_FIFO _SB_MAKE64(9) 366 #define K_MAC_MIN_FRAMESZ_DEFAULT _SB_MAKE64(64) 367 #define K_MAC_MAX_FRAMESZ_DEFAULT _SB_MAKE64(1518) 368 #define K_MAC_MAX_FRAMESZ_JUMBO _SB_MAKE64(9216) 369 370 #define V_MAC_MIN_FRAMESZ_FIFO V_MAC_MIN_FRAMESZ(K_MAC_MIN_FRAMESZ_FIFO) 371 #define V_MAC_MIN_FRAMESZ_DEFAULT V_MAC_MIN_FRAMESZ(K_MAC_MIN_FRAMESZ_DEFAULT) 372 #define V_MAC_MAX_FRAMESZ_DEFAULT V_MAC_MAX_FRAMESZ(K_MAC_MAX_FRAMESZ_DEFAULT) 373 #define V_MAC_MAX_FRAMESZ_JUMBO V_MAC_MAX_FRAMESZ(K_MAC_MAX_FRAMESZ_JUMBO) 374 375 /* 376 * MAC VLAN Tag Registers (Table 9-16) 377 * Register: MAC_VLANTAG_0 378 * Register: MAC_VLANTAG_1 379 * Register: MAC_VLANTAG_2 380 */ 381 382 #define S_MAC_VLAN_TAG _SB_MAKE64(0) 383 #define M_MAC_VLAN_TAG _SB_MAKEMASK(32,S_MAC_VLAN_TAG) 384 #define V_MAC_VLAN_TAG(x) _SB_MAKEVALUE(x,S_MAC_VLAN_TAG) 385 #define G_MAC_VLAN_TAG(x) _SB_GETVALUE(x,S_MAC_VLAN_TAG,M_MAC_VLAN_TAG) 386 387 #if SIBYTE_HDR_FEATURE(112x, PASS1) 388 #define S_MAC_TX_PKT_OFFSET _SB_MAKE64(32) 389 #define M_MAC_TX_PKT_OFFSET _SB_MAKEMASK(8,S_MAC_TX_PKT_OFFSET) 390 #define V_MAC_TX_PKT_OFFSET(x) _SB_MAKEVALUE(x,S_MAC_TX_PKT_OFFSET) 391 #define G_MAC_TX_PKT_OFFSET(x) _SB_GETVALUE(x,S_MAC_TX_PKT_OFFSET,M_MAC_TX_PKT_OFFSET) 392 393 #define S_MAC_TX_CRC_OFFSET _SB_MAKE64(40) 394 #define M_MAC_TX_CRC_OFFSET _SB_MAKEMASK(8,S_MAC_TX_CRC_OFFSET) 395 #define V_MAC_TX_CRC_OFFSET(x) _SB_MAKEVALUE(x,S_MAC_TX_CRC_OFFSET) 396 #define G_MAC_TX_CRC_OFFSET(x) _SB_GETVALUE(x,S_MAC_TX_CRC_OFFSET,M_MAC_TX_CRC_OFFSET) 397 398 #define M_MAC_CH_BASE_FC_EN _SB_MAKEMASK1(48) 399 #endif /* 112x PASS1 */ 400 401 /* 402 * MAC Status Registers (Table 9-17) 403 * Also used for the MAC Interrupt Mask Register (Table 9-18) 404 * Register: MAC_STATUS_0 405 * Register: MAC_STATUS_1 406 * Register: MAC_STATUS_2 407 * Register: MAC_INT_MASK_0 408 * Register: MAC_INT_MASK_1 409 * Register: MAC_INT_MASK_2 410 */ 411 412 /* 413 * Use these constants to shift the appropriate channel 414 * into the CH0 position so the same tests can be used 415 * on each channel. 416 */ 417 418 #define S_MAC_RX_CH0 _SB_MAKE64(0) 419 #define S_MAC_RX_CH1 _SB_MAKE64(8) 420 #define S_MAC_TX_CH0 _SB_MAKE64(16) 421 #define S_MAC_TX_CH1 _SB_MAKE64(24) 422 423 #define S_MAC_TXCHANNELS _SB_MAKE64(16) /* this is 1st TX chan */ 424 #define S_MAC_CHANWIDTH _SB_MAKE64(8) /* bits between channels */ 425 426 /* 427 * These are the same as RX channel 0. The idea here 428 * is that you'll use one of the "S_" things above 429 * and pass just the six bits to a DMA-channel-specific ISR 430 */ 431 #define M_MAC_INT_CHANNEL _SB_MAKEMASK(8,0) 432 #define M_MAC_INT_EOP_COUNT _SB_MAKEMASK1(0) 433 #define M_MAC_INT_EOP_TIMER _SB_MAKEMASK1(1) 434 #define M_MAC_INT_EOP_SEEN _SB_MAKEMASK1(2) 435 #define M_MAC_INT_HWM _SB_MAKEMASK1(3) 436 #define M_MAC_INT_LWM _SB_MAKEMASK1(4) 437 #define M_MAC_INT_DSCR _SB_MAKEMASK1(5) 438 #define M_MAC_INT_ERR _SB_MAKEMASK1(6) 439 #define M_MAC_INT_DZERO _SB_MAKEMASK1(7) /* only for TX channels */ 440 #define M_MAC_INT_DROP _SB_MAKEMASK1(7) /* only for RX channels */ 441 442 /* 443 * In the following definitions we use ch (0/1) and txrx (TX=1, RX=0, see 444 * also DMA_TX/DMA_RX in sb_regs.h). 445 */ 446 #define S_MAC_STATUS_CH_OFFSET(ch,txrx) _SB_MAKE64(((ch) + 2 * (txrx)) * S_MAC_CHANWIDTH) 447 448 #define M_MAC_STATUS_CHANNEL(ch,txrx) _SB_MAKEVALUE(_SB_MAKEMASK(8,0),S_MAC_STATUS_CH_OFFSET(ch,txrx)) 449 #define M_MAC_STATUS_EOP_COUNT(ch,txrx) _SB_MAKEVALUE(M_MAC_INT_EOP_COUNT,S_MAC_STATUS_CH_OFFSET(ch,txrx)) 450 #define M_MAC_STATUS_EOP_TIMER(ch,txrx) _SB_MAKEVALUE(M_MAC_INT_EOP_TIMER,S_MAC_STATUS_CH_OFFSET(ch,txrx)) 451 #define M_MAC_STATUS_EOP_SEEN(ch,txrx) _SB_MAKEVALUE(M_MAC_INT_EOP_SEEN,S_MAC_STATUS_CH_OFFSET(ch,txrx)) 452 #define M_MAC_STATUS_HWM(ch,txrx) _SB_MAKEVALUE(M_MAC_INT_HWM,S_MAC_STATUS_CH_OFFSET(ch,txrx)) 453 #define M_MAC_STATUS_LWM(ch,txrx) _SB_MAKEVALUE(M_MAC_INT_LWM,S_MAC_STATUS_CH_OFFSET(ch,txrx)) 454 #define M_MAC_STATUS_DSCR(ch,txrx) _SB_MAKEVALUE(M_MAC_INT_DSCR,S_MAC_STATUS_CH_OFFSET(ch,txrx)) 455 #define M_MAC_STATUS_ERR(ch,txrx) _SB_MAKEVALUE(M_MAC_INT_ERR,S_MAC_STATUS_CH_OFFSET(ch,txrx)) 456 #define M_MAC_STATUS_DZERO(ch,txrx) _SB_MAKEVALUE(M_MAC_INT_DZERO,S_MAC_STATUS_CH_OFFSET(ch,txrx)) 457 #define M_MAC_STATUS_DROP(ch,txrx) _SB_MAKEVALUE(M_MAC_INT_DROP,S_MAC_STATUS_CH_OFFSET(ch,txrx)) 458 #define M_MAC_STATUS_OTHER_ERR _SB_MAKEVALUE(_SB_MAKEMASK(7,0),40) 459 460 461 #define M_MAC_RX_UNDRFL _SB_MAKEMASK1(40) 462 #define M_MAC_RX_OVRFL _SB_MAKEMASK1(41) 463 #define M_MAC_TX_UNDRFL _SB_MAKEMASK1(42) 464 #define M_MAC_TX_OVRFL _SB_MAKEMASK1(43) 465 #define M_MAC_LTCOL_ERR _SB_MAKEMASK1(44) 466 #define M_MAC_EXCOL_ERR _SB_MAKEMASK1(45) 467 #define M_MAC_CNTR_OVRFL_ERR _SB_MAKEMASK1(46) 468 #if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) 469 #define M_MAC_SPLIT_EN _SB_MAKEMASK1(47) /* interrupt mask only */ 470 #endif /* 1250 PASS2 || 112x PASS1 */ 471 472 #define S_MAC_COUNTER_ADDR _SB_MAKE64(47) 473 #define M_MAC_COUNTER_ADDR _SB_MAKEMASK(5,S_MAC_COUNTER_ADDR) 474 #define V_MAC_COUNTER_ADDR(x) _SB_MAKEVALUE(x,S_MAC_COUNTER_ADDR) 475 #define G_MAC_COUNTER_ADDR(x) _SB_GETVALUE(x,S_MAC_COUNTER_ADDR,M_MAC_COUNTER_ADDR) 476 477 #if SIBYTE_HDR_FEATURE(112x, PASS1) 478 #define M_MAC_TX_PAUSE_ON _SB_MAKEMASK1(52) 479 #endif /* 112x PASS1 */ 480 481 /* 482 * MAC Fifo Pointer Registers (Table 9-19) [Debug register] 483 * Register: MAC_FIFO_PTRS_0 484 * Register: MAC_FIFO_PTRS_1 485 * Register: MAC_FIFO_PTRS_2 486 */ 487 488 #define S_MAC_TX_WRPTR _SB_MAKE64(0) 489 #define M_MAC_TX_WRPTR _SB_MAKEMASK(6,S_MAC_TX_WRPTR) 490 #define V_MAC_TX_WRPTR(x) _SB_MAKEVALUE(x,S_MAC_TX_WRPTR) 491 #define G_MAC_TX_WRPTR(x) _SB_GETVALUE(x,S_MAC_TX_WRPTR,M_MAC_TX_WRPTR) 492 493 #define S_MAC_TX_RDPTR _SB_MAKE64(8) 494 #define M_MAC_TX_RDPTR _SB_MAKEMASK(6,S_MAC_TX_RDPTR) 495 #define V_MAC_TX_RDPTR(x) _SB_MAKEVALUE(x,S_MAC_TX_RDPTR) 496 #define G_MAC_TX_RDPTR(x) _SB_GETVALUE(x,S_MAC_TX_RDPTR,M_MAC_TX_RDPTR) 497 498 #define S_MAC_RX_WRPTR _SB_MAKE64(16) 499 #define M_MAC_RX_WRPTR _SB_MAKEMASK(6,S_MAC_RX_WRPTR) 500 #define V_MAC_RX_WRPTR(x) _SB_MAKEVALUE(x,S_MAC_RX_WRPTR) 501 #define G_MAC_RX_WRPTR(x) _SB_GETVALUE(x,S_MAC_RX_WRPTR,M_MAC_TX_WRPTR) 502 503 #define S_MAC_RX_RDPTR _SB_MAKE64(24) 504 #define M_MAC_RX_RDPTR _SB_MAKEMASK(6,S_MAC_RX_RDPTR) 505 #define V_MAC_RX_RDPTR(x) _SB_MAKEVALUE(x,S_MAC_RX_RDPTR) 506 #define G_MAC_RX_RDPTR(x) _SB_GETVALUE(x,S_MAC_RX_RDPTR,M_MAC_TX_RDPTR) 507 508 /* 509 * MAC Fifo End Of Packet Count Registers (Table 9-20) [Debug register] 510 * Register: MAC_EOPCNT_0 511 * Register: MAC_EOPCNT_1 512 * Register: MAC_EOPCNT_2 513 */ 514 515 #define S_MAC_TX_EOP_COUNTER _SB_MAKE64(0) 516 #define M_MAC_TX_EOP_COUNTER _SB_MAKEMASK(6,S_MAC_TX_EOP_COUNTER) 517 #define V_MAC_TX_EOP_COUNTER(x) _SB_MAKEVALUE(x,S_MAC_TX_EOP_COUNTER) 518 #define G_MAC_TX_EOP_COUNTER(x) _SB_GETVALUE(x,S_MAC_TX_EOP_COUNTER,M_MAC_TX_EOP_COUNTER) 519 520 #define S_MAC_RX_EOP_COUNTER _SB_MAKE64(8) 521 #define M_MAC_RX_EOP_COUNTER _SB_MAKEMASK(6,S_MAC_RX_EOP_COUNTER) 522 #define V_MAC_RX_EOP_COUNTER(x) _SB_MAKEVALUE(x,S_MAC_RX_EOP_COUNTER) 523 #define G_MAC_RX_EOP_COUNTER(x) _SB_GETVALUE(x,S_MAC_RX_EOP_COUNTER,M_MAC_RX_EOP_COUNTER) 524 525 /* 526 * MAC Recieve Address Filter Exact Match Registers (Table 9-21) 527 * Registers: MAC_ADDR0_0 through MAC_ADDR7_0 528 * Registers: MAC_ADDR0_1 through MAC_ADDR7_1 529 * Registers: MAC_ADDR0_2 through MAC_ADDR7_2 530 */ 531 532 /* No bitfields */ 533 534 /* 535 * MAC Receive Address Filter Mask Registers 536 * Registers: MAC_ADDRMASK0_0 and MAC_ADDRMASK0_1 537 * Registers: MAC_ADDRMASK1_0 and MAC_ADDRMASK1_1 538 * Registers: MAC_ADDRMASK2_0 and MAC_ADDRMASK2_1 539 */ 540 541 /* No bitfields */ 542 543 /* 544 * MAC Recieve Address Filter Hash Match Registers (Table 9-22) 545 * Registers: MAC_HASH0_0 through MAC_HASH7_0 546 * Registers: MAC_HASH0_1 through MAC_HASH7_1 547 * Registers: MAC_HASH0_2 through MAC_HASH7_2 548 */ 549 550 /* No bitfields */ 551 552 /* 553 * MAC Transmit Source Address Registers (Table 9-23) 554 * Register: MAC_ETHERNET_ADDR_0 555 * Register: MAC_ETHERNET_ADDR_1 556 * Register: MAC_ETHERNET_ADDR_2 557 */ 558 559 /* No bitfields */ 560 561 /* 562 * MAC Packet Type Configuration Register 563 * Register: MAC_TYPE_CFG_0 564 * Register: MAC_TYPE_CFG_1 565 * Register: MAC_TYPE_CFG_2 566 */ 567 568 #define S_TYPECFG_TYPESIZE _SB_MAKE64(16) 569 570 #define S_TYPECFG_TYPE0 _SB_MAKE64(0) 571 #define M_TYPECFG_TYPE0 _SB_MAKEMASK(16,S_TYPECFG_TYPE0) 572 #define V_TYPECFG_TYPE0(x) _SB_MAKEVALUE(x,S_TYPECFG_TYPE0) 573 #define G_TYPECFG_TYPE0(x) _SB_GETVALUE(x,S_TYPECFG_TYPE0,M_TYPECFG_TYPE0) 574 575 #define S_TYPECFG_TYPE1 _SB_MAKE64(0) 576 #define M_TYPECFG_TYPE1 _SB_MAKEMASK(16,S_TYPECFG_TYPE1) 577 #define V_TYPECFG_TYPE1(x) _SB_MAKEVALUE(x,S_TYPECFG_TYPE1) 578 #define G_TYPECFG_TYPE1(x) _SB_GETVALUE(x,S_TYPECFG_TYPE1,M_TYPECFG_TYPE1) 579 580 #define S_TYPECFG_TYPE2 _SB_MAKE64(0) 581 #define M_TYPECFG_TYPE2 _SB_MAKEMASK(16,S_TYPECFG_TYPE2) 582 #define V_TYPECFG_TYPE2(x) _SB_MAKEVALUE(x,S_TYPECFG_TYPE2) 583 #define G_TYPECFG_TYPE2(x) _SB_GETVALUE(x,S_TYPECFG_TYPE2,M_TYPECFG_TYPE2) 584 585 #define S_TYPECFG_TYPE3 _SB_MAKE64(0) 586 #define M_TYPECFG_TYPE3 _SB_MAKEMASK(16,S_TYPECFG_TYPE3) 587 #define V_TYPECFG_TYPE3(x) _SB_MAKEVALUE(x,S_TYPECFG_TYPE3) 588 #define G_TYPECFG_TYPE3(x) _SB_GETVALUE(x,S_TYPECFG_TYPE3,M_TYPECFG_TYPE3) 589 590 /* 591 * MAC Receive Address Filter Control Registers (Table 9-24) 592 * Register: MAC_ADFILTER_CFG_0 593 * Register: MAC_ADFILTER_CFG_1 594 * Register: MAC_ADFILTER_CFG_2 595 */ 596 597 #define M_MAC_ALLPKT_EN _SB_MAKEMASK1(0) 598 #define M_MAC_UCAST_EN _SB_MAKEMASK1(1) 599 #define M_MAC_UCAST_INV _SB_MAKEMASK1(2) 600 #define M_MAC_MCAST_EN _SB_MAKEMASK1(3) 601 #define M_MAC_MCAST_INV _SB_MAKEMASK1(4) 602 #define M_MAC_BCAST_EN _SB_MAKEMASK1(5) 603 #define M_MAC_DIRECT_INV _SB_MAKEMASK1(6) 604 #if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) 605 #define M_MAC_ALLMCAST_EN _SB_MAKEMASK1(7) 606 #endif /* 1250 PASS2 || 112x PASS1 */ 607 608 #define S_MAC_IPHDR_OFFSET _SB_MAKE64(8) 609 #define M_MAC_IPHDR_OFFSET _SB_MAKEMASK(8,S_MAC_IPHDR_OFFSET) 610 #define V_MAC_IPHDR_OFFSET(x) _SB_MAKEVALUE(x,S_MAC_IPHDR_OFFSET) 611 #define G_MAC_IPHDR_OFFSET(x) _SB_GETVALUE(x,S_MAC_IPHDR_OFFSET,M_MAC_IPHDR_OFFSET) 612 613 #if SIBYTE_HDR_FEATURE(112x, PASS1) 614 #define S_MAC_RX_CRC_OFFSET _SB_MAKE64(16) 615 #define M_MAC_RX_CRC_OFFSET _SB_MAKEMASK(8,S_MAC_RX_CRC_OFFSET) 616 #define V_MAC_RX_CRC_OFFSET(x) _SB_MAKEVALUE(x,S_MAC_RX_CRC_OFFSET) 617 #define G_MAC_RX_CRC_OFFSET(x) _SB_GETVALUE(x,S_MAC_RX_CRC_OFFSET,M_MAC_RX_CRC_OFFSET) 618 619 #define S_MAC_RX_PKT_OFFSET _SB_MAKE64(24) 620 #define M_MAC_RX_PKT_OFFSET _SB_MAKEMASK(8,S_MAC_RX_PKT_OFFSET) 621 #define V_MAC_RX_PKT_OFFSET(x) _SB_MAKEVALUE(x,S_MAC_RX_PKT_OFFSET) 622 #define G_MAC_RX_PKT_OFFSET(x) _SB_GETVALUE(x,S_MAC_RX_PKT_OFFSET,M_MAC_RX_PKT_OFFSET) 623 624 #define M_MAC_FWDPAUSE_EN _SB_MAKEMASK1(32) 625 #define M_MAC_VLAN_DET_EN _SB_MAKEMASK1(33) 626 627 #define S_MAC_RX_CH_MSN_SEL _SB_MAKE64(34) 628 #define M_MAC_RX_CH_MSN_SEL _SB_MAKEMASK(8,S_MAC_RX_CH_MSN_SEL) 629 #define V_MAC_RX_CH_MSN_SEL(x) _SB_MAKEVALUE(x,S_MAC_RX_CH_MSN_SEL) 630 #define G_MAC_RX_CH_MSN_SEL(x) _SB_GETVALUE(x,S_MAC_RX_CH_MSN_SEL,M_MAC_RX_CH_MSN_SEL) 631 #endif /* 112x PASS1 */ 632 633 /* 634 * MAC Receive Channel Select Registers (Table 9-25) 635 */ 636 637 /* no bitfields */ 638 639 /* 640 * MAC MII Management Interface Registers (Table 9-26) 641 * Register: MAC_MDIO_0 642 * Register: MAC_MDIO_1 643 * Register: MAC_MDIO_2 644 */ 645 646 #define S_MAC_MDC 0 647 #define S_MAC_MDIO_DIR 1 648 #define S_MAC_MDIO_OUT 2 649 #define S_MAC_GENC 3 650 #define S_MAC_MDIO_IN 4 651 652 #define M_MAC_MDC _SB_MAKEMASK1(S_MAC_MDC) 653 #define M_MAC_MDIO_DIR _SB_MAKEMASK1(S_MAC_MDIO_DIR) 654 #define M_MAC_MDIO_DIR_INPUT _SB_MAKEMASK1(S_MAC_MDIO_DIR) 655 #define M_MAC_MDIO_OUT _SB_MAKEMASK1(S_MAC_MDIO_OUT) 656 #define M_MAC_GENC _SB_MAKEMASK1(S_MAC_GENC) 657 #define M_MAC_MDIO_IN _SB_MAKEMASK1(S_MAC_MDIO_IN) 658 659 #endif 660
Indexes created Wed Oct 01 07:09:59 GMT 2025