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      1  1.1  simonb /*  *********************************************************************
      2  1.1  simonb     *  SB1250 Board Support Package
      3  1.2  simonb     *
      4  1.1  simonb     *  UART Constants				File: sb1250_uart.h
      5  1.2  simonb     *
      6  1.2  simonb     *  This module contains constants and macros useful for
      7  1.1  simonb     *  manipulating the SB1250's UARTs
      8  1.1  simonb     *
      9  1.2  simonb     *  SB1250 specification level:  User's manual 1/02/02
     10  1.2  simonb     *
     11  1.2  simonb     *********************************************************************
     12  1.1  simonb     *
     13  1.6  simonb     *  Copyright 2000,2001,2002,2003,2004
     14  1.1  simonb     *  Broadcom Corporation. All rights reserved.
     15  1.2  simonb     *
     16  1.2  simonb     *  This software is furnished under license and may be used and
     17  1.2  simonb     *  copied only in accordance with the following terms and
     18  1.2  simonb     *  conditions.  Subject to these conditions, you may download,
     19  1.2  simonb     *  copy, install, use, modify and distribute modified or unmodified
     20  1.2  simonb     *  copies of this software in source and/or binary form.  No title
     21  1.1  simonb     *  or ownership is transferred hereby.
     22  1.2  simonb     *
     23  1.2  simonb     *  1) Any source code used, modified or distributed must reproduce
     24  1.4     cgd     *     and retain this copyright notice and list of conditions
     25  1.4     cgd     *     as they appear in the source file.
     26  1.2  simonb     *
     27  1.2  simonb     *  2) No right is granted to use any trade name, trademark, or
     28  1.4     cgd     *     logo of Broadcom Corporation.  The "Broadcom Corporation"
     29  1.4     cgd     *     name may not be used to endorse or promote products derived
     30  1.4     cgd     *     from this software without the prior written permission of
     31  1.4     cgd     *     Broadcom Corporation.
     32  1.2  simonb     *
     33  1.1  simonb     *  3) THIS SOFTWARE IS PROVIDED "AS-IS" AND ANY EXPRESS OR
     34  1.4     cgd     *     IMPLIED WARRANTIES, INCLUDING BUT NOT LIMITED TO, ANY IMPLIED
     35  1.2  simonb     *     WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
     36  1.2  simonb     *     PURPOSE, OR NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT
     37  1.2  simonb     *     SHALL BROADCOM BE LIABLE FOR ANY DAMAGES WHATSOEVER, AND IN
     38  1.4     cgd     *     PARTICULAR, BROADCOM SHALL NOT BE LIABLE FOR DIRECT, INDIRECT,
     39  1.2  simonb     *     INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
     40  1.4     cgd     *     (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
     41  1.1  simonb     *     GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
     42  1.2  simonb     *     BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
     43  1.2  simonb     *     OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
     44  1.2  simonb     *     TORT (INCLUDING NEGLIGENCE OR OTHERWISE), EVEN IF ADVISED OF
     45  1.1  simonb     *     THE POSSIBILITY OF SUCH DAMAGE.
     46  1.1  simonb     ********************************************************************* */
     47  1.1  simonb 
     48  1.1  simonb 
     49  1.1  simonb #ifndef _SB1250_UART_H
     50  1.2  simonb #define _SB1250_UART_H
     51  1.1  simonb 
     52  1.1  simonb #include "sb1250_defs.h"
     53  1.1  simonb 
     54  1.2  simonb /* **********************************************************************
     55  1.1  simonb    * DUART Registers
     56  1.1  simonb    ********************************************************************** */
     57  1.1  simonb 
     58  1.1  simonb /*
     59  1.1  simonb  * DUART Mode Register #1 (Table 10-3)
     60  1.1  simonb  * Register: DUART_MODE_REG_1_A
     61  1.1  simonb  * Register: DUART_MODE_REG_1_B
     62  1.1  simonb  */
     63  1.1  simonb 
     64  1.2  simonb #define S_DUART_BITS_PER_CHAR       0
     65  1.2  simonb #define M_DUART_BITS_PER_CHAR       _SB_MAKEMASK(2,S_DUART_BITS_PER_CHAR)
     66  1.2  simonb #define V_DUART_BITS_PER_CHAR(x)    _SB_MAKEVALUE(x,S_DUART_BITS_PER_CHAR)
     67  1.1  simonb 
     68  1.2  simonb #define K_DUART_BITS_PER_CHAR_RSV0  0
     69  1.2  simonb #define K_DUART_BITS_PER_CHAR_RSV1  1
     70  1.2  simonb #define K_DUART_BITS_PER_CHAR_7     2
     71  1.2  simonb #define K_DUART_BITS_PER_CHAR_8     3
     72  1.1  simonb 
     73  1.2  simonb #define V_DUART_BITS_PER_CHAR_RSV0  V_DUART_BITS_PER_CHAR(K_DUART_BITS_PER_CHAR_RSV0)
     74  1.2  simonb #define V_DUART_BITS_PER_CHAR_RSV1  V_DUART_BITS_PER_CHAR(K_DUART_BITS_PER_CHAR_RSV1)
     75  1.2  simonb #define V_DUART_BITS_PER_CHAR_7     V_DUART_BITS_PER_CHAR(K_DUART_BITS_PER_CHAR_7)
     76  1.2  simonb #define V_DUART_BITS_PER_CHAR_8     V_DUART_BITS_PER_CHAR(K_DUART_BITS_PER_CHAR_8)
     77  1.1  simonb 
     78  1.1  simonb 
     79  1.2  simonb #define M_DUART_PARITY_TYPE_EVEN    0x00
     80  1.2  simonb #define M_DUART_PARITY_TYPE_ODD     _SB_MAKEMASK1(2)
     81  1.1  simonb 
     82  1.2  simonb #define S_DUART_PARITY_MODE          3
     83  1.2  simonb #define M_DUART_PARITY_MODE         _SB_MAKEMASK(2,S_DUART_PARITY_MODE)
     84  1.2  simonb #define V_DUART_PARITY_MODE(x)      _SB_MAKEVALUE(x,S_DUART_PARITY_MODE)
     85  1.1  simonb 
     86  1.2  simonb #define K_DUART_PARITY_MODE_ADD       0
     87  1.2  simonb #define K_DUART_PARITY_MODE_ADD_FIXED 1
     88  1.2  simonb #define K_DUART_PARITY_MODE_NONE      2
     89  1.1  simonb 
     90  1.2  simonb #define V_DUART_PARITY_MODE_ADD       V_DUART_PARITY_MODE(K_DUART_PARITY_MODE_ADD)
     91  1.2  simonb #define V_DUART_PARITY_MODE_ADD_FIXED V_DUART_PARITY_MODE(K_DUART_PARITY_MODE_ADD_FIXED)
     92  1.2  simonb #define V_DUART_PARITY_MODE_NONE      V_DUART_PARITY_MODE(K_DUART_PARITY_MODE_NONE)
     93  1.1  simonb 
     94  1.2  simonb #define M_DUART_ERR_MODE            _SB_MAKEMASK1(5)    /* must be zero */
     95  1.1  simonb 
     96  1.2  simonb #define M_DUART_RX_IRQ_SEL_RXRDY    0
     97  1.2  simonb #define M_DUART_RX_IRQ_SEL_RXFULL   _SB_MAKEMASK1(6)
     98  1.1  simonb 
     99  1.2  simonb #define M_DUART_RX_RTS_ENA          _SB_MAKEMASK1(7)
    100  1.1  simonb 
    101  1.1  simonb /*
    102  1.1  simonb  * DUART Mode Register #2 (Table 10-4)
    103  1.1  simonb  * Register: DUART_MODE_REG_2_A
    104  1.1  simonb  * Register: DUART_MODE_REG_2_B
    105  1.1  simonb  */
    106  1.1  simonb 
    107  1.2  simonb #define M_DUART_MODE_RESERVED1      _SB_MAKEMASK(3,0)   /* ignored */
    108  1.2  simonb 
    109  1.2  simonb #define M_DUART_STOP_BIT_LEN_2      _SB_MAKEMASK1(3)
    110  1.2  simonb #define M_DUART_STOP_BIT_LEN_1      0
    111  1.1  simonb 
    112  1.2  simonb #define M_DUART_TX_CTS_ENA          _SB_MAKEMASK1(4)
    113  1.1  simonb 
    114  1.1  simonb 
    115  1.2  simonb #define M_DUART_MODE_RESERVED2      _SB_MAKEMASK1(5)    /* must be zero */
    116  1.1  simonb 
    117  1.2  simonb #define S_DUART_CHAN_MODE	    6
    118  1.2  simonb #define M_DUART_CHAN_MODE           _SB_MAKEMASK(2,S_DUART_CHAN_MODE)
    119  1.2  simonb #define V_DUART_CHAN_MODE(x)	    _SB_MAKEVALUE(x,S_DUART_CHAN_MODE)
    120  1.1  simonb 
    121  1.2  simonb #define K_DUART_CHAN_MODE_NORMAL    0
    122  1.2  simonb #define K_DUART_CHAN_MODE_LCL_LOOP  2
    123  1.2  simonb #define K_DUART_CHAN_MODE_REM_LOOP  3
    124  1.1  simonb 
    125  1.2  simonb #define V_DUART_CHAN_MODE_NORMAL    V_DUART_CHAN_MODE(K_DUART_CHAN_MODE_NORMAL)
    126  1.2  simonb #define V_DUART_CHAN_MODE_LCL_LOOP  V_DUART_CHAN_MODE(K_DUART_CHAN_MODE_LCL_LOOP)
    127  1.2  simonb #define V_DUART_CHAN_MODE_REM_LOOP  V_DUART_CHAN_MODE(K_DUART_CHAN_MODE_REM_LOOP)
    128  1.1  simonb 
    129  1.1  simonb /*
    130  1.1  simonb  * DUART Command Register (Table 10-5)
    131  1.1  simonb  * Register: DUART_CMD_A
    132  1.1  simonb  * Register: DUART_CMD_B
    133  1.1  simonb  */
    134  1.1  simonb 
    135  1.2  simonb #define M_DUART_RX_EN               _SB_MAKEMASK1(0)
    136  1.2  simonb #define M_DUART_RX_DIS              _SB_MAKEMASK1(1)
    137  1.2  simonb #define M_DUART_TX_EN               _SB_MAKEMASK1(2)
    138  1.2  simonb #define M_DUART_TX_DIS              _SB_MAKEMASK1(3)
    139  1.2  simonb 
    140  1.2  simonb #define S_DUART_MISC_CMD	    4
    141  1.2  simonb #define M_DUART_MISC_CMD            _SB_MAKEMASK(3,S_DUART_MISC_CMD)
    142  1.2  simonb #define V_DUART_MISC_CMD(x)         _SB_MAKEVALUE(x,S_DUART_MISC_CMD)
    143  1.2  simonb 
    144  1.2  simonb #define K_DUART_MISC_CMD_NOACTION0       0
    145  1.2  simonb #define K_DUART_MISC_CMD_NOACTION1       1
    146  1.2  simonb #define K_DUART_MISC_CMD_RESET_RX        2
    147  1.2  simonb #define K_DUART_MISC_CMD_RESET_TX        3
    148  1.2  simonb #define K_DUART_MISC_CMD_NOACTION4       4
    149  1.2  simonb #define K_DUART_MISC_CMD_RESET_BREAK_INT 5
    150  1.2  simonb #define K_DUART_MISC_CMD_START_BREAK     6
    151  1.2  simonb #define K_DUART_MISC_CMD_STOP_BREAK      7
    152  1.2  simonb 
    153  1.2  simonb #define V_DUART_MISC_CMD_NOACTION0       V_DUART_MISC_CMD(K_DUART_MISC_CMD_NOACTION0)
    154  1.2  simonb #define V_DUART_MISC_CMD_NOACTION1       V_DUART_MISC_CMD(K_DUART_MISC_CMD_NOACTION1)
    155  1.2  simonb #define V_DUART_MISC_CMD_RESET_RX        V_DUART_MISC_CMD(K_DUART_MISC_CMD_RESET_RX)
    156  1.2  simonb #define V_DUART_MISC_CMD_RESET_TX        V_DUART_MISC_CMD(K_DUART_MISC_CMD_RESET_TX)
    157  1.2  simonb #define V_DUART_MISC_CMD_NOACTION4       V_DUART_MISC_CMD(K_DUART_MISC_CMD_NOACTION4)
    158  1.2  simonb #define V_DUART_MISC_CMD_RESET_BREAK_INT V_DUART_MISC_CMD(K_DUART_MISC_CMD_RESET_BREAK_INT)
    159  1.2  simonb #define V_DUART_MISC_CMD_START_BREAK     V_DUART_MISC_CMD(K_DUART_MISC_CMD_START_BREAK)
    160  1.2  simonb #define V_DUART_MISC_CMD_STOP_BREAK      V_DUART_MISC_CMD(K_DUART_MISC_CMD_STOP_BREAK)
    161  1.1  simonb 
    162  1.2  simonb #define M_DUART_CMD_RESERVED             _SB_MAKEMASK1(7)
    163  1.1  simonb 
    164  1.1  simonb /*
    165  1.1  simonb  * DUART Status Register (Table 10-6)
    166  1.1  simonb  * Register: DUART_STATUS_A
    167  1.1  simonb  * Register: DUART_STATUS_B
    168  1.1  simonb  * READ-ONLY
    169  1.1  simonb  */
    170  1.1  simonb 
    171  1.2  simonb #define M_DUART_RX_RDY              _SB_MAKEMASK1(0)
    172  1.2  simonb #define M_DUART_RX_FFUL             _SB_MAKEMASK1(1)
    173  1.2  simonb #define M_DUART_TX_RDY              _SB_MAKEMASK1(2)
    174  1.2  simonb #define M_DUART_TX_EMT              _SB_MAKEMASK1(3)
    175  1.2  simonb #define M_DUART_OVRUN_ERR           _SB_MAKEMASK1(4)
    176  1.2  simonb #define M_DUART_PARITY_ERR          _SB_MAKEMASK1(5)
    177  1.2  simonb #define M_DUART_FRM_ERR             _SB_MAKEMASK1(6)
    178  1.2  simonb #define M_DUART_RCVD_BRK            _SB_MAKEMASK1(7)
    179  1.1  simonb 
    180  1.1  simonb /*
    181  1.1  simonb  * DUART Baud Rate Register (Table 10-7)
    182  1.2  simonb  * Register: DUART_CLK_SEL_A
    183  1.1  simonb  * Register: DUART_CLK_SEL_B
    184  1.1  simonb  */
    185  1.1  simonb 
    186  1.2  simonb #define M_DUART_CLK_COUNTER         _SB_MAKEMASK(12,0)
    187  1.2  simonb #define V_DUART_BAUD_RATE(x)        (100000000/((x)*20)-1)
    188  1.1  simonb 
    189  1.1  simonb /*
    190  1.1  simonb  * DUART Data Registers (Table 10-8 and 10-9)
    191  1.1  simonb  * Register: DUART_RX_HOLD_A
    192  1.1  simonb  * Register: DUART_RX_HOLD_B
    193  1.1  simonb  * Register: DUART_TX_HOLD_A
    194  1.1  simonb  * Register: DUART_TX_HOLD_B
    195  1.1  simonb  */
    196  1.1  simonb 
    197  1.2  simonb #define M_DUART_RX_DATA             _SB_MAKEMASK(8,0)
    198  1.2  simonb #define M_DUART_TX_DATA             _SB_MAKEMASK(8,0)
    199  1.1  simonb 
    200  1.1  simonb /*
    201  1.1  simonb  * DUART Input Port Register (Table 10-10)
    202  1.1  simonb  * Register: DUART_IN_PORT
    203  1.1  simonb  */
    204  1.1  simonb 
    205  1.2  simonb #define M_DUART_IN_PIN0_VAL         _SB_MAKEMASK1(0)
    206  1.2  simonb #define M_DUART_IN_PIN1_VAL         _SB_MAKEMASK1(1)
    207  1.2  simonb #define M_DUART_IN_PIN2_VAL         _SB_MAKEMASK1(2)
    208  1.2  simonb #define M_DUART_IN_PIN3_VAL         _SB_MAKEMASK1(3)
    209  1.2  simonb #define M_DUART_IN_PIN4_VAL         _SB_MAKEMASK1(4)
    210  1.2  simonb #define M_DUART_IN_PIN5_VAL         _SB_MAKEMASK1(5)
    211  1.2  simonb #define M_DUART_RIN0_PIN            _SB_MAKEMASK1(6)
    212  1.2  simonb #define M_DUART_RIN1_PIN            _SB_MAKEMASK1(7)
    213  1.1  simonb 
    214  1.1  simonb /*
    215  1.1  simonb  * DUART Input Port Change Status Register (Tables 10-11, 10-12, and 10-13)
    216  1.1  simonb  * Register: DUART_INPORT_CHNG
    217  1.1  simonb  */
    218  1.1  simonb 
    219  1.2  simonb #define S_DUART_IN_PIN_VAL          0
    220  1.2  simonb #define M_DUART_IN_PIN_VAL          _SB_MAKEMASK(4,S_DUART_IN_PIN_VAL)
    221  1.2  simonb 
    222  1.2  simonb #define S_DUART_IN_PIN_CHNG         4
    223  1.2  simonb #define M_DUART_IN_PIN_CHNG         _SB_MAKEMASK(4,S_DUART_IN_PIN_CHNG)
    224  1.1  simonb 
    225  1.1  simonb 
    226  1.1  simonb /*
    227  1.1  simonb  * DUART Output port control register (Table 10-14)
    228  1.1  simonb  * Register: DUART_OPCR
    229  1.1  simonb  */
    230  1.1  simonb 
    231  1.2  simonb #define M_DUART_OPCR_RESERVED0      _SB_MAKEMASK1(0)   /* must be zero */
    232  1.2  simonb #define M_DUART_OPC2_SEL            _SB_MAKEMASK1(1)
    233  1.2  simonb #define M_DUART_OPCR_RESERVED1      _SB_MAKEMASK1(2)   /* must be zero */
    234  1.2  simonb #define M_DUART_OPC3_SEL            _SB_MAKEMASK1(3)
    235  1.2  simonb #define M_DUART_OPCR_RESERVED2      _SB_MAKEMASK(4,4)  /* must be zero */
    236  1.1  simonb 
    237  1.1  simonb /*
    238  1.1  simonb  * DUART Aux Control Register (Table 10-15)
    239  1.1  simonb  * Register: DUART_AUX_CTRL
    240  1.1  simonb  */
    241  1.1  simonb 
    242  1.2  simonb #define M_DUART_IP0_CHNG_ENA        _SB_MAKEMASK1(0)
    243  1.2  simonb #define M_DUART_IP1_CHNG_ENA        _SB_MAKEMASK1(1)
    244  1.2  simonb #define M_DUART_IP2_CHNG_ENA        _SB_MAKEMASK1(2)
    245  1.2  simonb #define M_DUART_IP3_CHNG_ENA        _SB_MAKEMASK1(3)
    246  1.2  simonb #define M_DUART_ACR_RESERVED        _SB_MAKEMASK(4,4)
    247  1.2  simonb 
    248  1.2  simonb #define M_DUART_CTS_CHNG_ENA        _SB_MAKEMASK1(0)
    249  1.2  simonb #define M_DUART_CIN_CHNG_ENA        _SB_MAKEMASK1(2)
    250  1.1  simonb 
    251  1.1  simonb /*
    252  1.1  simonb  * DUART Interrupt Status Register (Table 10-16)
    253  1.1  simonb  * Register: DUART_ISR
    254  1.1  simonb  */
    255  1.1  simonb 
    256  1.2  simonb #define M_DUART_ISR_TX_A            _SB_MAKEMASK1(0)
    257  1.5     cgd 
    258  1.5     cgd #define S_DUART_ISR_RX_A            1
    259  1.5     cgd #define M_DUART_ISR_RX_A            _SB_MAKEMASK1(S_DUART_ISR_RX_A)
    260  1.5     cgd #define V_DUART_ISR_RX_A(x)         _SB_MAKEVALUE(x,S_DUART_ISR_RX_A)
    261  1.5     cgd #define G_DUART_ISR_RX_A(x)         _SB_GETVALUE(x,S_DUART_ISR_RX_A,M_DUART_ISR_RX_A)
    262  1.5     cgd 
    263  1.2  simonb #define M_DUART_ISR_BRK_A           _SB_MAKEMASK1(2)
    264  1.2  simonb #define M_DUART_ISR_IN_A            _SB_MAKEMASK1(3)
    265  1.2  simonb #define M_DUART_ISR_TX_B            _SB_MAKEMASK1(4)
    266  1.2  simonb #define M_DUART_ISR_RX_B            _SB_MAKEMASK1(5)
    267  1.2  simonb #define M_DUART_ISR_BRK_B           _SB_MAKEMASK1(6)
    268  1.2  simonb #define M_DUART_ISR_IN_B            _SB_MAKEMASK1(7)
    269  1.1  simonb 
    270  1.1  simonb /*
    271  1.1  simonb  * DUART Channel A Interrupt Status Register (Table 10-17)
    272  1.1  simonb  * DUART Channel B Interrupt Status Register (Table 10-18)
    273  1.1  simonb  * Register: DUART_ISR_A
    274  1.1  simonb  * Register: DUART_ISR_B
    275  1.1  simonb  */
    276  1.1  simonb 
    277  1.2  simonb #define M_DUART_ISR_TX              _SB_MAKEMASK1(0)
    278  1.2  simonb #define M_DUART_ISR_RX              _SB_MAKEMASK1(1)
    279  1.2  simonb #define M_DUART_ISR_BRK             _SB_MAKEMASK1(2)
    280  1.2  simonb #define M_DUART_ISR_IN              _SB_MAKEMASK1(3)
    281  1.2  simonb #define M_DUART_ISR_RESERVED        _SB_MAKEMASK(4,4)
    282  1.1  simonb 
    283  1.1  simonb /*
    284  1.1  simonb  * DUART Interrupt Mask Register (Table 10-19)
    285  1.1  simonb  * Register: DUART_IMR
    286  1.1  simonb  */
    287  1.1  simonb 
    288  1.2  simonb #define M_DUART_IMR_TX_A            _SB_MAKEMASK1(0)
    289  1.2  simonb #define M_DUART_IMR_RX_A            _SB_MAKEMASK1(1)
    290  1.2  simonb #define M_DUART_IMR_BRK_A           _SB_MAKEMASK1(2)
    291  1.2  simonb #define M_DUART_IMR_IN_A            _SB_MAKEMASK1(3)
    292  1.2  simonb #define M_DUART_IMR_ALL_A	    _SB_MAKEMASK(4,0)
    293  1.2  simonb 
    294  1.2  simonb #define M_DUART_IMR_TX_B            _SB_MAKEMASK1(4)
    295  1.2  simonb #define M_DUART_IMR_RX_B            _SB_MAKEMASK1(5)
    296  1.2  simonb #define M_DUART_IMR_BRK_B           _SB_MAKEMASK1(6)
    297  1.2  simonb #define M_DUART_IMR_IN_B            _SB_MAKEMASK1(7)
    298  1.2  simonb #define M_DUART_IMR_ALL_B           _SB_MAKEMASK(4,4)
    299  1.1  simonb 
    300  1.1  simonb /*
    301  1.1  simonb  * DUART Channel A Interrupt Mask Register (Table 10-20)
    302  1.1  simonb  * DUART Channel B Interrupt Mask Register (Table 10-21)
    303  1.1  simonb  * Register: DUART_IMR_A
    304  1.1  simonb  * Register: DUART_IMR_B
    305  1.1  simonb  */
    306  1.1  simonb 
    307  1.2  simonb #define M_DUART_IMR_TX              _SB_MAKEMASK1(0)
    308  1.2  simonb #define M_DUART_IMR_RX              _SB_MAKEMASK1(1)
    309  1.2  simonb #define M_DUART_IMR_BRK             _SB_MAKEMASK1(2)
    310  1.2  simonb #define M_DUART_IMR_IN              _SB_MAKEMASK1(3)
    311  1.2  simonb #define M_DUART_IMR_ALL		    _SB_MAKEMASK(4,0)
    312  1.2  simonb #define M_DUART_IMR_RESERVED        _SB_MAKEMASK(4,4)
    313  1.1  simonb 
    314  1.1  simonb 
    315  1.1  simonb /*
    316  1.1  simonb  * DUART Output Port Set Register (Table 10-22)
    317  1.1  simonb  * Register: DUART_SET_OPR
    318  1.1  simonb  */
    319  1.1  simonb 
    320  1.2  simonb #define M_DUART_SET_OPR0            _SB_MAKEMASK1(0)
    321  1.2  simonb #define M_DUART_SET_OPR1            _SB_MAKEMASK1(1)
    322  1.2  simonb #define M_DUART_SET_OPR2            _SB_MAKEMASK1(2)
    323  1.2  simonb #define M_DUART_SET_OPR3            _SB_MAKEMASK1(3)
    324  1.2  simonb #define M_DUART_OPSR_RESERVED       _SB_MAKEMASK(4,4)
    325  1.1  simonb 
    326  1.1  simonb /*
    327  1.1  simonb  * DUART Output Port Clear Register (Table 10-23)
    328  1.1  simonb  * Register: DUART_CLEAR_OPR
    329  1.1  simonb  */
    330  1.1  simonb 
    331  1.2  simonb #define M_DUART_CLR_OPR0            _SB_MAKEMASK1(0)
    332  1.2  simonb #define M_DUART_CLR_OPR1            _SB_MAKEMASK1(1)
    333  1.2  simonb #define M_DUART_CLR_OPR2            _SB_MAKEMASK1(2)
    334  1.2  simonb #define M_DUART_CLR_OPR3            _SB_MAKEMASK1(3)
    335  1.2  simonb #define M_DUART_OPCR_RESERVED       _SB_MAKEMASK(4,4)
    336  1.1  simonb 
    337  1.1  simonb /*
    338  1.1  simonb  * DUART Output Port RTS Register (Table 10-24)
    339  1.1  simonb  * Register: DUART_OUT_PORT
    340  1.1  simonb  */
    341  1.1  simonb 
    342  1.2  simonb #define M_DUART_OUT_PIN_SET0        _SB_MAKEMASK1(0)
    343  1.2  simonb #define M_DUART_OUT_PIN_SET1        _SB_MAKEMASK1(1)
    344  1.2  simonb #define M_DUART_OUT_PIN_CLR0        _SB_MAKEMASK1(2)
    345  1.2  simonb #define M_DUART_OUT_PIN_CLR1        _SB_MAKEMASK1(3)
    346  1.2  simonb #define M_DUART_OPRR_RESERVED       _SB_MAKEMASK(4,4)
    347  1.1  simonb 
    348  1.2  simonb #define M_DUART_OUT_PIN_SET(chan) \
    349  1.1  simonb     (chan == 0 ? M_DUART_OUT_PIN_SET0 : M_DUART_OUT_PIN_SET1)
    350  1.2  simonb #define M_DUART_OUT_PIN_CLR(chan) \
    351  1.1  simonb     (chan == 0 ? M_DUART_OUT_PIN_CLR0 : M_DUART_OUT_PIN_CLR1)
    352  1.1  simonb 
    353  1.6  simonb #if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) || SIBYTE_HDR_FEATURE_CHIP(1480)
    354  1.2  simonb /*
    355  1.3     cgd  * Full Interrupt Control Register
    356  1.1  simonb  */
    357  1.2  simonb 
    358  1.2  simonb #define S_DUART_SIG_FULL           _SB_MAKE64(0)
    359  1.2  simonb #define M_DUART_SIG_FULL           _SB_MAKEMASK(4,S_DUART_SIG_FULL)
    360  1.2  simonb #define V_DUART_SIG_FULL(x)        _SB_MAKEVALUE(x,S_DUART_SIG_FULL)
    361  1.2  simonb #define G_DUART_SIG_FULL(x)        _SB_GETVALUE(x,S_DUART_SIG_FULL,M_DUART_SIG_FULL)
    362  1.2  simonb 
    363  1.2  simonb #define S_DUART_INT_TIME           _SB_MAKE64(4)
    364  1.2  simonb #define M_DUART_INT_TIME           _SB_MAKEMASK(4,S_DUART_INT_TIME)
    365  1.2  simonb #define V_DUART_INT_TIME(x)        _SB_MAKEVALUE(x,S_DUART_INT_TIME)
    366  1.2  simonb #define G_DUART_INT_TIME(x)        _SB_GETVALUE(x,S_DUART_INT_TIME,M_DUART_INT_TIME)
    367  1.6  simonb #endif /* 1250 PASS2 || 112x PASS1 || 1480 */
    368  1.2  simonb 
    369  1.1  simonb 
    370  1.1  simonb /* ********************************************************************** */
    371  1.1  simonb 
    372  1.1  simonb 
    373  1.1  simonb #endif
    374