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sb1250_uart.h revision 1.1.10.2
      1 /*  *********************************************************************
      2     *  SB1250 Board Support Package
      3     *
      4     *  UART Constants				File: sb1250_uart.h
      5     *
      6     *  This module contains constants and macros useful for
      7     *  manipulating the SB1250's UARTs
      8     *
      9     *  SB1250 specification level:  0.2
     10     *
     11     *  Author:  Mitch Lichtenberg (mitch (at) sibyte.com)
     12     *
     13     *********************************************************************
     14     *
     15     *  Copyright 2000,2001
     16     *  Broadcom Corporation. All rights reserved.
     17     *
     18     *  This software is furnished under license and may be used and
     19     *  copied only in accordance with the following terms and
     20     *  conditions.  Subject to these conditions, you may download,
     21     *  copy, install, use, modify and distribute modified or unmodified
     22     *  copies of this software in source and/or binary form.  No title
     23     *  or ownership is transferred hereby.
     24     *
     25     *  1) Any source code used, modified or distributed must reproduce
     26     *     and retain this copyright notice and list of conditions as
     27     *     they appear in the source file.
     28     *
     29     *  2) No right is granted to use any trade name, trademark, or
     30     *     logo of Broadcom Corporation. Neither the "Broadcom
     31     *     Corporation" name nor any trademark or logo of Broadcom
     32     *     Corporation may be used to endorse or promote products
     33     *     derived from this software without the prior written
     34     *     permission of Broadcom Corporation.
     35     *
     36     *  3) THIS SOFTWARE IS PROVIDED "AS-IS" AND ANY EXPRESS OR
     37     *     IMPLIED WARRANTIES, INCLUDING BUT NOT LIMITED TO, ANY IMPLIED
     38     *     WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
     39     *     PURPOSE, OR NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT
     40     *     SHALL BROADCOM BE LIABLE FOR ANY DAMAGES WHATSOEVER, AND IN
     41     *     PARTICULAR, BROADCOM SHALL NOT BE LIABLE FOR DIRECT, INDIRECT,
     42     *     INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
     43     *     (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
     44     *     GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
     45     *     BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
     46     *     OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
     47     *     TORT (INCLUDING NEGLIGENCE OR OTHERWISE), EVEN IF ADVISED OF
     48     *     THE POSSIBILITY OF SUCH DAMAGE.
     49     ********************************************************************* */
     50 
     51 
     52 #ifndef _SB1250_UART_H
     53 #define	_SB1250_UART_H
     54 
     55 #include "sb1250_defs.h"
     56 
     57 /* **********************************************************************
     58    * DUART Registers
     59    ********************************************************************** */
     60 
     61 /*
     62  * DUART Mode Register #1 (Table 10-3)
     63  * Register: DUART_MODE_REG_1_A
     64  * Register: DUART_MODE_REG_1_B
     65  */
     66 
     67 #define	S_DUART_BITS_PER_CHAR       0
     68 #define	M_DUART_BITS_PER_CHAR       _SB_MAKEMASK(2,S_DUART_BITS_PER_CHAR)
     69 #define	V_DUART_BITS_PER_CHAR(x)    _SB_MAKEVALUE(x,S_DUART_BITS_PER_CHAR)
     70 
     71 #define	K_DUART_BITS_PER_CHAR_RSV0  0
     72 #define	K_DUART_BITS_PER_CHAR_RSV1  1
     73 #define	K_DUART_BITS_PER_CHAR_7     2
     74 #define	K_DUART_BITS_PER_CHAR_8     3
     75 
     76 #define	V_DUART_BITS_PER_CHAR_RSV0  V_DUART_BITS_PER_CHAR(K_DUART_BITS_PER_CHAR_RSV0)
     77 #define	V_DUART_BITS_PER_CHAR_RSV1  V_DUART_BITS_PER_CHAR(K_DUART_BITS_PER_CHAR_RSV1)
     78 #define	V_DUART_BITS_PER_CHAR_7     V_DUART_BITS_PER_CHAR(K_DUART_BITS_PER_CHAR_7)
     79 #define	V_DUART_BITS_PER_CHAR_8     V_DUART_BITS_PER_CHAR(K_DUART_BITS_PER_CHAR_8)
     80 
     81 
     82 #define	M_DUART_PARITY_TYPE_EVEN    0x00
     83 #define	M_DUART_PARITY_TYPE_ODD     _SB_MAKEMASK1(3)
     84 
     85 #define	S_DUART_PARITY_MODE          3
     86 #define	M_DUART_PARITY_MODE         _SB_MAKEMASK(2,S_DUART_PARITY_MODE)
     87 #define	V_DUART_PARITY_MODE(x)      _SB_MAKEVALUE(x,S_DUART_PARITY_MODE)
     88 
     89 #define	K_DUART_PARITY_MODE_ADD       0
     90 #define	K_DUART_PARITY_MODE_ADD_FIXED 1
     91 #define	K_DUART_PARITY_MODE_NONE      2
     92 
     93 #define	V_DUART_PARITY_MODE_ADD       V_DUART_PARITY_MODE(K_DUART_PARITY_MODE_ADD)
     94 #define	V_DUART_PARITY_MODE_ADD_FIXED V_DUART_PARITY_MODE(K_DUART_PARITY_MODE_ADD_FIXED)
     95 #define	V_DUART_PARITY_MODE_NONE      V_DUART_PARITY_MODE(K_DUART_PARITY_MODE_NONE)
     96 
     97 #define	M_DUART_ERR_MODE            _SB_MAKEMASK1(5)    /* must be zero */
     98 
     99 #define	M_DUART_RX_IRQ_SEL_RXRDY    0
    100 #define	M_DUART_RX_IRQ_SEL_RXFULL   _SB_MAKEMASK1(6)
    101 
    102 #define	M_DUART_RX_RTS_ENA          _SB_MAKEMASK1(7)
    103 
    104 /*
    105  * DUART Mode Register #2 (Table 10-4)
    106  * Register: DUART_MODE_REG_2_A
    107  * Register: DUART_MODE_REG_2_B
    108  */
    109 
    110 #define	M_DUART_MODE_RESERVED1      _SB_MAKEMASK(3,0)   /* ignored */
    111 
    112 #define	M_DUART_STOP_BIT_LEN_2      _SB_MAKEMASK1(3)
    113 #define	M_DUART_STOP_BIT_LEN_1      0
    114 
    115 #define	M_DUART_TX_CTS_ENA          _SB_MAKEMASK1(4)
    116 
    117 #define	M_DUART_MODE_RESERVED2      _SB_MAKEMASK1(5)    /* must be zero */
    118 
    119 #define	S_DUART_CHAN_MODE	    6
    120 #define	M_DUART_CHAN_MODE           _SB_MAKEMASK(2,S_DUART_CHAN_MODE)
    121 #define	V_DUART_CHAN_MODE(x)	    _SB_MAKEVALUE(x,S_DUART_CHAN_MODE)
    122 
    123 #define	K_DUART_CHAN_MODE_NORMAL    0
    124 #define	K_DUART_CHAN_MODE_LCL_LOOP  2
    125 #define	K_DUART_CHAN_MODE_REM_LOOP  3
    126 
    127 #define	V_DUART_CHAN_MODE_NORMAL    V_DUART_CHAN_MODE(K_DUART_CHAN_MODE_NORMAL)
    128 #define	V_DUART_CHAN_MODE_LCL_LOOP  V_DUART_CHAN_MODE(K_DUART_CHAN_MODE_LCL_LOOP)
    129 #define	V_DUART_CHAN_MODE_REM_LOOP  V_DUART_CHAN_MODE(K_DUART_CHAN_MODE_REM_LOOP)
    130 
    131 /*
    132  * DUART Command Register (Table 10-5)
    133  * Register: DUART_CMD_A
    134  * Register: DUART_CMD_B
    135  */
    136 
    137 #define	M_DUART_RX_EN               _SB_MAKEMASK1(0)
    138 #define	M_DUART_RX_DIS              _SB_MAKEMASK1(1)
    139 #define	M_DUART_TX_EN               _SB_MAKEMASK1(2)
    140 #define	M_DUART_TX_DIS              _SB_MAKEMASK1(3)
    141 
    142 #define	S_DUART_MISC_CMD	    4
    143 #define	M_DUART_MISC_CMD            _SB_MAKEMASK(3,S_DUART_MISC_CMD)
    144 #define	V_DUART_MISC_CMD(x)         _SB_MAKEVALUE(x,S_DUART_MISC_CMD)
    145 
    146 #define	K_DUART_MISC_CMD_NOACTION0       0
    147 #define	K_DUART_MISC_CMD_NOACTION1       1
    148 #define	K_DUART_MISC_CMD_RESET_RX        2
    149 #define	K_DUART_MISC_CMD_RESET_TX        3
    150 #define	K_DUART_MISC_CMD_NOACTION4       4
    151 #define	K_DUART_MISC_CMD_RESET_BREAK_INT 5
    152 #define	K_DUART_MISC_CMD_START_BREAK     6
    153 #define	K_DUART_MISC_CMD_STOP_BREAK      7
    154 
    155 #define	V_DUART_MISC_CMD_NOACTION0       V_DUART_MISC_CMD(K_DUART_MISC_CMD_NOACTION0)
    156 #define	V_DUART_MISC_CMD_NOACTION1       V_DUART_MISC_CMD(K_DUART_MISC_CMD_NOACTION1)
    157 #define	V_DUART_MISC_CMD_RESET_RX        V_DUART_MISC_CMD(K_DUART_MISC_CMD_RESET_RX)
    158 #define	V_DUART_MISC_CMD_RESET_TX        V_DUART_MISC_CMD(K_DUART_MISC_CMD_RESET_TX)
    159 #define	V_DUART_MISC_CMD_NOACTION4       V_DUART_MISC_CMD(K_DUART_MISC_CMD_NOACTION4)
    160 #define	V_DUART_MISC_CMD_RESET_BREAK_INT V_DUART_MISC_CMD(K_DUART_MISC_CMD_RESET_BREAK_INT)
    161 #define	V_DUART_MISC_CMD_START_BREAK     V_DUART_MISC_CMD(K_DUART_MISC_CMD_START_BREAK)
    162 #define	V_DUART_MISC_CMD_STOP_BREAK      V_DUART_MISC_CMD(K_DUART_MISC_CMD_STOP_BREAK)
    163 
    164 #define	M_DUART_CMD_RESERVED             _SB_MAKEMASK1(7)
    165 
    166 /*
    167  * DUART Status Register (Table 10-6)
    168  * Register: DUART_STATUS_A
    169  * Register: DUART_STATUS_B
    170  * READ-ONLY
    171  */
    172 
    173 #define	M_DUART_RX_RDY              _SB_MAKEMASK1(0)
    174 #define	M_DUART_RX_FFUL             _SB_MAKEMASK1(1)
    175 #define	M_DUART_TX_RDY              _SB_MAKEMASK1(2)
    176 #define	M_DUART_TX_EMT              _SB_MAKEMASK1(3)
    177 #define	M_DUART_OVRUN_ERR           _SB_MAKEMASK1(4)
    178 #define	M_DUART_PARITY_ERR          _SB_MAKEMASK1(5)
    179 #define	M_DUART_FRM_ERR             _SB_MAKEMASK1(6)
    180 #define	M_DUART_RCVD_BRK            _SB_MAKEMASK1(7)
    181 
    182 /*
    183  * DUART Baud Rate Register (Table 10-7)
    184  * Register: DUART_CLK_SEL_A
    185  * Register: DUART_CLK_SEL_B
    186  */
    187 
    188 #define	M_DUART_CLK_COUNTER         _SB_MAKEMASK(12,0)
    189 #define	V_DUART_BAUD_RATE(x)        (100000000/((x)*20)-1)
    190 
    191 /*
    192  * DUART Data Registers (Table 10-8 and 10-9)
    193  * Register: DUART_RX_HOLD_A
    194  * Register: DUART_RX_HOLD_B
    195  * Register: DUART_TX_HOLD_A
    196  * Register: DUART_TX_HOLD_B
    197  */
    198 
    199 #define	M_DUART_RX_DATA             _SB_MAKEMASK(8,0)
    200 #define	M_DUART_TX_DATA             _SB_MAKEMASK(8,0)
    201 
    202 /*
    203  * DUART Input Port Register (Table 10-10)
    204  * Register: DUART_IN_PORT
    205  */
    206 
    207 #define	M_DUART_IN_PIN0_VAL         _SB_MAKEMASK1(0)
    208 #define	M_DUART_IN_PIN1_VAL         _SB_MAKEMASK1(1)
    209 #define	M_DUART_IN_PIN2_VAL         _SB_MAKEMASK1(2)
    210 #define	M_DUART_IN_PIN3_VAL         _SB_MAKEMASK1(3)
    211 #define	M_DUART_IN_PIN4_VAL         _SB_MAKEMASK1(4)
    212 #define	M_DUART_IN_PIN5_VAL         _SB_MAKEMASK1(5)
    213 #define	M_DUART_RIN0_PIN            _SB_MAKEMASK1(6)
    214 #define	M_DUART_RIN1_PIN            _SB_MAKEMASK1(7)
    215 
    216 /*
    217  * DUART Input Port Change Status Register (Tables 10-11, 10-12, and 10-13)
    218  * Register: DUART_INPORT_CHNG
    219  */
    220 
    221 #define	S_DUART_IN_PIN_VAL          0
    222 #define	M_DUART_IN_PIN_VAL          _SB_MAKEMASK(4,S_DUART_IN_PIN_VAL)
    223 
    224 #define	S_DUART_IN_PIN_CHNG         4
    225 #define	M_DUART_IN_PIN_CHNG         _SB_MAKEMASK(4,S_DUART_IN_PIN_CHNG)
    226 
    227 /*
    228  * DUART Output port control register (Table 10-14)
    229  * Register: DUART_OPCR
    230  */
    231 
    232 #define	M_DUART_OPCR_RESERVED0      _SB_MAKEMASK1(0)   /* must be zero */
    233 #define	M_DUART_OPC2_SEL            _SB_MAKEMASK1(1)
    234 #define	M_DUART_OPCR_RESERVED1      _SB_MAKEMASK1(2)   /* must be zero */
    235 #define	M_DUART_OPC3_SEL            _SB_MAKEMASK1(3)
    236 #define	M_DUART_OPCR_RESERVED2      _SB_MAKEMASK(4,4)  /* must be zero */
    237 
    238 /*
    239  * DUART Aux Control Register (Table 10-15)
    240  * Register: DUART_AUX_CTRL
    241  */
    242 
    243 #define	M_DUART_IP0_CHNG_ENA        _SB_MAKEMASK1(0)
    244 #define	M_DUART_IP1_CHNG_ENA        _SB_MAKEMASK1(1)
    245 #define	M_DUART_IP2_CHNG_ENA        _SB_MAKEMASK1(2)
    246 #define	M_DUART_IP3_CHNG_ENA        _SB_MAKEMASK1(3)
    247 #define	M_DUART_ACR_RESERVED        _SB_MAKEMASK(4,4)
    248 
    249 /*
    250  * DUART Interrupt Status Register (Table 10-16)
    251  * Register: DUART_ISR
    252  */
    253 
    254 #define	M_DUART_ISR_TX_A            _SB_MAKEMASK1(0)
    255 #define	M_DUART_ISR_RX_A            _SB_MAKEMASK1(1)
    256 #define	M_DUART_ISR_BRK_A           _SB_MAKEMASK1(2)
    257 #define	M_DUART_ISR_IN_A            _SB_MAKEMASK1(3)
    258 #define	M_DUART_ISR_TX_B            _SB_MAKEMASK1(4)
    259 #define	M_DUART_ISR_RX_B            _SB_MAKEMASK1(5)
    260 #define	M_DUART_ISR_BRK_B           _SB_MAKEMASK1(6)
    261 #define	M_DUART_ISR_IN_B            _SB_MAKEMASK1(7)
    262 
    263 /*
    264  * DUART Channel A Interrupt Status Register (Table 10-17)
    265  * DUART Channel B Interrupt Status Register (Table 10-18)
    266  * Register: DUART_ISR_A
    267  * Register: DUART_ISR_B
    268  */
    269 
    270 #define	M_DUART_ISR_TX              _SB_MAKEMASK1(0)
    271 #define	M_DUART_ISR_RX              _SB_MAKEMASK1(1)
    272 #define	M_DUART_ISR_BRK             _SB_MAKEMASK1(2)
    273 #define	M_DUART_ISR_IN              _SB_MAKEMASK1(3)
    274 #define	M_DUART_ISR_RESERVED        _SB_MAKEMASK(4,4)
    275 
    276 /*
    277  * DUART Interrupt Mask Register (Table 10-19)
    278  * Register: DUART_IMR
    279  */
    280 
    281 #define	M_DUART_IMR_TX_A            _SB_MAKEMASK1(0)
    282 #define	M_DUART_IMR_RX_A            _SB_MAKEMASK1(1)
    283 #define	M_DUART_IMR_BRK_A           _SB_MAKEMASK1(2)
    284 #define	M_DUART_IMR_IN_A            _SB_MAKEMASK1(3)
    285 #define	M_DUART_IMR_ALL_A	    _SB_MAKEMASK(4,0)
    286 
    287 #define	M_DUART_IMR_TX_B            _SB_MAKEMASK1(4)
    288 #define	M_DUART_IMR_RX_B            _SB_MAKEMASK1(5)
    289 #define	M_DUART_IMR_BRK_B           _SB_MAKEMASK1(6)
    290 #define	M_DUART_IMR_IN_B            _SB_MAKEMASK1(7)
    291 #define	M_DUART_IMR_ALL_B           _SB_MAKEMASK(4,4)
    292 
    293 /*
    294  * DUART Channel A Interrupt Mask Register (Table 10-20)
    295  * DUART Channel B Interrupt Mask Register (Table 10-21)
    296  * Register: DUART_IMR_A
    297  * Register: DUART_IMR_B
    298  */
    299 
    300 #define	M_DUART_IMR_TX              _SB_MAKEMASK1(0)
    301 #define	M_DUART_IMR_RX              _SB_MAKEMASK1(1)
    302 #define	M_DUART_IMR_BRK             _SB_MAKEMASK1(2)
    303 #define	M_DUART_IMR_IN              _SB_MAKEMASK1(3)
    304 #define	M_DUART_IMR_ALL		    _SB_MAKEMASK(4,0)
    305 #define	M_DUART_IMR_RESERVED        _SB_MAKEMASK(4,4)
    306 
    307 
    308 /*
    309  * DUART Output Port Set Register (Table 10-22)
    310  * Register: DUART_SET_OPR
    311  */
    312 
    313 #define	M_DUART_SET_OPR0            _SB_MAKEMASK1(0)
    314 #define	M_DUART_SET_OPR1            _SB_MAKEMASK1(1)
    315 #define	M_DUART_SET_OPR2            _SB_MAKEMASK1(2)
    316 #define	M_DUART_SET_OPR3            _SB_MAKEMASK1(3)
    317 #define	M_DUART_OPSR_RESERVED       _SB_MAKEMASK(4,4)
    318 
    319 /*
    320  * DUART Output Port Clear Register (Table 10-23)
    321  * Register: DUART_CLEAR_OPR
    322  */
    323 
    324 #define	M_DUART_CLR_OPR0            _SB_MAKEMASK1(0)
    325 #define	M_DUART_CLR_OPR1            _SB_MAKEMASK1(1)
    326 #define	M_DUART_CLR_OPR2            _SB_MAKEMASK1(2)
    327 #define	M_DUART_CLR_OPR3            _SB_MAKEMASK1(3)
    328 #define	M_DUART_OPCR_RESERVED       _SB_MAKEMASK(4,4)
    329 
    330 /*
    331  * DUART Output Port RTS Register (Table 10-24)
    332  * Register: DUART_OUT_PORT
    333  */
    334 
    335 #define	M_DUART_OUT_PIN_SET0        _SB_MAKEMASK1(0)
    336 #define	M_DUART_OUT_PIN_SET1        _SB_MAKEMASK1(1)
    337 #define	M_DUART_OUT_PIN_CLR0        _SB_MAKEMASK1(2)
    338 #define	M_DUART_OUT_PIN_CLR1        _SB_MAKEMASK1(3)
    339 #define	M_DUART_OPRR_RESERVED       _SB_MAKEMASK(4,4)
    340 
    341 #define	M_DUART_OUT_PIN_SET(chan) \
    342     (chan == 0 ? M_DUART_OUT_PIN_SET0 : M_DUART_OUT_PIN_SET1)
    343 #define	M_DUART_OUT_PIN_CLR(chan) \
    344     (chan == 0 ? M_DUART_OUT_PIN_CLR0 : M_DUART_OUT_PIN_CLR1)
    345 
    346 /*
    347  * XXX To be added: Synchronous Serial definitions
    348  */
    349 
    350 /* ********************************************************************** */
    351 
    352 
    353 #endif
    354