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      1 /*	$NetBSD: mainboard.h,v 1.5 2024/07/05 17:32:52 andvar Exp $	*/
      2 
      3 /*
      4  * Copyright (c) 2000 The NetBSD Foundation, Inc.
      5  * All rights reserved.
      6  *
      7  * This code is derived from software contributed to The NetBSD Foundation
      8  * by Wayne Knowles
      9  *
     10  * Redistribution and use in source and binary forms, with or without
     11  * modification, are permitted provided that the following conditions
     12  * are met:
     13  * 1. Redistributions of source code must retain the above copyright
     14  *    notice, this list of conditions and the following disclaimer.
     15  * 2. Redistributions in binary form must reproduce the above copyright
     16  *    notice, this list of conditions and the following disclaimer in the
     17  *    documentation and/or other materials provided with the distribution.
     18  *
     19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     29  * POSSIBILITY OF SUCH DAMAGE.
     30  */
     31 
     32 /*
     33  *
     34  * Define all hardware address map.
     35  */
     36 
     37 #ifndef _MACHINE_MAINBOARD_H_
     38 #define	_MACHINE_MAINBOARD_H_	1
     39 
     40 /*----------------------------------------------------------------------
     41  */
     42 #define TOD_BASE        0xbd000000
     43 #define	RTC_PORT	    0x1fe3
     44 #define	DATA_PORT	    0x1fe7
     45 
     46 #define RAMBO_BASE      0xbc000000 /* Base address for RAMBO DMA */
     47 
     48 #define RAMBO_TCOUNT    (RAMBO_BASE+0xc00) /* Timer count register */
     49 #define RAMBO_TBREAK    (RAMBO_BASE+0xd00) /* Timer break register */
     50 #define RAMBO_ERREG	(RAMBO_BASE+0xe00) /* Machine error register */
     51 #define RAMBO_CTL       (RAMBO_BASE+0xf00) /* Machine control register */
     52 
     53 #define	LANCE_PORT	0xba000000
     54 #define	ETHER_ID	0xbd000000
     55 
     56 #define ZS0_ADDR        0xbb000000
     57 
     58 #define INTREG_0        0xb9800003         /* Interrupt 0 status register  */
     59 #define    INT_CEB      0x80	           /* Modem call indicator */
     60 #define    INT_DSRB     0x40               /* Data Set Ready */
     61 #define    INT_DRSInB   0x20               /* Data Rate Select (in) */
     62 #define    INT_Lance    0x10               /* Lance Ethernet */
     63 #define    INT_NCR      0x08               /* NCR 53c94 SCSI */
     64 #define    INT_SCC      0x04               /* Z8530 SCC */
     65 #define    INT_Kbd      0x02               /* Keyboard controller */
     66 #define    INT_ExpSlot  0x01               /* Expansion Slot */
     67 
     68 #define PIZAZZ_ISA_IOBASE	0x10000000 /* ISA Bus I/O */
     69 #define PIZAZZ_ISA_IOSIZE	0x00040000 /* 64k -> 256k */
     70 #define PIZAZZ_ISA_MEMBASE	0x14000000 /* ISA Bus Memory */
     71 #define PIZAZZ_ISA_MEMSIZE	0x00100000 /* 16MB -> 64MB */
     72 #define PIZAZZ_ISA_INTRLATCH	0x10400000 /* Interrupt Latch */
     73 
     74 #endif /* _MACHINE_MAINBOARD_H_ */
     75