Home | History | Annotate | Line # | Download | only in include
mainboard.h revision 1.1
      1  1.1  wdk /*	$NetBSD: mainboard.h,v 1.1 2000/08/12 22:58:28 wdk Exp $	*/
      2  1.1  wdk 
      3  1.1  wdk /*
      4  1.1  wdk  * Copyright (c) 2000 The NetBSD Foundation, Inc.
      5  1.1  wdk  * All rights reserved.
      6  1.1  wdk  *
      7  1.1  wdk  * This code is derived from software contributed to The NetBSD Foundation
      8  1.1  wdk  * by Wayne Knowles
      9  1.1  wdk  *
     10  1.1  wdk  * Redistribution and use in source and binary forms, with or without
     11  1.1  wdk  * modification, are permitted provided that the following conditions
     12  1.1  wdk  * are met:
     13  1.1  wdk  * 1. Redistributions of source code must retain the above copyright
     14  1.1  wdk  *    notice, this list of conditions and the following disclaimer.
     15  1.1  wdk  * 2. Redistributions in binary form must reproduce the above copyright
     16  1.1  wdk  *    notice, this list of conditions and the following disclaimer in the
     17  1.1  wdk  *    documentation and/or other materials provided with the distribution.
     18  1.1  wdk  * 3. All advertising materials mentioning features or use of this software
     19  1.1  wdk  *    must display the following acknowledgement:
     20  1.1  wdk  *        This product includes software developed by the NetBSD
     21  1.1  wdk  *        Foundation, Inc. and its contributors.
     22  1.1  wdk  * 4. Neither the name of The NetBSD Foundation nor the names of its
     23  1.1  wdk  *    contributors may be used to endorse or promote products derived
     24  1.1  wdk  *    from this software without specific prior written permission.
     25  1.1  wdk  *
     26  1.1  wdk  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     27  1.1  wdk  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     28  1.1  wdk  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     29  1.1  wdk  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     30  1.1  wdk  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     31  1.1  wdk  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     32  1.1  wdk  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     33  1.1  wdk  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     34  1.1  wdk  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     35  1.1  wdk  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     36  1.1  wdk  * POSSIBILITY OF SUCH DAMAGE.
     37  1.1  wdk  */
     38  1.1  wdk 
     39  1.1  wdk /*
     40  1.1  wdk  *
     41  1.1  wdk  * Define all hardware address map.
     42  1.1  wdk  */
     43  1.1  wdk 
     44  1.1  wdk #ifndef _MACHINE_MAINBOARD_H_
     45  1.1  wdk #define	_MACHINE_MAINBOARD_H_	1
     46  1.1  wdk 
     47  1.1  wdk /*----------------------------------------------------------------------
     48  1.1  wdk  */
     49  1.1  wdk #define TOD_BASE        0xbd000000
     50  1.1  wdk #define	RTC_PORT	    0x1fe3
     51  1.1  wdk #define	DATA_PORT	    0x1fe7
     52  1.1  wdk 
     53  1.1  wdk #define RAMBO_BASE      0xbc000000 /* Base address for RAMBO DMA */
     54  1.1  wdk 
     55  1.1  wdk #define RAMBO_TCOUNT    (RAMBO_BASE+0xc00) /* Timer count register */
     56  1.1  wdk #define RAMBO_TBREAK    (RAMBO_BASE+0xd00) /* Timner break register */
     57  1.1  wdk #define RAMBO_CTL       (RAMBO_BASE+0xf00) /* Machine control register */
     58  1.1  wdk 
     59  1.1  wdk #define	LANCE_PORT	0xba000000
     60  1.1  wdk #define	ETHER_ID	0xbd000000
     61  1.1  wdk 
     62  1.1  wdk #define ZS0_ADDR        0xbb000000
     63  1.1  wdk 
     64  1.1  wdk #define INTREG_0        0xb9800003         /* Interrupt 0 status register  */
     65  1.1  wdk #define    INT_CEB      0x80	           /* Modem call indicator */
     66  1.1  wdk #define    INT_DSRB     0x40               /* Data Set Ready */
     67  1.1  wdk #define    INT_DRSInB   0x20               /* Data Rate Select (in) */
     68  1.1  wdk #define    INT_Lance    0x10               /* Lance Ethernet */
     69  1.1  wdk #define    INT_NCR      0x08               /* NCR 53c94 SCSI */
     70  1.1  wdk #define    INT_SCC      0x04               /* Z8530 SCC */
     71  1.1  wdk #define    INT_Kbd      0x02               /* Keyboard controller */
     72  1.1  wdk #define    INT_ExpSlot  0x01               /* Expansion Slot */
     73  1.1  wdk 
     74  1.1  wdk #endif /* _MACHINE_MAINBOARD_H_ */
     75