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      1 /*	$NetBSD: wdvar.h,v 1.1 2011/03/03 05:59:37 kiyohara Exp $	*/
      2 
      3 /*-
      4  * Copyright (c) 2003 The NetBSD Foundation, Inc.
      5  * Copyright (c) 2001 Dynarc AB, Sweden. All rights reserved.
      6  *
      7  * This code is derived from software written by Anders Magnusson,
      8  * ragge (at) ludd.luth.se
      9  *
     10  * Redistribution and use in source and binary forms, with or without
     11  * modification, are permitted provided that the following conditions
     12  * are met:
     13  * 1. Redistributions of source code must retain the above copyright
     14  *    notice, this list of conditions and the following disclaimer.
     15  * 2. Redistributions in binary form must reproduce the above copyright
     16  *    notice, this list of conditions and the following disclaimer in the
     17  *    documentation and/or other materials provided with the distribution.
     18  * 3. The name of the author may not be used to endorse or promote products
     19  *    derived from this software without specific prior written permission
     20  *
     21  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     22  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     23  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     24  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     25  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     26  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     27  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     28  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     29  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     30  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     31  */
     32 
     33 #ifndef _STAND_WDVAR_H
     34 #define _STAND_WDVAR_H
     35 
     36 #include <dev/ic/wdcreg.h>
     37 #include <dev/ata/atareg.h>
     38 #include <dev/pci/pciidereg.h>
     39 
     40 #include <sys/disklabel.h>
     41 #include <sys/bootblock.h>
     42 
     43 #define WDC_TIMEOUT		2000000
     44 #define PCIIDE_CHANNEL_NDEV	2
     45 #define NUNITS			(PCIIDE_CHANNEL_NDEV * PCIIDE_NUM_CHANNELS)
     46 #define WDC_NPORTS		8	/* XXX */
     47 #define WDC_NSHADOWREG		2	/* XXX */
     48 
     49 struct wdc_channel {
     50 	volatile uint8_t *c_cmdbase;
     51 	volatile uint8_t *c_ctlbase;
     52 	volatile uint8_t *c_cmdreg[WDC_NPORTS + WDC_NSHADOWREG];
     53 	volatile uint16_t *c_data;
     54 
     55 	uint8_t compatchan;
     56 };
     57 
     58 #if defined(SH3)
     59 
     60 #define WDC_READ_REG(chp, reg)		*(chp)->c_cmdreg[(reg)]
     61 #define WDC_WRITE_REG(chp, reg, val)	*(chp)->c_cmdreg[(reg)] = (val)
     62 #define WDC_READ_CTLREG(chp, reg)	(chp)->c_ctlbase[(reg)]
     63 #define WDC_WRITE_CTLREG(chp, reg, val)	(chp)->c_ctlbase[(reg)] = (val)
     64 #define WDC_READ_DATA(chp)		*(chp)->c_data
     65 #define WDC_READ_DATA_STREAM(chp)	*(chp)->c_data
     66 
     67 #elif defined(SH4)
     68 
     69 #include <sh3/devreg.h>
     70 #include <sh3/mmu_sh4.h>
     71 #include <sh3/pte.h>
     72 
     73 #define WDC_READ_REG(chp, reg) ({					\
     74 	_reg_write_4(SH4_PTEA, _PG_PCMCIA_IO16 >> _PG_PCMCIA_SHIFT);	\
     75 	*(chp)->c_cmdreg[(reg)];					\
     76 })
     77 #define WDC_WRITE_REG(chp, reg, val) do {				\
     78 	_reg_write_4(SH4_PTEA, _PG_PCMCIA_IO16 >> _PG_PCMCIA_SHIFT);	\
     79 	*(chp)->c_cmdreg[(reg)] = (val);				\
     80 } while (0)
     81 #define WDC_READ_CTLREG(chp, reg) ({					\
     82 	_reg_write_4(SH4_PTEA, _PG_PCMCIA_IO16 >> _PG_PCMCIA_SHIFT);	\
     83 	(chp)->c_ctlbase[(reg)];					\
     84 })
     85 #define WDC_WRITE_CTLREG(chp, reg, val) do {				\
     86 	_reg_write_4(SH4_PTEA, _PG_PCMCIA_IO16 >> _PG_PCMCIA_SHIFT);	\
     87 	(chp)->c_ctlbase[(reg)] = (val);				\
     88 } while (0)
     89 #define WDC_READ_DATA(chp) ({						\
     90 	_reg_write_4(SH4_PTEA, _PG_PCMCIA_IO16 >> _PG_PCMCIA_SHIFT);	\
     91 	bswap16(*(chp)->c_data);					\
     92 })
     93 #define WDC_READ_DATA_STREAM(chp) ({					\
     94 	_reg_write_4(SH4_PTEA, _PG_PCMCIA_IO16 >> _PG_PCMCIA_SHIFT);	\
     95 	*(chp)->c_data;							\
     96 })
     97 
     98 #endif
     99 
    100 struct wd_softc {
    101 #define WDF_LBA		0x0001
    102 #define WDF_LBA48	0x0002
    103 	uint16_t sc_flags;
    104 
    105 	u_int sc_part;
    106 	u_int sc_unit;
    107 
    108 	uint64_t sc_capacity;
    109 	uint32_t sc_capacity28;
    110 
    111 	struct ataparams sc_params;
    112 	struct disklabel sc_label;
    113 	struct wdc_channel sc_channel;
    114 };
    115 
    116 struct wdc_command {
    117 	uint8_t drive;		/* drive id */
    118 
    119 	uint8_t r_command;	/* Parameters to upload to registers */
    120 	uint8_t r_head;
    121 	uint16_t r_cyl;
    122 	uint8_t r_sector;
    123 	uint8_t r_count;
    124 	uint8_t r_features;
    125 
    126 	uint16_t bcount;
    127 	void *data;
    128 
    129 	uint64_t r_blkno;
    130 };
    131 
    132 int	wdc_init(struct wd_softc *, u_int *);
    133 int	wdccommand(struct wd_softc *, struct wdc_command *);
    134 int	wdccommandext(struct wd_softc *, struct wdc_command *);
    135 int	wdc_exec_read(struct wd_softc *, uint8_t, daddr_t, void *);
    136 int	wdc_exec_identify(struct wd_softc *, void *);
    137 
    138 #endif /* _STAND_WDVAR_H */
    139