1 /* $NetBSD: vme_pcc.c,v 1.27 2023/12/20 00:40:44 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 1996-2000 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe and Steve C. Woodford. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 /* 33 * VME support specific to the Type 1 VMEchip found on the 34 * MVME-147. 35 * 36 * For a manual on the MVME-147, call: 408.991.8634. (Yes, this 37 * is the Sunnyvale sales office.) 38 */ 39 40 #include <sys/cdefs.h> 41 __KERNEL_RCSID(0, "$NetBSD: vme_pcc.c,v 1.27 2023/12/20 00:40:44 thorpej Exp $"); 42 43 #include <sys/param.h> 44 #include <sys/kernel.h> 45 #include <sys/systm.h> 46 #include <sys/device.h> 47 #include <sys/kcore.h> 48 49 #include <machine/cpu.h> 50 #include <machine/bus.h> 51 52 #include <dev/vme/vmereg.h> 53 #include <dev/vme/vmevar.h> 54 55 #include <mvme68k/dev/pccreg.h> 56 #include <mvme68k/dev/pccvar.h> 57 58 #include <dev/mvme/mvmebus.h> 59 #include <mvme68k/dev/vme_pccreg.h> 60 #include <mvme68k/dev/vme_pccvar.h> 61 62 63 int vme_pcc_match(device_t, cfdata_t, void *); 64 void vme_pcc_attach(device_t, device_t, void *); 65 66 CFATTACH_DECL_NEW(vmepcc, sizeof(struct vme_pcc_softc), 67 vme_pcc_match, vme_pcc_attach, NULL, NULL); 68 69 extern struct cfdriver vmepcc_cd; 70 71 extern phys_ram_seg_t mem_clusters[]; 72 static int vme_pcc_attached; 73 74 void vme_pcc_intr_establish(void *, int, int, int, int, 75 int (*)(void *), void *, struct evcnt *); 76 void vme_pcc_intr_disestablish(void *, int, int, int, struct evcnt *); 77 78 79 static struct mvmebus_range vme_pcc_masters[] = { 80 {VME_AM_A24 | 81 MVMEBUS_AM_CAP_DATA | MVMEBUS_AM_CAP_PROG | 82 MVMEBUS_AM_CAP_SUPER | MVMEBUS_AM_CAP_USER, 83 VME_D32 | VME_D16 | VME_D8, 84 VME1_A24D32_LOC_START, 85 VME1_A24_MASK, 86 VME1_A24D32_START, 87 VME1_A24D32_END}, 88 89 {VME_AM_A32 | 90 MVMEBUS_AM_CAP_DATA | MVMEBUS_AM_CAP_PROG | 91 MVMEBUS_AM_CAP_SUPER | MVMEBUS_AM_CAP_USER, 92 VME_D32 | VME_D16 | VME_D8, 93 VME1_A32D32_LOC_START, 94 VME1_A32_MASK, 95 VME1_A32D32_START, 96 VME1_A32D32_END}, 97 98 {VME_AM_A24 | 99 MVMEBUS_AM_CAP_DATA | MVMEBUS_AM_CAP_PROG | 100 MVMEBUS_AM_CAP_SUPER | MVMEBUS_AM_CAP_USER, 101 VME_D16 | VME_D8, 102 VME1_A24D16_LOC_START, 103 VME1_A24_MASK, 104 VME1_A24D16_START, 105 VME1_A24D16_END}, 106 107 {VME_AM_A32 | 108 MVMEBUS_AM_CAP_DATA | MVMEBUS_AM_CAP_PROG | 109 MVMEBUS_AM_CAP_SUPER | MVMEBUS_AM_CAP_USER, 110 VME_D16 | VME_D8, 111 VME1_A32D16_LOC_START, 112 VME1_A32_MASK, 113 VME1_A32D16_START, 114 VME1_A32D16_END}, 115 116 {VME_AM_A16 | 117 MVMEBUS_AM_CAP_DATA | 118 MVMEBUS_AM_CAP_SUPER | MVMEBUS_AM_CAP_USER, 119 VME_D16 | VME_D8, 120 VME1_A16D16_LOC_START, 121 VME1_A16_MASK, 122 VME1_A16D16_START, 123 VME1_A16D16_END} 124 }; 125 #define VME1_NMASTERS (sizeof(vme_pcc_masters)/sizeof(struct mvmebus_range)) 126 127 128 /* ARGSUSED */ 129 int 130 vme_pcc_match(device_t parent, cfdata_t cf, void *aux) 131 { 132 struct pcc_attach_args *pa; 133 134 pa = aux; 135 136 /* Only one VME chip, please. */ 137 if (vme_pcc_attached) 138 return (0); 139 140 if (strcmp(pa->pa_name, vmepcc_cd.cd_name)) 141 return (0); 142 143 return (1); 144 } 145 146 void 147 vme_pcc_attach(device_t parent, device_t self, void *aux) 148 { 149 struct pcc_attach_args *pa; 150 struct vme_pcc_softc *sc; 151 vme_am_t am; 152 uint8_t reg; 153 154 sc = device_private(self); 155 sc->sc_mvmebus.sc_dev = self; 156 pa = aux; 157 158 /* Map the VMEchip's registers */ 159 bus_space_map(pa->pa_bust, pa->pa_offset, VME1REG_SIZE, 0, 160 &sc->sc_bush); 161 162 /* Initialise stuff used by the mvme68k common VMEbus front-end */ 163 sc->sc_mvmebus.sc_bust = pa->pa_bust; 164 sc->sc_mvmebus.sc_dmat = pa->pa_dmat; 165 sc->sc_mvmebus.sc_chip = sc; 166 sc->sc_mvmebus.sc_nmasters = VME1_NMASTERS; 167 sc->sc_mvmebus.sc_masters = &vme_pcc_masters[0]; 168 sc->sc_mvmebus.sc_nslaves = VME1_NSLAVES; 169 sc->sc_mvmebus.sc_slaves = &sc->sc_slave[0]; 170 sc->sc_mvmebus.sc_intr_establish = vme_pcc_intr_establish; 171 sc->sc_mvmebus.sc_intr_disestablish = vme_pcc_intr_disestablish; 172 173 /* Initialize the chip. */ 174 reg = vme1_reg_read(sc, VME1REG_SCON) & ~VME1_SCON_SYSFAIL; 175 vme1_reg_write(sc, VME1REG_SCON, reg); 176 177 printf(": Type 1 VMEchip, scon jumper %s\n", 178 (reg & VME1_SCON_SWITCH) ? "enabled" : "disabled"); 179 180 /* 181 * Adjust the start address of the first range in vme_pcc_masters[] 182 * according to how much onboard memory exists. Disable the first 183 * range if onboard memory >= 16Mb, and adjust the start of the 184 * second range (A32D32). 185 */ 186 vme_pcc_masters[0].vr_vmestart = (vme_addr_t) mem_clusters[0].size; 187 if (mem_clusters[0].size >= 0x01000000) { 188 vme_pcc_masters[0].vr_am = MVMEBUS_AM_DISABLED; 189 vme_pcc_masters[1].vr_vmestart += 190 (vme_addr_t) (mem_clusters[0].size - 0x01000000); 191 } 192 193 am = 0; 194 reg = vme1_reg_read(sc, VME1REG_SLADDRMOD); 195 if ((reg & VME1_SLMOD_DATA) != 0) 196 am |= MVMEBUS_AM_CAP_DATA; 197 if ((reg & VME1_SLMOD_PRGRM) != 0) 198 am |= MVMEBUS_AM_CAP_PROG; 199 if ((reg & VME1_SLMOD_SUPER) != 0) 200 am |= MVMEBUS_AM_CAP_SUPER; 201 if ((reg & VME1_SLMOD_USER) != 0) 202 am |= MVMEBUS_AM_CAP_USER; 203 if ((reg & VME1_SLMOD_BLOCK) != 0) 204 am |= MVMEBUS_AM_CAP_BLK; 205 206 #ifdef notyet 207 if ((reg & VME1_SLMOD_SHORT) != 0) { 208 sc->sc_slave[VME1_SLAVE_A16].vr_am = am | VME_AM_A16; 209 sc->sc_slave[VME1_SLAVE_A16].vr_mask = 0xffffu; 210 } else 211 #endif 212 sc->sc_slave[VME1_SLAVE_A16].vr_am = MVMEBUS_AM_DISABLED; 213 214 if (pcc_slave_base_addr < 0x01000000u && (reg & VME1_SLMOD_STND) != 0) { 215 sc->sc_slave[VME1_SLAVE_A24].vr_am = am | VME_AM_A24; 216 sc->sc_slave[VME1_SLAVE_A24].vr_datasize = VME_D32 | 217 VME_D16 | VME_D8; 218 sc->sc_slave[VME1_SLAVE_A24].vr_mask = 0xffffffu; 219 sc->sc_slave[VME1_SLAVE_A24].vr_locstart = 0; 220 sc->sc_slave[VME1_SLAVE_A24].vr_vmestart = pcc_slave_base_addr; 221 sc->sc_slave[VME1_SLAVE_A24].vr_vmeend = (pcc_slave_base_addr + 222 mem_clusters[0].size - 1) & 0x00ffffffu; 223 } else 224 sc->sc_slave[VME1_SLAVE_A24].vr_am = MVMEBUS_AM_DISABLED; 225 226 if ((reg & VME1_SLMOD_EXTED) != 0) { 227 sc->sc_slave[VME1_SLAVE_A32].vr_am = am | VME_AM_A32; 228 sc->sc_slave[VME1_SLAVE_A32].vr_datasize = VME_D32 | 229 VME_D16 | VME_D8; 230 sc->sc_slave[VME1_SLAVE_A32].vr_mask = 0xffffffffu; 231 sc->sc_slave[VME1_SLAVE_A32].vr_locstart = 0; 232 sc->sc_slave[VME1_SLAVE_A32].vr_vmestart = pcc_slave_base_addr; 233 sc->sc_slave[VME1_SLAVE_A32].vr_vmeend = 234 pcc_slave_base_addr + mem_clusters[0].size - 1; 235 } else 236 sc->sc_slave[VME1_SLAVE_A32].vr_am = MVMEBUS_AM_DISABLED; 237 238 vme_pcc_attached = 1; 239 240 mvmebus_attach(&sc->sc_mvmebus); 241 } 242 243 void 244 vme_pcc_intr_establish(void *csc, int prior, int level, int vector, int first, int (*func)(void *), void *arg, struct evcnt *evcnt) 245 { 246 struct vme_pcc_softc *sc = csc; 247 248 if (prior != level) 249 panic("vme_pcc_intr_establish: CPU priority != VMEbus irq level"); 250 251 isrlink_vectored(func, arg, prior, vector, evcnt); 252 253 if (first) { 254 evcnt_attach_dynamic(evcnt, EVCNT_TYPE_INTR, 255 isrlink_evcnt(prior), device_xname(sc->sc_mvmebus.sc_dev), 256 mvmebus_irq_name[level]); 257 258 /* 259 * There had better not be another VMEbus master responding 260 * to this interrupt level... 261 */ 262 vme1_reg_write(sc, VME1REG_IRQEN, 263 vme1_reg_read(sc, VME1REG_IRQEN) | VME1_IRQ_VME(level)); 264 } 265 } 266 267 void 268 vme_pcc_intr_disestablish(void *csc, int level, int vector, int last, struct evcnt *evcnt) 269 { 270 struct vme_pcc_softc *sc = csc; 271 272 isrunlink_vectored(vector); 273 274 if (last) { 275 vme1_reg_write(sc, VME1REG_IRQEN, 276 vme1_reg_read(sc, VME1REG_IRQEN) & ~VME1_IRQ_VME(level)); 277 evcnt_detach(evcnt); 278 } 279 } 280
Indexes created Tue Sep 23 14:10:03 GMT 2025