vme_pcc.c revision 1.13 1 1.13 scw /* $NetBSD: vme_pcc.c,v 1.13 2000/11/24 09:27:42 scw Exp $ */
2 1.1 chuck
3 1.1 chuck /*-
4 1.7 scw * Copyright (c) 1996-2000 The NetBSD Foundation, Inc.
5 1.1 chuck * All rights reserved.
6 1.1 chuck *
7 1.1 chuck * This code is derived from software contributed to The NetBSD Foundation
8 1.7 scw * by Jason R. Thorpe and Steve C. Woodford.
9 1.1 chuck *
10 1.1 chuck * Redistribution and use in source and binary forms, with or without
11 1.1 chuck * modification, are permitted provided that the following conditions
12 1.1 chuck * are met:
13 1.1 chuck * 1. Redistributions of source code must retain the above copyright
14 1.1 chuck * notice, this list of conditions and the following disclaimer.
15 1.1 chuck * 2. Redistributions in binary form must reproduce the above copyright
16 1.1 chuck * notice, this list of conditions and the following disclaimer in the
17 1.1 chuck * documentation and/or other materials provided with the distribution.
18 1.1 chuck * 3. All advertising materials mentioning features or use of this software
19 1.1 chuck * must display the following acknowledgement:
20 1.1 chuck * This product includes software developed by the NetBSD
21 1.1 chuck * Foundation, Inc. and its contributors.
22 1.1 chuck * 4. Neither the name of The NetBSD Foundation nor the names of its
23 1.1 chuck * contributors may be used to endorse or promote products derived
24 1.1 chuck * from this software without specific prior written permission.
25 1.1 chuck *
26 1.1 chuck * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 1.1 chuck * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 1.1 chuck * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 1.5 jtc * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 1.5 jtc * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 1.1 chuck * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 1.1 chuck * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 1.1 chuck * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 1.1 chuck * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 1.1 chuck * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 1.1 chuck * POSSIBILITY OF SUCH DAMAGE.
37 1.1 chuck */
38 1.1 chuck
39 1.1 chuck /*
40 1.1 chuck * VME support specific to the Type 1 VMEchip found on the
41 1.1 chuck * MVME-147.
42 1.1 chuck *
43 1.1 chuck * For a manual on the MVME-147, call: 408.991.8634. (Yes, this
44 1.1 chuck * is the Sunnyvale sales office.)
45 1.1 chuck */
46 1.1 chuck
47 1.1 chuck #include <sys/param.h>
48 1.1 chuck #include <sys/kernel.h>
49 1.1 chuck #include <sys/systm.h>
50 1.1 chuck #include <sys/device.h>
51 1.7 scw #include <sys/malloc.h>
52 1.7 scw #include <sys/kcore.h>
53 1.1 chuck
54 1.1 chuck #include <machine/cpu.h>
55 1.7 scw #include <machine/bus.h>
56 1.7 scw
57 1.7 scw #include <dev/vme/vmereg.h>
58 1.7 scw #include <dev/vme/vmevar.h>
59 1.7 scw
60 1.7 scw #include <mvme68k/mvme68k/isr.h>
61 1.1 chuck
62 1.1 chuck #include <mvme68k/dev/pccreg.h>
63 1.1 chuck #include <mvme68k/dev/pccvar.h>
64 1.10 scw #include <mvme68k/dev/mvmebus.h>
65 1.1 chuck #include <mvme68k/dev/vme_pccreg.h>
66 1.7 scw #include <mvme68k/dev/vme_pccvar.h>
67 1.7 scw
68 1.1 chuck
69 1.10 scw int vme_pcc_match(struct device *, struct cfdata *, void *);
70 1.10 scw void vme_pcc_attach(struct device *, struct device *, void *);
71 1.1 chuck
72 1.7 scw struct cfattach vmepcc_ca = {
73 1.7 scw sizeof(struct vme_pcc_softc), vme_pcc_match, vme_pcc_attach
74 1.1 chuck };
75 1.6 thorpej
76 1.7 scw extern struct cfdriver vmepcc_cd;
77 1.7 scw
78 1.7 scw extern phys_ram_seg_t mem_clusters[];
79 1.7 scw static int vme_pcc_attached;
80 1.7 scw
81 1.12 scw void vme_pcc_intr_establish(void *, int, int, int, int,
82 1.12 scw int (*)(void *), void *);
83 1.10 scw void vme_pcc_intr_disestablish(void *, int, int, int);
84 1.7 scw
85 1.1 chuck
86 1.10 scw static struct mvmebus_range vme_pcc_masters[] = {
87 1.11 scw {VME_AM_A24 |
88 1.11 scw MVMEBUS_AM_CAP_DATA | MVMEBUS_AM_CAP_PROG |
89 1.11 scw MVMEBUS_AM_CAP_SUPER | MVMEBUS_AM_CAP_USER,
90 1.11 scw VME_D32 | VME_D16 | VME_D8,
91 1.7 scw VME1_A24D32_LOC_START,
92 1.10 scw VME1_A24_MASK,
93 1.7 scw VME1_A24D32_START,
94 1.7 scw VME1_A24D32_END},
95 1.7 scw
96 1.11 scw {VME_AM_A32 |
97 1.11 scw MVMEBUS_AM_CAP_DATA | MVMEBUS_AM_CAP_PROG |
98 1.11 scw MVMEBUS_AM_CAP_SUPER | MVMEBUS_AM_CAP_USER,
99 1.11 scw VME_D32 | VME_D16 | VME_D8,
100 1.7 scw VME1_A32D32_LOC_START,
101 1.10 scw VME1_A32_MASK,
102 1.7 scw VME1_A32D32_START,
103 1.7 scw VME1_A32D32_END},
104 1.7 scw
105 1.11 scw {VME_AM_A24 |
106 1.11 scw MVMEBUS_AM_CAP_DATA | MVMEBUS_AM_CAP_PROG |
107 1.11 scw MVMEBUS_AM_CAP_SUPER | MVMEBUS_AM_CAP_USER,
108 1.11 scw VME_D16 | VME_D8,
109 1.7 scw VME1_A24D16_LOC_START,
110 1.10 scw VME1_A24_MASK,
111 1.7 scw VME1_A24D16_START,
112 1.7 scw VME1_A24D16_END},
113 1.7 scw
114 1.11 scw {VME_AM_A32 |
115 1.11 scw MVMEBUS_AM_CAP_DATA | MVMEBUS_AM_CAP_PROG |
116 1.11 scw MVMEBUS_AM_CAP_SUPER | MVMEBUS_AM_CAP_USER,
117 1.7 scw VME_D16 | VME_D8,
118 1.7 scw VME1_A32D16_LOC_START,
119 1.10 scw VME1_A32_MASK,
120 1.7 scw VME1_A32D16_START,
121 1.7 scw VME1_A32D16_END},
122 1.7 scw
123 1.11 scw {VME_AM_A16 |
124 1.11 scw MVMEBUS_AM_CAP_DATA |
125 1.11 scw MVMEBUS_AM_CAP_SUPER | MVMEBUS_AM_CAP_USER,
126 1.7 scw VME_D16 | VME_D8,
127 1.7 scw VME1_A16D16_LOC_START,
128 1.10 scw VME1_A16_MASK,
129 1.7 scw VME1_A16D16_START,
130 1.7 scw VME1_A16D16_END}
131 1.7 scw };
132 1.10 scw #define VME1_NMASTERS (sizeof(vme_pcc_masters)/sizeof(struct mvmebus_range))
133 1.1 chuck
134 1.1 chuck
135 1.7 scw /* ARGSUSED */
136 1.1 chuck int
137 1.7 scw vme_pcc_match(parent, cf, aux)
138 1.1 chuck struct device *parent;
139 1.4 gwr struct cfdata *cf;
140 1.4 gwr void *aux;
141 1.1 chuck {
142 1.7 scw struct pcc_attach_args *pa;
143 1.7 scw
144 1.7 scw pa = aux;
145 1.1 chuck
146 1.1 chuck /* Only one VME chip, please. */
147 1.7 scw if (vme_pcc_attached)
148 1.1 chuck return (0);
149 1.1 chuck
150 1.7 scw if (strcmp(pa->pa_name, vmepcc_cd.cd_name))
151 1.1 chuck return (0);
152 1.1 chuck
153 1.1 chuck return (1);
154 1.1 chuck }
155 1.1 chuck
156 1.1 chuck void
157 1.7 scw vme_pcc_attach(parent, self, aux)
158 1.7 scw struct device *parent;
159 1.7 scw struct device *self;
160 1.1 chuck void *aux;
161 1.1 chuck {
162 1.7 scw struct pcc_attach_args *pa;
163 1.7 scw struct vme_pcc_softc *sc;
164 1.11 scw vme_am_t am;
165 1.7 scw u_int8_t reg;
166 1.7 scw
167 1.7 scw sc = (struct vme_pcc_softc *) self;
168 1.7 scw pa = aux;
169 1.7 scw
170 1.10 scw /* Map the VMEchip's registers */
171 1.13 scw bus_space_map(pa->pa_bust, pa->pa_offset, VME1REG_SIZE, 0,
172 1.7 scw &sc->sc_bush);
173 1.1 chuck
174 1.13 scw /* Initialise stuff used by the mvme68k common VMEbus front-end */
175 1.13 scw sc->sc_mvmebus.sc_bust = pa->pa_bust;
176 1.13 scw sc->sc_mvmebus.sc_dmat = pa->pa_dmat;
177 1.13 scw sc->sc_mvmebus.sc_chip = sc;
178 1.13 scw sc->sc_mvmebus.sc_nmasters = VME1_NMASTERS;
179 1.13 scw sc->sc_mvmebus.sc_masters = &vme_pcc_masters[0];
180 1.13 scw sc->sc_mvmebus.sc_nslaves = VME1_NSLAVES;
181 1.13 scw sc->sc_mvmebus.sc_slaves = &sc->sc_slave[0];
182 1.13 scw sc->sc_mvmebus.sc_intr_establish = vme_pcc_intr_establish;
183 1.13 scw sc->sc_mvmebus.sc_intr_disestablish = vme_pcc_intr_disestablish;
184 1.13 scw
185 1.1 chuck /* Initialize the chip. */
186 1.7 scw reg = vme1_reg_read(sc, VME1REG_SCON) & ~VME1_SCON_SYSFAIL;
187 1.7 scw vme1_reg_write(sc, VME1REG_SCON, reg);
188 1.1 chuck
189 1.3 christos printf(": Type 1 VMEchip, scon jumper %s\n",
190 1.7 scw (reg & VME1_SCON_SWITCH) ? "enabled" : "disabled");
191 1.1 chuck
192 1.7 scw /*
193 1.10 scw * Adjust the start address of the first range in vme_pcc_masters[]
194 1.7 scw * according to how much onboard memory exists. Disable the first
195 1.7 scw * range if onboard memory >= 16Mb, and adjust the start of the
196 1.7 scw * second range (A32D32).
197 1.7 scw */
198 1.10 scw vme_pcc_masters[0].vr_vmestart = (vme_addr_t) mem_clusters[0].size;
199 1.7 scw if (mem_clusters[0].size >= 0x01000000) {
200 1.10 scw vme_pcc_masters[0].vr_am = MVMEBUS_AM_DISABLED;
201 1.10 scw vme_pcc_masters[1].vr_vmestart +=
202 1.7 scw (vme_addr_t) (mem_clusters[0].size - 0x01000000);
203 1.7 scw }
204 1.1 chuck
205 1.11 scw am = 0;
206 1.11 scw reg = vme1_reg_read(sc, VME1REG_SLADDRMOD);
207 1.11 scw if ((reg & VME1_SLMOD_DATA) != 0)
208 1.11 scw am |= MVMEBUS_AM_CAP_DATA;
209 1.11 scw if ((reg & VME1_SLMOD_PRGRM) != 0)
210 1.11 scw am |= MVMEBUS_AM_CAP_PROG;
211 1.11 scw if ((reg & VME1_SLMOD_SUPER) != 0)
212 1.11 scw am |= MVMEBUS_AM_CAP_SUPER;
213 1.11 scw if ((reg & VME1_SLMOD_USER) != 0)
214 1.11 scw am |= MVMEBUS_AM_CAP_USER;
215 1.11 scw if ((reg & VME1_SLMOD_BLOCK) != 0)
216 1.11 scw am |= MVMEBUS_AM_CAP_BLK;
217 1.11 scw
218 1.11 scw #ifdef notyet
219 1.11 scw if ((reg & VME1_SLMOD_SHORT) != 0) {
220 1.11 scw sc->sc_slave[VME1_SLAVE_A16].vr_am = am | VME_AM_A16;
221 1.11 scw sc->sc_slave[VME1_SLAVE_A16].vr_mask = 0xffffu;
222 1.11 scw } else
223 1.11 scw #endif
224 1.11 scw sc->sc_slave[VME1_SLAVE_A16].vr_am = MVMEBUS_AM_DISABLED;
225 1.11 scw
226 1.11 scw if (pcc_slave_base_addr < 0x01000000u && (reg & VME1_SLMOD_STND) != 0) {
227 1.11 scw sc->sc_slave[VME1_SLAVE_A24].vr_am = am | VME_AM_A24;
228 1.11 scw sc->sc_slave[VME1_SLAVE_A24].vr_datasize = VME_D32 |
229 1.11 scw VME_D16 | VME_D8;
230 1.11 scw sc->sc_slave[VME1_SLAVE_A24].vr_mask = 0xffffffu;
231 1.11 scw sc->sc_slave[VME1_SLAVE_A24].vr_locstart = 0;
232 1.11 scw sc->sc_slave[VME1_SLAVE_A24].vr_vmestart = pcc_slave_base_addr;
233 1.11 scw sc->sc_slave[VME1_SLAVE_A24].vr_vmeend = (pcc_slave_base_addr +
234 1.11 scw mem_clusters[0].size - 1) & 0x00ffffffu;
235 1.11 scw } else
236 1.11 scw sc->sc_slave[VME1_SLAVE_A24].vr_am = MVMEBUS_AM_DISABLED;
237 1.11 scw
238 1.11 scw if ((reg & VME1_SLMOD_EXTED) != 0) {
239 1.11 scw sc->sc_slave[VME1_SLAVE_A32].vr_am = am | VME_AM_A32;
240 1.11 scw sc->sc_slave[VME1_SLAVE_A32].vr_datasize = VME_D32 |
241 1.11 scw VME_D16 | VME_D8;
242 1.11 scw sc->sc_slave[VME1_SLAVE_A32].vr_mask = 0xffffffffu;
243 1.11 scw sc->sc_slave[VME1_SLAVE_A32].vr_locstart = 0;
244 1.11 scw sc->sc_slave[VME1_SLAVE_A32].vr_vmestart = pcc_slave_base_addr;
245 1.11 scw sc->sc_slave[VME1_SLAVE_A32].vr_vmeend =
246 1.11 scw pcc_slave_base_addr + mem_clusters[0].size - 1;
247 1.11 scw } else
248 1.11 scw sc->sc_slave[VME1_SLAVE_A32].vr_am = MVMEBUS_AM_DISABLED;
249 1.11 scw
250 1.11 scw vme_pcc_attached = 1;
251 1.1 chuck
252 1.10 scw mvmebus_attach(&sc->sc_mvmebus);
253 1.7 scw }
254 1.7 scw
255 1.7 scw void
256 1.12 scw vme_pcc_intr_establish(csc, prior, level, vector, first, func, arg)
257 1.10 scw void *csc;
258 1.12 scw int prior, level, vector, first;
259 1.10 scw int (*func)(void *);
260 1.10 scw void *arg;
261 1.7 scw {
262 1.10 scw struct vme_pcc_softc *sc = csc;
263 1.7 scw
264 1.12 scw if (prior != level)
265 1.12 scw panic("vme_pcc_intr_establish: cpu priority != VMEbus irq level");
266 1.12 scw
267 1.12 scw isrlink_vectored(func, arg, prior, vector);
268 1.7 scw
269 1.10 scw if (first) {
270 1.7 scw /*
271 1.10 scw * There had better not be another VMEbus master responding
272 1.10 scw * to this interrupt level...
273 1.7 scw */
274 1.10 scw vme1_reg_write(sc, VME1REG_IRQEN,
275 1.10 scw vme1_reg_read(sc, VME1REG_IRQEN) | VME1_IRQ_VME(level));
276 1.7 scw }
277 1.7 scw }
278 1.1 chuck
279 1.7 scw void
280 1.10 scw vme_pcc_intr_disestablish(csc, level, vector, last)
281 1.10 scw void *csc;
282 1.10 scw int level, vector, last;
283 1.7 scw {
284 1.10 scw struct vme_pcc_softc *sc = csc;
285 1.7 scw
286 1.7 scw isrunlink_vectored(vector);
287 1.7 scw
288 1.10 scw if (last) {
289 1.7 scw vme1_reg_write(sc, VME1REG_IRQEN,
290 1.7 scw vme1_reg_read(sc, VME1REG_IRQEN) & ~VME1_IRQ_VME(level));
291 1.1 chuck }
292 1.7 scw }
293