vme_pcc.c revision 1.15
1 /* $NetBSD: vme_pcc.c,v 1.15 2002/02/12 20:38:28 scw Exp $ */ 2 3 /*- 4 * Copyright (c) 1996-2000 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe and Steve C. Woodford. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * VME support specific to the Type 1 VMEchip found on the 41 * MVME-147. 42 * 43 * For a manual on the MVME-147, call: 408.991.8634. (Yes, this 44 * is the Sunnyvale sales office.) 45 */ 46 47 #include <sys/param.h> 48 #include <sys/kernel.h> 49 #include <sys/systm.h> 50 #include <sys/device.h> 51 #include <sys/malloc.h> 52 #include <sys/kcore.h> 53 54 #include <machine/cpu.h> 55 #include <machine/bus.h> 56 57 #include <dev/vme/vmereg.h> 58 #include <dev/vme/vmevar.h> 59 60 #include <mvme68k/dev/pccreg.h> 61 #include <mvme68k/dev/pccvar.h> 62 63 #include <dev/mvme/mvmebus.h> 64 #include <mvme68k/dev/vme_pccreg.h> 65 #include <mvme68k/dev/vme_pccvar.h> 66 67 68 int vme_pcc_match(struct device *, struct cfdata *, void *); 69 void vme_pcc_attach(struct device *, struct device *, void *); 70 71 struct cfattach vmepcc_ca = { 72 sizeof(struct vme_pcc_softc), vme_pcc_match, vme_pcc_attach 73 }; 74 75 extern struct cfdriver vmepcc_cd; 76 77 extern phys_ram_seg_t mem_clusters[]; 78 static int vme_pcc_attached; 79 80 void vme_pcc_intr_establish(void *, int, int, int, int, 81 int (*)(void *), void *, struct evcnt *); 82 void vme_pcc_intr_disestablish(void *, int, int, int, struct evcnt *); 83 84 85 static struct mvmebus_range vme_pcc_masters[] = { 86 {VME_AM_A24 | 87 MVMEBUS_AM_CAP_DATA | MVMEBUS_AM_CAP_PROG | 88 MVMEBUS_AM_CAP_SUPER | MVMEBUS_AM_CAP_USER, 89 VME_D32 | VME_D16 | VME_D8, 90 VME1_A24D32_LOC_START, 91 VME1_A24_MASK, 92 VME1_A24D32_START, 93 VME1_A24D32_END}, 94 95 {VME_AM_A32 | 96 MVMEBUS_AM_CAP_DATA | MVMEBUS_AM_CAP_PROG | 97 MVMEBUS_AM_CAP_SUPER | MVMEBUS_AM_CAP_USER, 98 VME_D32 | VME_D16 | VME_D8, 99 VME1_A32D32_LOC_START, 100 VME1_A32_MASK, 101 VME1_A32D32_START, 102 VME1_A32D32_END}, 103 104 {VME_AM_A24 | 105 MVMEBUS_AM_CAP_DATA | MVMEBUS_AM_CAP_PROG | 106 MVMEBUS_AM_CAP_SUPER | MVMEBUS_AM_CAP_USER, 107 VME_D16 | VME_D8, 108 VME1_A24D16_LOC_START, 109 VME1_A24_MASK, 110 VME1_A24D16_START, 111 VME1_A24D16_END}, 112 113 {VME_AM_A32 | 114 MVMEBUS_AM_CAP_DATA | MVMEBUS_AM_CAP_PROG | 115 MVMEBUS_AM_CAP_SUPER | MVMEBUS_AM_CAP_USER, 116 VME_D16 | VME_D8, 117 VME1_A32D16_LOC_START, 118 VME1_A32_MASK, 119 VME1_A32D16_START, 120 VME1_A32D16_END}, 121 122 {VME_AM_A16 | 123 MVMEBUS_AM_CAP_DATA | 124 MVMEBUS_AM_CAP_SUPER | MVMEBUS_AM_CAP_USER, 125 VME_D16 | VME_D8, 126 VME1_A16D16_LOC_START, 127 VME1_A16_MASK, 128 VME1_A16D16_START, 129 VME1_A16D16_END} 130 }; 131 #define VME1_NMASTERS (sizeof(vme_pcc_masters)/sizeof(struct mvmebus_range)) 132 133 134 /* ARGSUSED */ 135 int 136 vme_pcc_match(parent, cf, aux) 137 struct device *parent; 138 struct cfdata *cf; 139 void *aux; 140 { 141 struct pcc_attach_args *pa; 142 143 pa = aux; 144 145 /* Only one VME chip, please. */ 146 if (vme_pcc_attached) 147 return (0); 148 149 if (strcmp(pa->pa_name, vmepcc_cd.cd_name)) 150 return (0); 151 152 return (1); 153 } 154 155 void 156 vme_pcc_attach(parent, self, aux) 157 struct device *parent; 158 struct device *self; 159 void *aux; 160 { 161 struct pcc_attach_args *pa; 162 struct vme_pcc_softc *sc; 163 vme_am_t am; 164 u_int8_t reg; 165 166 sc = (struct vme_pcc_softc *) self; 167 pa = aux; 168 169 /* Map the VMEchip's registers */ 170 bus_space_map(pa->pa_bust, pa->pa_offset, VME1REG_SIZE, 0, 171 &sc->sc_bush); 172 173 /* Initialise stuff used by the mvme68k common VMEbus front-end */ 174 sc->sc_mvmebus.sc_bust = pa->pa_bust; 175 sc->sc_mvmebus.sc_dmat = pa->pa_dmat; 176 sc->sc_mvmebus.sc_chip = sc; 177 sc->sc_mvmebus.sc_nmasters = VME1_NMASTERS; 178 sc->sc_mvmebus.sc_masters = &vme_pcc_masters[0]; 179 sc->sc_mvmebus.sc_nslaves = VME1_NSLAVES; 180 sc->sc_mvmebus.sc_slaves = &sc->sc_slave[0]; 181 sc->sc_mvmebus.sc_intr_establish = vme_pcc_intr_establish; 182 sc->sc_mvmebus.sc_intr_disestablish = vme_pcc_intr_disestablish; 183 184 /* Initialize the chip. */ 185 reg = vme1_reg_read(sc, VME1REG_SCON) & ~VME1_SCON_SYSFAIL; 186 vme1_reg_write(sc, VME1REG_SCON, reg); 187 188 printf(": Type 1 VMEchip, scon jumper %s\n", 189 (reg & VME1_SCON_SWITCH) ? "enabled" : "disabled"); 190 191 /* 192 * Adjust the start address of the first range in vme_pcc_masters[] 193 * according to how much onboard memory exists. Disable the first 194 * range if onboard memory >= 16Mb, and adjust the start of the 195 * second range (A32D32). 196 */ 197 vme_pcc_masters[0].vr_vmestart = (vme_addr_t) mem_clusters[0].size; 198 if (mem_clusters[0].size >= 0x01000000) { 199 vme_pcc_masters[0].vr_am = MVMEBUS_AM_DISABLED; 200 vme_pcc_masters[1].vr_vmestart += 201 (vme_addr_t) (mem_clusters[0].size - 0x01000000); 202 } 203 204 am = 0; 205 reg = vme1_reg_read(sc, VME1REG_SLADDRMOD); 206 if ((reg & VME1_SLMOD_DATA) != 0) 207 am |= MVMEBUS_AM_CAP_DATA; 208 if ((reg & VME1_SLMOD_PRGRM) != 0) 209 am |= MVMEBUS_AM_CAP_PROG; 210 if ((reg & VME1_SLMOD_SUPER) != 0) 211 am |= MVMEBUS_AM_CAP_SUPER; 212 if ((reg & VME1_SLMOD_USER) != 0) 213 am |= MVMEBUS_AM_CAP_USER; 214 if ((reg & VME1_SLMOD_BLOCK) != 0) 215 am |= MVMEBUS_AM_CAP_BLK; 216 217 #ifdef notyet 218 if ((reg & VME1_SLMOD_SHORT) != 0) { 219 sc->sc_slave[VME1_SLAVE_A16].vr_am = am | VME_AM_A16; 220 sc->sc_slave[VME1_SLAVE_A16].vr_mask = 0xffffu; 221 } else 222 #endif 223 sc->sc_slave[VME1_SLAVE_A16].vr_am = MVMEBUS_AM_DISABLED; 224 225 if (pcc_slave_base_addr < 0x01000000u && (reg & VME1_SLMOD_STND) != 0) { 226 sc->sc_slave[VME1_SLAVE_A24].vr_am = am | VME_AM_A24; 227 sc->sc_slave[VME1_SLAVE_A24].vr_datasize = VME_D32 | 228 VME_D16 | VME_D8; 229 sc->sc_slave[VME1_SLAVE_A24].vr_mask = 0xffffffu; 230 sc->sc_slave[VME1_SLAVE_A24].vr_locstart = 0; 231 sc->sc_slave[VME1_SLAVE_A24].vr_vmestart = pcc_slave_base_addr; 232 sc->sc_slave[VME1_SLAVE_A24].vr_vmeend = (pcc_slave_base_addr + 233 mem_clusters[0].size - 1) & 0x00ffffffu; 234 } else 235 sc->sc_slave[VME1_SLAVE_A24].vr_am = MVMEBUS_AM_DISABLED; 236 237 if ((reg & VME1_SLMOD_EXTED) != 0) { 238 sc->sc_slave[VME1_SLAVE_A32].vr_am = am | VME_AM_A32; 239 sc->sc_slave[VME1_SLAVE_A32].vr_datasize = VME_D32 | 240 VME_D16 | VME_D8; 241 sc->sc_slave[VME1_SLAVE_A32].vr_mask = 0xffffffffu; 242 sc->sc_slave[VME1_SLAVE_A32].vr_locstart = 0; 243 sc->sc_slave[VME1_SLAVE_A32].vr_vmestart = pcc_slave_base_addr; 244 sc->sc_slave[VME1_SLAVE_A32].vr_vmeend = 245 pcc_slave_base_addr + mem_clusters[0].size - 1; 246 } else 247 sc->sc_slave[VME1_SLAVE_A32].vr_am = MVMEBUS_AM_DISABLED; 248 249 vme_pcc_attached = 1; 250 251 mvmebus_attach(&sc->sc_mvmebus); 252 } 253 254 void 255 vme_pcc_intr_establish(csc, prior, level, vector, first, func, arg, evcnt) 256 void *csc; 257 int prior, level, vector, first; 258 int (*func)(void *); 259 void *arg; 260 struct evcnt *evcnt; 261 { 262 struct vme_pcc_softc *sc = csc; 263 264 if (prior != level) 265 panic("vme_pcc_intr_establish: cpu priority != VMEbus irq level"); 266 267 isrlink_vectored(func, arg, prior, vector, evcnt); 268 269 if (first) { 270 evcnt_attach_dynamic(evcnt, EVCNT_TYPE_INTR, 271 isrlink_evcnt(prior), sc->sc_mvmebus.sc_dev.dv_xname, 272 mvmebus_irq_name[level]); 273 274 /* 275 * There had better not be another VMEbus master responding 276 * to this interrupt level... 277 */ 278 vme1_reg_write(sc, VME1REG_IRQEN, 279 vme1_reg_read(sc, VME1REG_IRQEN) | VME1_IRQ_VME(level)); 280 } 281 } 282 283 void 284 vme_pcc_intr_disestablish(csc, level, vector, last, evcnt) 285 void *csc; 286 int level, vector, last; 287 struct evcnt *evcnt; 288 { 289 struct vme_pcc_softc *sc = csc; 290 291 isrunlink_vectored(vector); 292 293 if (last) { 294 vme1_reg_write(sc, VME1REG_IRQEN, 295 vme1_reg_read(sc, VME1REG_IRQEN) & ~VME1_IRQ_VME(level)); 296 evcnt_detach(evcnt); 297 } 298 } 299
Indexes created Sun Oct 19 16:10:00 GMT 2025