vme_pcc.c revision 1.22
1 /* $NetBSD: vme_pcc.c,v 1.22 2008/04/28 20:23:29 martin Exp $ */ 2 3 /*- 4 * Copyright (c) 1996-2000 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe and Steve C. Woodford. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 /* 33 * VME support specific to the Type 1 VMEchip found on the 34 * MVME-147. 35 * 36 * For a manual on the MVME-147, call: 408.991.8634. (Yes, this 37 * is the Sunnyvale sales office.) 38 */ 39 40 #include <sys/cdefs.h> 41 __KERNEL_RCSID(0, "$NetBSD: vme_pcc.c,v 1.22 2008/04/28 20:23:29 martin Exp $"); 42 43 #include <sys/param.h> 44 #include <sys/kernel.h> 45 #include <sys/systm.h> 46 #include <sys/device.h> 47 #include <sys/malloc.h> 48 #include <sys/kcore.h> 49 50 #include <machine/cpu.h> 51 #include <machine/bus.h> 52 53 #include <dev/vme/vmereg.h> 54 #include <dev/vme/vmevar.h> 55 56 #include <mvme68k/dev/pccreg.h> 57 #include <mvme68k/dev/pccvar.h> 58 59 #include <dev/mvme/mvmebus.h> 60 #include <mvme68k/dev/vme_pccreg.h> 61 #include <mvme68k/dev/vme_pccvar.h> 62 63 64 int vme_pcc_match(struct device *, struct cfdata *, void *); 65 void vme_pcc_attach(struct device *, struct device *, void *); 66 67 CFATTACH_DECL(vmepcc, sizeof(struct vme_pcc_softc), 68 vme_pcc_match, vme_pcc_attach, NULL, NULL); 69 70 extern struct cfdriver vmepcc_cd; 71 72 extern phys_ram_seg_t mem_clusters[]; 73 static int vme_pcc_attached; 74 75 void vme_pcc_intr_establish(void *, int, int, int, int, 76 int (*)(void *), void *, struct evcnt *); 77 void vme_pcc_intr_disestablish(void *, int, int, int, struct evcnt *); 78 79 80 static struct mvmebus_range vme_pcc_masters[] = { 81 {VME_AM_A24 | 82 MVMEBUS_AM_CAP_DATA | MVMEBUS_AM_CAP_PROG | 83 MVMEBUS_AM_CAP_SUPER | MVMEBUS_AM_CAP_USER, 84 VME_D32 | VME_D16 | VME_D8, 85 VME1_A24D32_LOC_START, 86 VME1_A24_MASK, 87 VME1_A24D32_START, 88 VME1_A24D32_END}, 89 90 {VME_AM_A32 | 91 MVMEBUS_AM_CAP_DATA | MVMEBUS_AM_CAP_PROG | 92 MVMEBUS_AM_CAP_SUPER | MVMEBUS_AM_CAP_USER, 93 VME_D32 | VME_D16 | VME_D8, 94 VME1_A32D32_LOC_START, 95 VME1_A32_MASK, 96 VME1_A32D32_START, 97 VME1_A32D32_END}, 98 99 {VME_AM_A24 | 100 MVMEBUS_AM_CAP_DATA | MVMEBUS_AM_CAP_PROG | 101 MVMEBUS_AM_CAP_SUPER | MVMEBUS_AM_CAP_USER, 102 VME_D16 | VME_D8, 103 VME1_A24D16_LOC_START, 104 VME1_A24_MASK, 105 VME1_A24D16_START, 106 VME1_A24D16_END}, 107 108 {VME_AM_A32 | 109 MVMEBUS_AM_CAP_DATA | MVMEBUS_AM_CAP_PROG | 110 MVMEBUS_AM_CAP_SUPER | MVMEBUS_AM_CAP_USER, 111 VME_D16 | VME_D8, 112 VME1_A32D16_LOC_START, 113 VME1_A32_MASK, 114 VME1_A32D16_START, 115 VME1_A32D16_END}, 116 117 {VME_AM_A16 | 118 MVMEBUS_AM_CAP_DATA | 119 MVMEBUS_AM_CAP_SUPER | MVMEBUS_AM_CAP_USER, 120 VME_D16 | VME_D8, 121 VME1_A16D16_LOC_START, 122 VME1_A16_MASK, 123 VME1_A16D16_START, 124 VME1_A16D16_END} 125 }; 126 #define VME1_NMASTERS (sizeof(vme_pcc_masters)/sizeof(struct mvmebus_range)) 127 128 129 /* ARGSUSED */ 130 int 131 vme_pcc_match(parent, cf, aux) 132 struct device *parent; 133 struct cfdata *cf; 134 void *aux; 135 { 136 struct pcc_attach_args *pa; 137 138 pa = aux; 139 140 /* Only one VME chip, please. */ 141 if (vme_pcc_attached) 142 return (0); 143 144 if (strcmp(pa->pa_name, vmepcc_cd.cd_name)) 145 return (0); 146 147 return (1); 148 } 149 150 void 151 vme_pcc_attach(parent, self, aux) 152 struct device *parent; 153 struct device *self; 154 void *aux; 155 { 156 struct pcc_attach_args *pa; 157 struct vme_pcc_softc *sc; 158 vme_am_t am; 159 uint8_t reg; 160 161 sc = (struct vme_pcc_softc *) self; 162 pa = aux; 163 164 /* Map the VMEchip's registers */ 165 bus_space_map(pa->pa_bust, pa->pa_offset, VME1REG_SIZE, 0, 166 &sc->sc_bush); 167 168 /* Initialise stuff used by the mvme68k common VMEbus front-end */ 169 sc->sc_mvmebus.sc_bust = pa->pa_bust; 170 sc->sc_mvmebus.sc_dmat = pa->pa_dmat; 171 sc->sc_mvmebus.sc_chip = sc; 172 sc->sc_mvmebus.sc_nmasters = VME1_NMASTERS; 173 sc->sc_mvmebus.sc_masters = &vme_pcc_masters[0]; 174 sc->sc_mvmebus.sc_nslaves = VME1_NSLAVES; 175 sc->sc_mvmebus.sc_slaves = &sc->sc_slave[0]; 176 sc->sc_mvmebus.sc_intr_establish = vme_pcc_intr_establish; 177 sc->sc_mvmebus.sc_intr_disestablish = vme_pcc_intr_disestablish; 178 179 /* Initialize the chip. */ 180 reg = vme1_reg_read(sc, VME1REG_SCON) & ~VME1_SCON_SYSFAIL; 181 vme1_reg_write(sc, VME1REG_SCON, reg); 182 183 printf(": Type 1 VMEchip, scon jumper %s\n", 184 (reg & VME1_SCON_SWITCH) ? "enabled" : "disabled"); 185 186 /* 187 * Adjust the start address of the first range in vme_pcc_masters[] 188 * according to how much onboard memory exists. Disable the first 189 * range if onboard memory >= 16Mb, and adjust the start of the 190 * second range (A32D32). 191 */ 192 vme_pcc_masters[0].vr_vmestart = (vme_addr_t) mem_clusters[0].size; 193 if (mem_clusters[0].size >= 0x01000000) { 194 vme_pcc_masters[0].vr_am = MVMEBUS_AM_DISABLED; 195 vme_pcc_masters[1].vr_vmestart += 196 (vme_addr_t) (mem_clusters[0].size - 0x01000000); 197 } 198 199 am = 0; 200 reg = vme1_reg_read(sc, VME1REG_SLADDRMOD); 201 if ((reg & VME1_SLMOD_DATA) != 0) 202 am |= MVMEBUS_AM_CAP_DATA; 203 if ((reg & VME1_SLMOD_PRGRM) != 0) 204 am |= MVMEBUS_AM_CAP_PROG; 205 if ((reg & VME1_SLMOD_SUPER) != 0) 206 am |= MVMEBUS_AM_CAP_SUPER; 207 if ((reg & VME1_SLMOD_USER) != 0) 208 am |= MVMEBUS_AM_CAP_USER; 209 if ((reg & VME1_SLMOD_BLOCK) != 0) 210 am |= MVMEBUS_AM_CAP_BLK; 211 212 #ifdef notyet 213 if ((reg & VME1_SLMOD_SHORT) != 0) { 214 sc->sc_slave[VME1_SLAVE_A16].vr_am = am | VME_AM_A16; 215 sc->sc_slave[VME1_SLAVE_A16].vr_mask = 0xffffu; 216 } else 217 #endif 218 sc->sc_slave[VME1_SLAVE_A16].vr_am = MVMEBUS_AM_DISABLED; 219 220 if (pcc_slave_base_addr < 0x01000000u && (reg & VME1_SLMOD_STND) != 0) { 221 sc->sc_slave[VME1_SLAVE_A24].vr_am = am | VME_AM_A24; 222 sc->sc_slave[VME1_SLAVE_A24].vr_datasize = VME_D32 | 223 VME_D16 | VME_D8; 224 sc->sc_slave[VME1_SLAVE_A24].vr_mask = 0xffffffu; 225 sc->sc_slave[VME1_SLAVE_A24].vr_locstart = 0; 226 sc->sc_slave[VME1_SLAVE_A24].vr_vmestart = pcc_slave_base_addr; 227 sc->sc_slave[VME1_SLAVE_A24].vr_vmeend = (pcc_slave_base_addr + 228 mem_clusters[0].size - 1) & 0x00ffffffu; 229 } else 230 sc->sc_slave[VME1_SLAVE_A24].vr_am = MVMEBUS_AM_DISABLED; 231 232 if ((reg & VME1_SLMOD_EXTED) != 0) { 233 sc->sc_slave[VME1_SLAVE_A32].vr_am = am | VME_AM_A32; 234 sc->sc_slave[VME1_SLAVE_A32].vr_datasize = VME_D32 | 235 VME_D16 | VME_D8; 236 sc->sc_slave[VME1_SLAVE_A32].vr_mask = 0xffffffffu; 237 sc->sc_slave[VME1_SLAVE_A32].vr_locstart = 0; 238 sc->sc_slave[VME1_SLAVE_A32].vr_vmestart = pcc_slave_base_addr; 239 sc->sc_slave[VME1_SLAVE_A32].vr_vmeend = 240 pcc_slave_base_addr + mem_clusters[0].size - 1; 241 } else 242 sc->sc_slave[VME1_SLAVE_A32].vr_am = MVMEBUS_AM_DISABLED; 243 244 vme_pcc_attached = 1; 245 246 mvmebus_attach(&sc->sc_mvmebus); 247 } 248 249 void 250 vme_pcc_intr_establish(csc, prior, level, vector, first, func, arg, evcnt) 251 void *csc; 252 int prior, level, vector, first; 253 int (*func)(void *); 254 void *arg; 255 struct evcnt *evcnt; 256 { 257 struct vme_pcc_softc *sc = csc; 258 259 if (prior != level) 260 panic("vme_pcc_intr_establish: CPU priority != VMEbus irq level"); 261 262 isrlink_vectored(func, arg, prior, vector, evcnt); 263 264 if (first) { 265 evcnt_attach_dynamic(evcnt, EVCNT_TYPE_INTR, 266 isrlink_evcnt(prior), sc->sc_mvmebus.sc_dev.dv_xname, 267 mvmebus_irq_name[level]); 268 269 /* 270 * There had better not be another VMEbus master responding 271 * to this interrupt level... 272 */ 273 vme1_reg_write(sc, VME1REG_IRQEN, 274 vme1_reg_read(sc, VME1REG_IRQEN) | VME1_IRQ_VME(level)); 275 } 276 } 277 278 void 279 vme_pcc_intr_disestablish(csc, level, vector, last, evcnt) 280 void *csc; 281 int level, vector, last; 282 struct evcnt *evcnt; 283 { 284 struct vme_pcc_softc *sc = csc; 285 286 isrunlink_vectored(vector); 287 288 if (last) { 289 vme1_reg_write(sc, VME1REG_IRQEN, 290 vme1_reg_read(sc, VME1REG_IRQEN) & ~VME1_IRQ_VME(level)); 291 evcnt_detach(evcnt); 292 } 293 } 294
Indexes created Sun Oct 19 21:10:07 GMT 2025