1 1.17 msaitoh /* $NetBSD: bus_dma.h,v 1.17 2021/12/05 04:54:20 msaitoh Exp $ */ 2 1.2 scw 3 1.2 scw /* 4 1.17 msaitoh * This file was extracted from next68k/include/bus.h 5 1.2 scw * and should probably be resynced when needed. 6 1.2 scw * original cvs id: NetBSD: bus_dma.h,v 1.3 1999/08/05 01:50:59 dbj Exp 7 1.2 scw */ 8 1.2 scw 9 1.2 scw /*- 10 1.7 thorpej * Copyright (c) 1997, 1998, 2001 The NetBSD Foundation, Inc. 11 1.2 scw * All rights reserved. 12 1.2 scw * 13 1.2 scw * This code is derived from software contributed to The NetBSD Foundation 14 1.2 scw * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 15 1.2 scw * NASA Ames Research Center. 16 1.2 scw * 17 1.2 scw * Redistribution and use in source and binary forms, with or without 18 1.2 scw * modification, are permitted provided that the following conditions 19 1.2 scw * are met: 20 1.2 scw * 1. Redistributions of source code must retain the above copyright 21 1.2 scw * notice, this list of conditions and the following disclaimer. 22 1.2 scw * 2. Redistributions in binary form must reproduce the above copyright 23 1.2 scw * notice, this list of conditions and the following disclaimer in the 24 1.2 scw * documentation and/or other materials provided with the distribution. 25 1.2 scw * 26 1.2 scw * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 1.2 scw * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 1.2 scw * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 1.2 scw * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 1.2 scw * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 1.2 scw * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 1.2 scw * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 1.2 scw * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 1.2 scw * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 1.2 scw * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 1.2 scw * POSSIBILITY OF SUCH DAMAGE. 37 1.2 scw */ 38 1.2 scw 39 1.2 scw /* 40 1.2 scw * Copyright (c) 1996 Carnegie-Mellon University. 41 1.2 scw * All rights reserved. 42 1.2 scw * 43 1.2 scw * Author: Chris G. Demetriou 44 1.2 scw * 45 1.2 scw * Permission to use, copy, modify and distribute this software and 46 1.2 scw * its documentation is hereby granted, provided that both the copyright 47 1.2 scw * notice and this permission notice appear in all copies of the 48 1.2 scw * software, derivative works or modified versions, and any portions 49 1.2 scw * thereof, and that both notices appear in supporting documentation. 50 1.2 scw * 51 1.2 scw * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 52 1.2 scw * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 53 1.2 scw * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. 54 1.2 scw * 55 1.2 scw * Carnegie Mellon requests users of this software to return to 56 1.2 scw * 57 1.2 scw * Software Distribution Coordinator or Software.Distribution (at) CS.CMU.EDU 58 1.2 scw * School of Computer Science 59 1.2 scw * Carnegie Mellon University 60 1.2 scw * Pittsburgh PA 15213-3890 61 1.2 scw * 62 1.2 scw * any improvements or extensions that they make and grant Carnegie the 63 1.2 scw * rights to redistribute these changes. 64 1.2 scw */ 65 1.2 scw 66 1.2 scw #ifndef _MVME68K_BUS_DMA_H_ 67 1.2 scw #define _MVME68K_BUS_DMA_H_ 68 1.2 scw 69 1.2 scw /* 70 1.2 scw * Bus DMA methods. 71 1.2 scw */ 72 1.2 scw 73 1.2 scw /* 74 1.2 scw * Flags used in various bus DMA methods. 75 1.2 scw */ 76 1.9 thorpej #define BUS_DMA_WAITOK 0x000 /* safe to sleep (pseudo-flag) */ 77 1.9 thorpej #define BUS_DMA_NOWAIT 0x001 /* not safe to sleep */ 78 1.9 thorpej #define BUS_DMA_ALLOCNOW 0x002 /* perform resource allocation now */ 79 1.9 thorpej #define BUS_DMA_COHERENT 0x004 /* hint: map memory DMA coherent */ 80 1.9 thorpej #define BUS_DMA_STREAMING 0x008 /* hint: sequential, unidirectional */ 81 1.9 thorpej #define BUS_DMA_BUS1 0x010 /* placeholders for bus functions... */ 82 1.9 thorpej #define BUS_DMA_BUS2 0x020 83 1.9 thorpej #define BUS_DMA_BUS3 0x040 84 1.9 thorpej #define BUS_DMA_BUS4 0x080 85 1.9 thorpej #define BUS_DMA_READ 0x100 /* mapping is device -> memory only */ 86 1.9 thorpej #define BUS_DMA_WRITE 0x200 /* mapping is memory -> device only */ 87 1.11 kent #define BUS_DMA_NOCACHE 0x400 /* hint: map non-cached memory */ 88 1.2 scw 89 1.2 scw /* 90 1.2 scw * Flags to constrain the physical memory allocated for DMA 91 1.2 scw */ 92 1.2 scw #define BUS_DMA_ONBOARD_RAM BUS_DMA_BUS1 93 1.2 scw #define BUS_DMA_24BIT BUS_DMA_BUS2 94 1.2 scw 95 1.2 scw /* Forwards needed by prototypes below. */ 96 1.2 scw struct mbuf; 97 1.2 scw struct uio; 98 1.2 scw 99 1.2 scw /* 100 1.2 scw * Operations performed by bus_dmamap_sync(). 101 1.2 scw */ 102 1.2 scw #define BUS_DMASYNC_PREREAD 0x01 /* pre-read synchronization */ 103 1.2 scw #define BUS_DMASYNC_POSTREAD 0x02 /* post-read synchronization */ 104 1.2 scw #define BUS_DMASYNC_PREWRITE 0x04 /* pre-write synchronization */ 105 1.2 scw #define BUS_DMASYNC_POSTWRITE 0x08 /* post-write synchronization */ 106 1.2 scw 107 1.2 scw typedef struct mvme68k_bus_dma_tag *bus_dma_tag_t; 108 1.2 scw typedef struct mvme68k_bus_dmamap *bus_dmamap_t; 109 1.2 scw 110 1.2 scw /* 111 1.2 scw * bus_dma_segment_t 112 1.2 scw * 113 1.2 scw * Describes a single contiguous DMA transaction. Values 114 1.2 scw * are suitable for programming into DMA registers. 115 1.2 scw */ 116 1.2 scw struct mvme68k_bus_dma_segment { 117 1.2 scw bus_addr_t ds_addr; /* DMA address */ 118 1.2 scw bus_size_t ds_len; /* length of transfer */ 119 1.5 scw 120 1.5 scw /* PRIVATE */ 121 1.5 scw bus_addr_t _ds_cpuaddr; /* CPU-relative phys addr of segment */ 122 1.8 scw int _ds_flags; 123 1.2 scw }; 124 1.2 scw typedef struct mvme68k_bus_dma_segment bus_dma_segment_t; 125 1.2 scw 126 1.2 scw /* 127 1.2 scw * bus_dma_tag_t 128 1.2 scw * 129 1.2 scw * A machine-dependent opaque type describing the implementation of 130 1.2 scw * DMA for a given bus. 131 1.2 scw */ 132 1.2 scw struct mvme68k_bus_dma_tag { 133 1.2 scw void *_cookie; /* cookie used in the guts */ 134 1.2 scw 135 1.2 scw /* 136 1.2 scw * DMA mapping methods. 137 1.2 scw */ 138 1.15 tsutsui int (*_dmamap_create)(bus_dma_tag_t, bus_size_t, int, 139 1.15 tsutsui bus_size_t, bus_size_t, int, bus_dmamap_t *); 140 1.15 tsutsui void (*_dmamap_destroy)(bus_dma_tag_t, bus_dmamap_t); 141 1.15 tsutsui int (*_dmamap_load)(bus_dma_tag_t, bus_dmamap_t, void *, 142 1.15 tsutsui bus_size_t, struct proc *, int); 143 1.15 tsutsui int (*_dmamap_load_mbuf)(bus_dma_tag_t, bus_dmamap_t, 144 1.15 tsutsui struct mbuf *, int); 145 1.15 tsutsui int (*_dmamap_load_uio)(bus_dma_tag_t, bus_dmamap_t, 146 1.15 tsutsui struct uio *, int); 147 1.15 tsutsui int (*_dmamap_load_raw)(bus_dma_tag_t, bus_dmamap_t, 148 1.15 tsutsui bus_dma_segment_t *, int, bus_size_t, int); 149 1.15 tsutsui void (*_dmamap_unload)(bus_dma_tag_t, bus_dmamap_t); 150 1.15 tsutsui void (*_dmamap_sync)(bus_dma_tag_t, bus_dmamap_t, 151 1.15 tsutsui bus_addr_t, bus_size_t, int); 152 1.2 scw 153 1.2 scw /* 154 1.2 scw * DMA memory utility functions. 155 1.2 scw */ 156 1.15 tsutsui int (*_dmamem_alloc)(bus_dma_tag_t, bus_size_t, bus_size_t, 157 1.15 tsutsui bus_size_t, bus_dma_segment_t *, int, int *, int); 158 1.15 tsutsui void (*_dmamem_free)(bus_dma_tag_t, 159 1.15 tsutsui bus_dma_segment_t *, int); 160 1.15 tsutsui int (*_dmamem_map)(bus_dma_tag_t, bus_dma_segment_t *, 161 1.15 tsutsui int, size_t, void **, int); 162 1.15 tsutsui void (*_dmamem_unmap)(bus_dma_tag_t, void *, size_t); 163 1.15 tsutsui paddr_t (*_dmamem_mmap)(bus_dma_tag_t, bus_dma_segment_t *, 164 1.15 tsutsui int, off_t, int, int); 165 1.2 scw }; 166 1.2 scw 167 1.2 scw #define bus_dmamap_create(t, s, n, m, b, f, p) \ 168 1.2 scw (*(t)->_dmamap_create)((t), (s), (n), (m), (b), (f), (p)) 169 1.2 scw #define bus_dmamap_destroy(t, p) \ 170 1.2 scw (*(t)->_dmamap_destroy)((t), (p)) 171 1.2 scw #define bus_dmamap_load(t, m, b, s, p, f) \ 172 1.2 scw (*(t)->_dmamap_load)((t), (m), (b), (s), (p), (f)) 173 1.2 scw #define bus_dmamap_load_mbuf(t, m, b, f) \ 174 1.2 scw (*(t)->_dmamap_load_mbuf)((t), (m), (b), (f)) 175 1.2 scw #define bus_dmamap_load_uio(t, m, u, f) \ 176 1.2 scw (*(t)->_dmamap_load_uio)((t), (m), (u), (f)) 177 1.2 scw #define bus_dmamap_load_raw(t, m, sg, n, s, f) \ 178 1.2 scw (*(t)->_dmamap_load_raw)((t), (m), (sg), (n), (s), (f)) 179 1.2 scw #define bus_dmamap_unload(t, p) \ 180 1.2 scw (*(t)->_dmamap_unload)((t), (p)) 181 1.2 scw #define bus_dmamap_sync(t, p, o, l, ops) \ 182 1.2 scw (*(t)->_dmamap_sync)((t), (p), (o), (l), (ops)) 183 1.2 scw #define bus_dmamem_alloc(t, s, a, b, sg, n, r, f) \ 184 1.2 scw (*(t)->_dmamem_alloc)((t), (s), (a), (b), (sg), (n), (r), (f)) 185 1.2 scw #define bus_dmamem_free(t, sg, n) \ 186 1.2 scw (*(t)->_dmamem_free)((t), (sg), (n)) 187 1.2 scw #define bus_dmamem_map(t, sg, n, s, k, f) \ 188 1.2 scw (*(t)->_dmamem_map)((t), (sg), (n), (s), (k), (f)) 189 1.2 scw #define bus_dmamem_unmap(t, k, s) \ 190 1.2 scw (*(t)->_dmamem_unmap)((t), (k), (s)) 191 1.2 scw #define bus_dmamem_mmap(t, sg, n, o, p, f) \ 192 1.2 scw (*(t)->_dmamem_mmap)((t), (sg), (n), (o), (p), (f)) 193 1.2 scw 194 1.2 scw /* 195 1.2 scw * bus_dmamap_t 196 1.2 scw * 197 1.2 scw * Describes a DMA mapping. 198 1.2 scw */ 199 1.2 scw struct mvme68k_bus_dmamap { 200 1.2 scw /* 201 1.2 scw * PRIVATE MEMBERS: not for use by machine-independent code. 202 1.2 scw */ 203 1.2 scw bus_size_t _dm_size; /* largest DMA transfer mappable */ 204 1.2 scw int _dm_segcnt; /* number of segs this map can map */ 205 1.12 matt bus_size_t _dm_maxmaxsegsz; /* fixed largest possible segment */ 206 1.2 scw bus_size_t _dm_boundary; /* don't cross this */ 207 1.2 scw int _dm_flags; /* misc. flags */ 208 1.4 scw void *_dm_cookie; /* Bus-specific cookie */ 209 1.2 scw 210 1.2 scw /* 211 1.2 scw * PUBLIC MEMBERS: these are used by machine-independent code. 212 1.2 scw */ 213 1.12 matt bus_size_t dm_maxsegsz; /* largest possible segment */ 214 1.2 scw bus_size_t dm_mapsize; /* size of the mapping */ 215 1.2 scw int dm_nsegs; /* # valid segments in mapping */ 216 1.2 scw bus_dma_segment_t dm_segs[1]; /* segments; variable length */ 217 1.2 scw }; 218 1.2 scw 219 1.2 scw #ifdef _MVME68K_BUS_DMA_PRIVATE 220 1.15 tsutsui int _bus_dmamap_create(bus_dma_tag_t, bus_size_t, int, bus_size_t, 221 1.15 tsutsui bus_size_t, int, bus_dmamap_t *); 222 1.15 tsutsui void _bus_dmamap_destroy(bus_dma_tag_t, bus_dmamap_t); 223 1.15 tsutsui 224 1.15 tsutsui int _bus_dmamap_load_direct(bus_dma_tag_t, bus_dmamap_t, 225 1.15 tsutsui void *, bus_size_t, struct proc *, int); 226 1.15 tsutsui int _bus_dmamap_load_mbuf_direct(bus_dma_tag_t, 227 1.15 tsutsui bus_dmamap_t, struct mbuf *, int); 228 1.15 tsutsui int _bus_dmamap_load_uio_direct(bus_dma_tag_t, 229 1.15 tsutsui bus_dmamap_t, struct uio *, int); 230 1.15 tsutsui int _bus_dmamap_load_raw_direct(bus_dma_tag_t, 231 1.15 tsutsui bus_dmamap_t, bus_dma_segment_t *, int, bus_size_t, int); 232 1.15 tsutsui void _bus_dmamap_unload(bus_dma_tag_t, bus_dmamap_t); 233 1.15 tsutsui void _bus_dmamap_sync_030(bus_dma_tag_t, bus_dmamap_t, bus_addr_t, 234 1.15 tsutsui bus_size_t, int); 235 1.15 tsutsui void _bus_dmamap_sync_0460(bus_dma_tag_t, bus_dmamap_t, bus_addr_t, 236 1.15 tsutsui bus_size_t, int); 237 1.15 tsutsui int _bus_dmamem_alloc(bus_dma_tag_t tag, bus_size_t size, 238 1.2 scw bus_size_t alignment, bus_size_t boundary, 239 1.15 tsutsui bus_dma_segment_t *segs, int nsegs, int *rsegs, int flags); 240 1.15 tsutsui void _bus_dmamem_free(bus_dma_tag_t tag, bus_dma_segment_t *segs, 241 1.15 tsutsui int nsegs); 242 1.15 tsutsui int _bus_dmamem_map(bus_dma_tag_t tag, bus_dma_segment_t *segs, 243 1.15 tsutsui int nsegs, size_t size, void **kvap, int flags); 244 1.15 tsutsui void _bus_dmamem_unmap(bus_dma_tag_t tag, void *kva, size_t size); 245 1.15 tsutsui paddr_t _bus_dmamem_mmap(bus_dma_tag_t tag, bus_dma_segment_t *segs, 246 1.15 tsutsui int nsegs, off_t off, int prot, int flags); 247 1.2 scw #endif /* _MVME68K_BUS_DMA_PRIVATE */ 248 1.10 scw 249 1.10 scw /* Needed by mvmebus.c */ 250 1.15 tsutsui int _bus_dmamem_alloc_common(bus_dma_tag_t, 251 1.10 scw bus_addr_t, bus_addr_t, bus_size_t, bus_size_t, bus_size_t, 252 1.15 tsutsui bus_dma_segment_t *, int, int *, int); 253 1.2 scw 254 1.2 scw #endif /* _MVME68K_BUS_DMA_H_ */ 255