1 /* $NetBSD: bus_dma.h,v 1.17 2021/12/05 04:54:20 msaitoh Exp $ */ 2 3 /* 4 * This file was extracted from next68k/include/bus.h 5 * and should probably be resynced when needed. 6 * original cvs id: NetBSD: bus_dma.h,v 1.3 1999/08/05 01:50:59 dbj Exp 7 */ 8 9 /*- 10 * Copyright (c) 1997, 1998, 2001 The NetBSD Foundation, Inc. 11 * All rights reserved. 12 * 13 * This code is derived from software contributed to The NetBSD Foundation 14 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 15 * NASA Ames Research Center. 16 * 17 * Redistribution and use in source and binary forms, with or without 18 * modification, are permitted provided that the following conditions 19 * are met: 20 * 1. Redistributions of source code must retain the above copyright 21 * notice, this list of conditions and the following disclaimer. 22 * 2. Redistributions in binary form must reproduce the above copyright 23 * notice, this list of conditions and the following disclaimer in the 24 * documentation and/or other materials provided with the distribution. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * Copyright (c) 1996 Carnegie-Mellon University. 41 * All rights reserved. 42 * 43 * Author: Chris G. Demetriou 44 * 45 * Permission to use, copy, modify and distribute this software and 46 * its documentation is hereby granted, provided that both the copyright 47 * notice and this permission notice appear in all copies of the 48 * software, derivative works or modified versions, and any portions 49 * thereof, and that both notices appear in supporting documentation. 50 * 51 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 52 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 53 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. 54 * 55 * Carnegie Mellon requests users of this software to return to 56 * 57 * Software Distribution Coordinator or Software.Distribution (at) CS.CMU.EDU 58 * School of Computer Science 59 * Carnegie Mellon University 60 * Pittsburgh PA 15213-3890 61 * 62 * any improvements or extensions that they make and grant Carnegie the 63 * rights to redistribute these changes. 64 */ 65 66 #ifndef _MVME68K_BUS_DMA_H_ 67 #define _MVME68K_BUS_DMA_H_ 68 69 /* 70 * Bus DMA methods. 71 */ 72 73 /* 74 * Flags used in various bus DMA methods. 75 */ 76 #define BUS_DMA_WAITOK 0x000 /* safe to sleep (pseudo-flag) */ 77 #define BUS_DMA_NOWAIT 0x001 /* not safe to sleep */ 78 #define BUS_DMA_ALLOCNOW 0x002 /* perform resource allocation now */ 79 #define BUS_DMA_COHERENT 0x004 /* hint: map memory DMA coherent */ 80 #define BUS_DMA_STREAMING 0x008 /* hint: sequential, unidirectional */ 81 #define BUS_DMA_BUS1 0x010 /* placeholders for bus functions... */ 82 #define BUS_DMA_BUS2 0x020 83 #define BUS_DMA_BUS3 0x040 84 #define BUS_DMA_BUS4 0x080 85 #define BUS_DMA_READ 0x100 /* mapping is device -> memory only */ 86 #define BUS_DMA_WRITE 0x200 /* mapping is memory -> device only */ 87 #define BUS_DMA_NOCACHE 0x400 /* hint: map non-cached memory */ 88 89 /* 90 * Flags to constrain the physical memory allocated for DMA 91 */ 92 #define BUS_DMA_ONBOARD_RAM BUS_DMA_BUS1 93 #define BUS_DMA_24BIT BUS_DMA_BUS2 94 95 /* Forwards needed by prototypes below. */ 96 struct mbuf; 97 struct uio; 98 99 /* 100 * Operations performed by bus_dmamap_sync(). 101 */ 102 #define BUS_DMASYNC_PREREAD 0x01 /* pre-read synchronization */ 103 #define BUS_DMASYNC_POSTREAD 0x02 /* post-read synchronization */ 104 #define BUS_DMASYNC_PREWRITE 0x04 /* pre-write synchronization */ 105 #define BUS_DMASYNC_POSTWRITE 0x08 /* post-write synchronization */ 106 107 typedef struct mvme68k_bus_dma_tag *bus_dma_tag_t; 108 typedef struct mvme68k_bus_dmamap *bus_dmamap_t; 109 110 /* 111 * bus_dma_segment_t 112 * 113 * Describes a single contiguous DMA transaction. Values 114 * are suitable for programming into DMA registers. 115 */ 116 struct mvme68k_bus_dma_segment { 117 bus_addr_t ds_addr; /* DMA address */ 118 bus_size_t ds_len; /* length of transfer */ 119 120 /* PRIVATE */ 121 bus_addr_t _ds_cpuaddr; /* CPU-relative phys addr of segment */ 122 int _ds_flags; 123 }; 124 typedef struct mvme68k_bus_dma_segment bus_dma_segment_t; 125 126 /* 127 * bus_dma_tag_t 128 * 129 * A machine-dependent opaque type describing the implementation of 130 * DMA for a given bus. 131 */ 132 struct mvme68k_bus_dma_tag { 133 void *_cookie; /* cookie used in the guts */ 134 135 /* 136 * DMA mapping methods. 137 */ 138 int (*_dmamap_create)(bus_dma_tag_t, bus_size_t, int, 139 bus_size_t, bus_size_t, int, bus_dmamap_t *); 140 void (*_dmamap_destroy)(bus_dma_tag_t, bus_dmamap_t); 141 int (*_dmamap_load)(bus_dma_tag_t, bus_dmamap_t, void *, 142 bus_size_t, struct proc *, int); 143 int (*_dmamap_load_mbuf)(bus_dma_tag_t, bus_dmamap_t, 144 struct mbuf *, int); 145 int (*_dmamap_load_uio)(bus_dma_tag_t, bus_dmamap_t, 146 struct uio *, int); 147 int (*_dmamap_load_raw)(bus_dma_tag_t, bus_dmamap_t, 148 bus_dma_segment_t *, int, bus_size_t, int); 149 void (*_dmamap_unload)(bus_dma_tag_t, bus_dmamap_t); 150 void (*_dmamap_sync)(bus_dma_tag_t, bus_dmamap_t, 151 bus_addr_t, bus_size_t, int); 152 153 /* 154 * DMA memory utility functions. 155 */ 156 int (*_dmamem_alloc)(bus_dma_tag_t, bus_size_t, bus_size_t, 157 bus_size_t, bus_dma_segment_t *, int, int *, int); 158 void (*_dmamem_free)(bus_dma_tag_t, 159 bus_dma_segment_t *, int); 160 int (*_dmamem_map)(bus_dma_tag_t, bus_dma_segment_t *, 161 int, size_t, void **, int); 162 void (*_dmamem_unmap)(bus_dma_tag_t, void *, size_t); 163 paddr_t (*_dmamem_mmap)(bus_dma_tag_t, bus_dma_segment_t *, 164 int, off_t, int, int); 165 }; 166 167 #define bus_dmamap_create(t, s, n, m, b, f, p) \ 168 (*(t)->_dmamap_create)((t), (s), (n), (m), (b), (f), (p)) 169 #define bus_dmamap_destroy(t, p) \ 170 (*(t)->_dmamap_destroy)((t), (p)) 171 #define bus_dmamap_load(t, m, b, s, p, f) \ 172 (*(t)->_dmamap_load)((t), (m), (b), (s), (p), (f)) 173 #define bus_dmamap_load_mbuf(t, m, b, f) \ 174 (*(t)->_dmamap_load_mbuf)((t), (m), (b), (f)) 175 #define bus_dmamap_load_uio(t, m, u, f) \ 176 (*(t)->_dmamap_load_uio)((t), (m), (u), (f)) 177 #define bus_dmamap_load_raw(t, m, sg, n, s, f) \ 178 (*(t)->_dmamap_load_raw)((t), (m), (sg), (n), (s), (f)) 179 #define bus_dmamap_unload(t, p) \ 180 (*(t)->_dmamap_unload)((t), (p)) 181 #define bus_dmamap_sync(t, p, o, l, ops) \ 182 (*(t)->_dmamap_sync)((t), (p), (o), (l), (ops)) 183 #define bus_dmamem_alloc(t, s, a, b, sg, n, r, f) \ 184 (*(t)->_dmamem_alloc)((t), (s), (a), (b), (sg), (n), (r), (f)) 185 #define bus_dmamem_free(t, sg, n) \ 186 (*(t)->_dmamem_free)((t), (sg), (n)) 187 #define bus_dmamem_map(t, sg, n, s, k, f) \ 188 (*(t)->_dmamem_map)((t), (sg), (n), (s), (k), (f)) 189 #define bus_dmamem_unmap(t, k, s) \ 190 (*(t)->_dmamem_unmap)((t), (k), (s)) 191 #define bus_dmamem_mmap(t, sg, n, o, p, f) \ 192 (*(t)->_dmamem_mmap)((t), (sg), (n), (o), (p), (f)) 193 194 /* 195 * bus_dmamap_t 196 * 197 * Describes a DMA mapping. 198 */ 199 struct mvme68k_bus_dmamap { 200 /* 201 * PRIVATE MEMBERS: not for use by machine-independent code. 202 */ 203 bus_size_t _dm_size; /* largest DMA transfer mappable */ 204 int _dm_segcnt; /* number of segs this map can map */ 205 bus_size_t _dm_maxmaxsegsz; /* fixed largest possible segment */ 206 bus_size_t _dm_boundary; /* don't cross this */ 207 int _dm_flags; /* misc. flags */ 208 void *_dm_cookie; /* Bus-specific cookie */ 209 210 /* 211 * PUBLIC MEMBERS: these are used by machine-independent code. 212 */ 213 bus_size_t dm_maxsegsz; /* largest possible segment */ 214 bus_size_t dm_mapsize; /* size of the mapping */ 215 int dm_nsegs; /* # valid segments in mapping */ 216 bus_dma_segment_t dm_segs[1]; /* segments; variable length */ 217 }; 218 219 #ifdef _MVME68K_BUS_DMA_PRIVATE 220 int _bus_dmamap_create(bus_dma_tag_t, bus_size_t, int, bus_size_t, 221 bus_size_t, int, bus_dmamap_t *); 222 void _bus_dmamap_destroy(bus_dma_tag_t, bus_dmamap_t); 223 224 int _bus_dmamap_load_direct(bus_dma_tag_t, bus_dmamap_t, 225 void *, bus_size_t, struct proc *, int); 226 int _bus_dmamap_load_mbuf_direct(bus_dma_tag_t, 227 bus_dmamap_t, struct mbuf *, int); 228 int _bus_dmamap_load_uio_direct(bus_dma_tag_t, 229 bus_dmamap_t, struct uio *, int); 230 int _bus_dmamap_load_raw_direct(bus_dma_tag_t, 231 bus_dmamap_t, bus_dma_segment_t *, int, bus_size_t, int); 232 void _bus_dmamap_unload(bus_dma_tag_t, bus_dmamap_t); 233 void _bus_dmamap_sync_030(bus_dma_tag_t, bus_dmamap_t, bus_addr_t, 234 bus_size_t, int); 235 void _bus_dmamap_sync_0460(bus_dma_tag_t, bus_dmamap_t, bus_addr_t, 236 bus_size_t, int); 237 int _bus_dmamem_alloc(bus_dma_tag_t tag, bus_size_t size, 238 bus_size_t alignment, bus_size_t boundary, 239 bus_dma_segment_t *segs, int nsegs, int *rsegs, int flags); 240 void _bus_dmamem_free(bus_dma_tag_t tag, bus_dma_segment_t *segs, 241 int nsegs); 242 int _bus_dmamem_map(bus_dma_tag_t tag, bus_dma_segment_t *segs, 243 int nsegs, size_t size, void **kvap, int flags); 244 void _bus_dmamem_unmap(bus_dma_tag_t tag, void *kva, size_t size); 245 paddr_t _bus_dmamem_mmap(bus_dma_tag_t tag, bus_dma_segment_t *segs, 246 int nsegs, off_t off, int prot, int flags); 247 #endif /* _MVME68K_BUS_DMA_PRIVATE */ 248 249 /* Needed by mvmebus.c */ 250 int _bus_dmamem_alloc_common(bus_dma_tag_t, 251 bus_addr_t, bus_addr_t, bus_size_t, bus_size_t, bus_size_t, 252 bus_dma_segment_t *, int, int *, int); 253 254 #endif /* _MVME68K_BUS_DMA_H_ */ 255
Indexes created Sat Sep 20 22:09:52 GMT 2025