bus_dma.h revision 1.2 1 1.2 scw /* $NetBSD: bus_dma.h,v 1.2 2000/03/18 22:33:05 scw Exp $ */
2 1.2 scw
3 1.2 scw /*
4 1.2 scw * This file was extracted from from next68k/include/bus.h
5 1.2 scw * and should probably be resynced when needed.
6 1.2 scw * original cvs id: NetBSD: bus_dma.h,v 1.3 1999/08/05 01:50:59 dbj Exp
7 1.2 scw */
8 1.2 scw
9 1.2 scw /*-
10 1.2 scw * Copyright (c) 1997, 1998 The NetBSD Foundation, Inc.
11 1.2 scw * All rights reserved.
12 1.2 scw *
13 1.2 scw * This code is derived from software contributed to The NetBSD Foundation
14 1.2 scw * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
15 1.2 scw * NASA Ames Research Center.
16 1.2 scw *
17 1.2 scw * Redistribution and use in source and binary forms, with or without
18 1.2 scw * modification, are permitted provided that the following conditions
19 1.2 scw * are met:
20 1.2 scw * 1. Redistributions of source code must retain the above copyright
21 1.2 scw * notice, this list of conditions and the following disclaimer.
22 1.2 scw * 2. Redistributions in binary form must reproduce the above copyright
23 1.2 scw * notice, this list of conditions and the following disclaimer in the
24 1.2 scw * documentation and/or other materials provided with the distribution.
25 1.2 scw * 3. All advertising materials mentioning features or use of this software
26 1.2 scw * must display the following acknowledgement:
27 1.2 scw * This product includes software developed by the NetBSD
28 1.2 scw * Foundation, Inc. and its contributors.
29 1.2 scw * 4. Neither the name of The NetBSD Foundation nor the names of its
30 1.2 scw * contributors may be used to endorse or promote products derived
31 1.2 scw * from this software without specific prior written permission.
32 1.2 scw *
33 1.2 scw * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
34 1.2 scw * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
35 1.2 scw * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
36 1.2 scw * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
37 1.2 scw * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
38 1.2 scw * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
39 1.2 scw * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
40 1.2 scw * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
41 1.2 scw * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
42 1.2 scw * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
43 1.2 scw * POSSIBILITY OF SUCH DAMAGE.
44 1.2 scw */
45 1.2 scw
46 1.2 scw /*
47 1.2 scw * Copyright (c) 1996 Carnegie-Mellon University.
48 1.2 scw * All rights reserved.
49 1.2 scw *
50 1.2 scw * Author: Chris G. Demetriou
51 1.2 scw *
52 1.2 scw * Permission to use, copy, modify and distribute this software and
53 1.2 scw * its documentation is hereby granted, provided that both the copyright
54 1.2 scw * notice and this permission notice appear in all copies of the
55 1.2 scw * software, derivative works or modified versions, and any portions
56 1.2 scw * thereof, and that both notices appear in supporting documentation.
57 1.2 scw *
58 1.2 scw * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
59 1.2 scw * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
60 1.2 scw * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
61 1.2 scw *
62 1.2 scw * Carnegie Mellon requests users of this software to return to
63 1.2 scw *
64 1.2 scw * Software Distribution Coordinator or Software.Distribution (at) CS.CMU.EDU
65 1.2 scw * School of Computer Science
66 1.2 scw * Carnegie Mellon University
67 1.2 scw * Pittsburgh PA 15213-3890
68 1.2 scw *
69 1.2 scw * any improvements or extensions that they make and grant Carnegie the
70 1.2 scw * rights to redistribute these changes.
71 1.2 scw */
72 1.2 scw
73 1.2 scw #ifndef _MVME68K_BUS_DMA_H_
74 1.2 scw #define _MVME68K_BUS_DMA_H_
75 1.2 scw
76 1.2 scw /*
77 1.2 scw * Bus DMA methods.
78 1.2 scw */
79 1.2 scw
80 1.2 scw /*
81 1.2 scw * Flags used in various bus DMA methods.
82 1.2 scw */
83 1.2 scw #define BUS_DMA_WAITOK 0x00 /* safe to sleep (pseudo-flag) */
84 1.2 scw #define BUS_DMA_NOWAIT 0x01 /* not safe to sleep */
85 1.2 scw #define BUS_DMA_ALLOCNOW 0x02 /* perform resource allocation now */
86 1.2 scw #define BUS_DMA_COHERENT 0x04 /* hint: map memory DMA coherent */
87 1.2 scw #define BUS_DMA_BUS1 0x10 /* placeholders for bus functions... */
88 1.2 scw #define BUS_DMA_BUS2 0x20
89 1.2 scw #define BUS_DMA_BUS3 0x40
90 1.2 scw #define BUS_DMA_BUS4 0x80
91 1.2 scw
92 1.2 scw /*
93 1.2 scw * Flags to constrain the physical memory allocated for DMA
94 1.2 scw */
95 1.2 scw #define BUS_DMA_ONBOARD_RAM BUS_DMA_BUS1
96 1.2 scw #define BUS_DMA_24BIT BUS_DMA_BUS2
97 1.2 scw
98 1.2 scw /* Forwards needed by prototypes below. */
99 1.2 scw struct mbuf;
100 1.2 scw struct uio;
101 1.2 scw
102 1.2 scw /*
103 1.2 scw * Operations performed by bus_dmamap_sync().
104 1.2 scw */
105 1.2 scw #define BUS_DMASYNC_PREREAD 0x01 /* pre-read synchronization */
106 1.2 scw #define BUS_DMASYNC_POSTREAD 0x02 /* post-read synchronization */
107 1.2 scw #define BUS_DMASYNC_PREWRITE 0x04 /* pre-write synchronization */
108 1.2 scw #define BUS_DMASYNC_POSTWRITE 0x08 /* post-write synchronization */
109 1.2 scw
110 1.2 scw typedef struct mvme68k_bus_dma_tag *bus_dma_tag_t;
111 1.2 scw typedef struct mvme68k_bus_dmamap *bus_dmamap_t;
112 1.2 scw
113 1.2 scw /*
114 1.2 scw * bus_dma_segment_t
115 1.2 scw *
116 1.2 scw * Describes a single contiguous DMA transaction. Values
117 1.2 scw * are suitable for programming into DMA registers.
118 1.2 scw */
119 1.2 scw struct mvme68k_bus_dma_segment {
120 1.2 scw bus_addr_t ds_addr; /* DMA address */
121 1.2 scw bus_size_t ds_len; /* length of transfer */
122 1.2 scw };
123 1.2 scw typedef struct mvme68k_bus_dma_segment bus_dma_segment_t;
124 1.2 scw
125 1.2 scw /*
126 1.2 scw * bus_dma_tag_t
127 1.2 scw *
128 1.2 scw * A machine-dependent opaque type describing the implementation of
129 1.2 scw * DMA for a given bus.
130 1.2 scw */
131 1.2 scw struct mvme68k_bus_dma_tag {
132 1.2 scw void *_cookie; /* cookie used in the guts */
133 1.2 scw
134 1.2 scw /*
135 1.2 scw * DMA mapping methods.
136 1.2 scw */
137 1.2 scw int (*_dmamap_create) __P((bus_dma_tag_t, bus_size_t, int,
138 1.2 scw bus_size_t, bus_size_t, int, bus_dmamap_t *));
139 1.2 scw void (*_dmamap_destroy) __P((bus_dma_tag_t, bus_dmamap_t));
140 1.2 scw int (*_dmamap_load) __P((bus_dma_tag_t, bus_dmamap_t, void *,
141 1.2 scw bus_size_t, struct proc *, int));
142 1.2 scw int (*_dmamap_load_mbuf) __P((bus_dma_tag_t, bus_dmamap_t,
143 1.2 scw struct mbuf *, int));
144 1.2 scw int (*_dmamap_load_uio) __P((bus_dma_tag_t, bus_dmamap_t,
145 1.2 scw struct uio *, int));
146 1.2 scw int (*_dmamap_load_raw) __P((bus_dma_tag_t, bus_dmamap_t,
147 1.2 scw bus_dma_segment_t *, int, bus_size_t, int));
148 1.2 scw void (*_dmamap_unload) __P((bus_dma_tag_t, bus_dmamap_t));
149 1.2 scw void (*_dmamap_sync) __P((bus_dma_tag_t, bus_dmamap_t,
150 1.2 scw bus_addr_t, bus_size_t, int));
151 1.2 scw
152 1.2 scw /*
153 1.2 scw * DMA memory utility functions.
154 1.2 scw */
155 1.2 scw int (*_dmamem_alloc) __P((bus_dma_tag_t, bus_size_t, bus_size_t,
156 1.2 scw bus_size_t, bus_dma_segment_t *, int, int *, int));
157 1.2 scw void (*_dmamem_free) __P((bus_dma_tag_t,
158 1.2 scw bus_dma_segment_t *, int));
159 1.2 scw int (*_dmamem_map) __P((bus_dma_tag_t, bus_dma_segment_t *,
160 1.2 scw int, size_t, caddr_t *, int));
161 1.2 scw void (*_dmamem_unmap) __P((bus_dma_tag_t, caddr_t, size_t));
162 1.2 scw int (*_dmamem_mmap) __P((bus_dma_tag_t, bus_dma_segment_t *,
163 1.2 scw int, int, int, int));
164 1.2 scw };
165 1.2 scw
166 1.2 scw #define bus_dmamap_create(t, s, n, m, b, f, p) \
167 1.2 scw (*(t)->_dmamap_create)((t), (s), (n), (m), (b), (f), (p))
168 1.2 scw #define bus_dmamap_destroy(t, p) \
169 1.2 scw (*(t)->_dmamap_destroy)((t), (p))
170 1.2 scw #define bus_dmamap_load(t, m, b, s, p, f) \
171 1.2 scw (*(t)->_dmamap_load)((t), (m), (b), (s), (p), (f))
172 1.2 scw #define bus_dmamap_load_mbuf(t, m, b, f) \
173 1.2 scw (*(t)->_dmamap_load_mbuf)((t), (m), (b), (f))
174 1.2 scw #define bus_dmamap_load_uio(t, m, u, f) \
175 1.2 scw (*(t)->_dmamap_load_uio)((t), (m), (u), (f))
176 1.2 scw #define bus_dmamap_load_raw(t, m, sg, n, s, f) \
177 1.2 scw (*(t)->_dmamap_load_raw)((t), (m), (sg), (n), (s), (f))
178 1.2 scw #define bus_dmamap_unload(t, p) \
179 1.2 scw (*(t)->_dmamap_unload)((t), (p))
180 1.2 scw #define bus_dmamap_sync(t, p, o, l, ops) \
181 1.2 scw (*(t)->_dmamap_sync)((t), (p), (o), (l), (ops))
182 1.2 scw #define bus_dmamem_alloc(t, s, a, b, sg, n, r, f) \
183 1.2 scw (*(t)->_dmamem_alloc)((t), (s), (a), (b), (sg), (n), (r), (f))
184 1.2 scw #define bus_dmamem_free(t, sg, n) \
185 1.2 scw (*(t)->_dmamem_free)((t), (sg), (n))
186 1.2 scw #define bus_dmamem_map(t, sg, n, s, k, f) \
187 1.2 scw (*(t)->_dmamem_map)((t), (sg), (n), (s), (k), (f))
188 1.2 scw #define bus_dmamem_unmap(t, k, s) \
189 1.2 scw (*(t)->_dmamem_unmap)((t), (k), (s))
190 1.2 scw #define bus_dmamem_mmap(t, sg, n, o, p, f) \
191 1.2 scw (*(t)->_dmamem_mmap)((t), (sg), (n), (o), (p), (f))
192 1.2 scw
193 1.2 scw /*
194 1.2 scw * bus_dmamap_t
195 1.2 scw *
196 1.2 scw * Describes a DMA mapping.
197 1.2 scw */
198 1.2 scw struct mvme68k_bus_dmamap {
199 1.2 scw /*
200 1.2 scw * PRIVATE MEMBERS: not for use by machine-independent code.
201 1.2 scw */
202 1.2 scw bus_size_t _dm_size; /* largest DMA transfer mappable */
203 1.2 scw int _dm_segcnt; /* number of segs this map can map */
204 1.2 scw bus_size_t _dm_maxsegsz; /* largest possible segment */
205 1.2 scw bus_size_t _dm_boundary; /* don't cross this */
206 1.2 scw int _dm_flags; /* misc. flags */
207 1.2 scw
208 1.2 scw /*
209 1.2 scw * PUBLIC MEMBERS: these are used by machine-independent code.
210 1.2 scw */
211 1.2 scw bus_size_t dm_mapsize; /* size of the mapping */
212 1.2 scw int dm_nsegs; /* # valid segments in mapping */
213 1.2 scw bus_dma_segment_t dm_segs[1]; /* segments; variable length */
214 1.2 scw };
215 1.2 scw
216 1.2 scw #ifdef _MVME68K_BUS_DMA_PRIVATE
217 1.2 scw int _bus_dmamap_create __P((bus_dma_tag_t, bus_size_t, int, bus_size_t,
218 1.2 scw bus_size_t, int, bus_dmamap_t *));
219 1.2 scw void _bus_dmamap_destroy __P((bus_dma_tag_t, bus_dmamap_t));
220 1.2 scw
221 1.2 scw int _bus_dmamap_load_direct __P((bus_dma_tag_t, bus_dmamap_t,
222 1.2 scw void *, bus_size_t, struct proc *, int));
223 1.2 scw int _bus_dmamap_load_mbuf_direct __P((bus_dma_tag_t,
224 1.2 scw bus_dmamap_t, struct mbuf *, int));
225 1.2 scw int _bus_dmamap_load_uio_direct __P((bus_dma_tag_t,
226 1.2 scw bus_dmamap_t, struct uio *, int));
227 1.2 scw int _bus_dmamap_load_raw_direct __P((bus_dma_tag_t,
228 1.2 scw bus_dmamap_t, bus_dma_segment_t *, int, bus_size_t, int));
229 1.2 scw
230 1.2 scw void _bus_dmamap_unload __P((bus_dma_tag_t, bus_dmamap_t));
231 1.2 scw void _bus_dmamap_sync __P((bus_dma_tag_t, bus_dmamap_t, bus_addr_t,
232 1.2 scw bus_size_t, int));
233 1.2 scw
234 1.2 scw int _bus_dmamem_alloc __P((bus_dma_tag_t tag, bus_size_t size,
235 1.2 scw bus_size_t alignment, bus_size_t boundary,
236 1.2 scw bus_dma_segment_t *segs, int nsegs, int *rsegs, int flags));
237 1.2 scw void _bus_dmamem_free __P((bus_dma_tag_t tag, bus_dma_segment_t *segs,
238 1.2 scw int nsegs));
239 1.2 scw int _bus_dmamem_map __P((bus_dma_tag_t tag, bus_dma_segment_t *segs,
240 1.2 scw int nsegs, size_t size, caddr_t *kvap, int flags));
241 1.2 scw void _bus_dmamem_unmap __P((bus_dma_tag_t tag, caddr_t kva,
242 1.2 scw size_t size));
243 1.2 scw int _bus_dmamem_mmap __P((bus_dma_tag_t tag, bus_dma_segment_t *segs,
244 1.2 scw int nsegs, int off, int prot, int flags));
245 1.2 scw #endif /* _MVME68K_BUS_DMA_PRIVATE */
246 1.2 scw
247 1.2 scw #endif /* _MVME68K_BUS_DMA_H_ */
248