Home | History | Annotate | Line # | Download | only in pci
pci_machdep.c revision 1.1.2.2 
      1  1.1.2.2  bouyer #include <sys/param.h>
      2  1.1.2.2  bouyer #include <sys/device.h>
      3  1.1.2.2  bouyer #include <dev/pci/pcireg.h>
      4  1.1.2.2  bouyer #include <dev/pci/pcivar.h>
      5  1.1.2.2  bouyer 
      6  1.1.2.2  bouyer #include <arm32/footbridge/dc21285reg.h>
      7  1.1.2.2  bouyer 
      8  1.1.2.2  bouyer void
      9  1.1.2.2  bouyer netwinder_pci_attach_hook (struct device *parent,
     10  1.1.2.2  bouyer 	struct device *self, struct pcibus_attach_args *pba)
     11  1.1.2.2  bouyer {
     12  1.1.2.2  bouyer 	pcireg_t regval;
     13  1.1.2.2  bouyer 	pcireg_t intreg;
     14  1.1.2.2  bouyer 	pcitag_t tag;
     15  1.1.2.2  bouyer 
     16  1.1.2.2  bouyer 	/*
     17  1.1.2.2  bouyer 	 * Initialize the TULIP
     18  1.1.2.2  bouyer 	 */
     19  1.1.2.2  bouyer 	tag = pci_make_tag(pba->pba_pc, pba->pba_bus, 9, 0);
     20  1.1.2.2  bouyer 	pci_conf_write(pba->pba_pc, tag,
     21  1.1.2.2  bouyer 		PCI_COMMAND_STATUS_REG,
     22  1.1.2.2  bouyer 		PCI_COMMAND_IO_ENABLE|
     23  1.1.2.2  bouyer 		PCI_COMMAND_MASTER_ENABLE);
     24  1.1.2.2  bouyer 	intreg = pci_conf_read(pba->pba_pc, tag, PCI_INTERRUPT_REG);
     25  1.1.2.2  bouyer 	intreg = PCI_INTERRUPT_CODE(
     26  1.1.2.2  bouyer 		PCI_INTERRUPT_LATENCY(intreg),
     27  1.1.2.2  bouyer 		PCI_INTERRUPT_GRANT(intreg),
     28  1.1.2.2  bouyer 		PCI_INTERRUPT_PIN(intreg),
     29  1.1.2.2  bouyer 		0x40|IRQ_IN_L1);
     30  1.1.2.2  bouyer 	pci_conf_write(pba->pba_pc, tag, PCI_INTERRUPT_REG, intreg);
     31  1.1.2.2  bouyer 	pci_conf_write(pba->pba_pc, tag, 0x10, 0x400 | PCI_MAPREG_TYPE_IO);
     32  1.1.2.2  bouyer 	pci_conf_write(pba->pba_pc, tag, 0x14, 0);
     33  1.1.2.2  bouyer 
     34  1.1.2.2  bouyer 	/*
     35  1.1.2.2  bouyer 	 * Initialize the PCI NE2000
     36  1.1.2.2  bouyer 	 */
     37  1.1.2.2  bouyer 	tag = pci_make_tag(pba->pba_pc, pba->pba_bus, 12, 0);
     38  1.1.2.2  bouyer 	pci_conf_write(pba->pba_pc, tag,
     39  1.1.2.2  bouyer 				PCI_COMMAND_STATUS_REG,
     40  1.1.2.2  bouyer 				PCI_COMMAND_IO_ENABLE|
     41  1.1.2.2  bouyer 				PCI_COMMAND_MASTER_ENABLE);
     42  1.1.2.2  bouyer 	intreg = pci_conf_read(pba->pba_pc, tag, PCI_INTERRUPT_REG);
     43  1.1.2.2  bouyer 	intreg = PCI_INTERRUPT_CODE(
     44  1.1.2.2  bouyer 		PCI_INTERRUPT_LATENCY(intreg),
     45  1.1.2.2  bouyer 		PCI_INTERRUPT_GRANT(intreg),
     46  1.1.2.2  bouyer 		PCI_INTERRUPT_PIN(intreg),
     47  1.1.2.2  bouyer 		0x40|IRQ_IN_L0);
     48  1.1.2.2  bouyer 	pci_conf_write(pba->pba_pc, tag, PCI_INTERRUPT_REG, intreg);
     49  1.1.2.2  bouyer 	pci_conf_write(pba->pba_pc, tag, 0x10, 0x300 | PCI_MAPREG_TYPE_IO);
     50  1.1.2.2  bouyer 
     51  1.1.2.2  bouyer #if 0
     52  1.1.2.2  bouyer 	/*
     53  1.1.2.2  bouyer 	 * Initialize the PCI-ISA Bridge
     54  1.1.2.2  bouyer 	 */
     55  1.1.2.2  bouyer 	tag = pci_make_tag(pba->pba_pc, pba->pba_bus, 11, 0);
     56  1.1.2.2  bouyer 	pci_conf_write(pba->pba_pc, tag,
     57  1.1.2.2  bouyer 		PCI_COMMAND_STATUS_REG,
     58  1.1.2.2  bouyer 		PCI_COMMAND_IO_ENABLE|
     59  1.1.2.2  bouyer 		PCI_COMMAND_MEM_ENABLE|
     60  1.1.2.2  bouyer 		PCI_COMMAND_MASTER_ENABLE);
     61  1.1.2.2  bouyer 	pci_conf_write(pba->pba_pc, tag, 0x10, 0);
     62  1.1.2.2  bouyer 	pci_conf_write(pba->pba_pc, tag, 0x48,
     63  1.1.2.2  bouyer 		pci_conf_read(pba->pba_pc, tag, 0x48)|0xff);
     64  1.1.2.2  bouyer 
     65  1.1.2.2  bouyer 	regval = pci_conf_read(pba->pba_pc, tag, 0x40);
     66  1.1.2.2  bouyer 	regval &= 0xff00ff00;
     67  1.1.2.2  bouyer 	regval |= 0x00000022;
     68  1.1.2.2  bouyer 	pci_conf_write(pba->pba_pc, tag, 0x40, regval);
     69  1.1.2.2  bouyer 
     70  1.1.2.2  bouyer 	regval = pci_conf_read(pba->pba_pc, tag, 0x80);
     71  1.1.2.2  bouyer 	regval &= 0x0000ff00;
     72  1.1.2.2  bouyer 	regval |= 0xe0010002;
     73  1.1.2.2  bouyer 	pci_conf_write(pba->pba_pc, tag, 0x80, regval);
     74  1.1.2.2  bouyer #endif
     75  1.1.2.2  bouyer 
     76  1.1.2.2  bouyer 	/*
     77  1.1.2.2  bouyer 	 * Initialize the PCIIDE Controller
     78  1.1.2.2  bouyer 	 */
     79  1.1.2.2  bouyer 	tag = pci_make_tag(pba->pba_pc, pba->pba_bus, 11, 1);
     80  1.1.2.2  bouyer 	pci_conf_write(pba->pba_pc, tag,
     81  1.1.2.2  bouyer 		PCI_COMMAND_STATUS_REG,
     82  1.1.2.2  bouyer 		PCI_COMMAND_IO_ENABLE|
     83  1.1.2.2  bouyer 		PCI_COMMAND_MASTER_ENABLE);
     84  1.1.2.2  bouyer 
     85  1.1.2.2  bouyer 	regval = pci_conf_read(pba->pba_pc, tag, PCI_CLASS_REG);
     86  1.1.2.2  bouyer 	regval = PCI_CLASS_CODE(PCI_CLASS(regval), PCI_SUBCLASS(regval), 0x8A);
     87  1.1.2.2  bouyer 	pci_conf_write(pba->pba_pc, tag, PCI_CLASS_REG, regval);
     88  1.1.2.2  bouyer 
     89  1.1.2.2  bouyer 	pci_conf_write(pba->pba_pc, tag, 0x10, 0x01f0 | PCI_MAPREG_TYPE_IO);
     90  1.1.2.2  bouyer 	pci_conf_write(pba->pba_pc, tag, 0x14, 0x03f4 | PCI_MAPREG_TYPE_IO);
     91  1.1.2.2  bouyer 	pci_conf_write(pba->pba_pc, tag, 0x18, 0x0170 | PCI_MAPREG_TYPE_IO);
     92  1.1.2.2  bouyer 	pci_conf_write(pba->pba_pc, tag, 0x1c, 0x0374 | PCI_MAPREG_TYPE_IO);
     93  1.1.2.2  bouyer 	pci_conf_write(pba->pba_pc, tag, 0x20, 0xe800 | PCI_MAPREG_TYPE_IO);
     94  1.1.2.2  bouyer 	intreg = pci_conf_read(pba->pba_pc, tag, PCI_INTERRUPT_REG);
     95  1.1.2.2  bouyer 	intreg = PCI_INTERRUPT_CODE(
     96  1.1.2.2  bouyer 		PCI_INTERRUPT_LATENCY(intreg),
     97  1.1.2.2  bouyer 		PCI_INTERRUPT_GRANT(intreg),
     98  1.1.2.2  bouyer 		PCI_INTERRUPT_PIN(intreg),
     99  1.1.2.2  bouyer 		0x8e);
    100  1.1.2.2  bouyer 	pci_conf_write(pba->pba_pc, tag, PCI_INTERRUPT_REG, intreg);
    101  1.1.2.2  bouyer 
    102  1.1.2.2  bouyer 	/*
    103  1.1.2.2  bouyer 	 * Make sure we are in legacy mode
    104  1.1.2.2  bouyer 	 */
    105  1.1.2.2  bouyer 	regval = pci_conf_read(pba->pba_pc, tag, 0x40);
    106  1.1.2.2  bouyer 	regval &= ~0x800;
    107  1.1.2.2  bouyer 	pci_conf_write(pba->pba_pc, tag, 0x40, regval);
    108  1.1.2.2  bouyer }
    109