cpu.h revision 1.16 1 1.16 agc /* $NetBSD: cpu.h,v 1.16 2003/08/07 16:28:50 agc Exp $ */
2 1.1 tsutsui
3 1.1 tsutsui /*
4 1.1 tsutsui * Copyright (c) 1982, 1990, 1993
5 1.1 tsutsui * The Regents of the University of California. All rights reserved.
6 1.16 agc *
7 1.16 agc * This code is derived from software contributed to Berkeley by
8 1.16 agc * the Systems Programming Group of the University of Utah Computer
9 1.16 agc * Science Department.
10 1.16 agc *
11 1.16 agc * Redistribution and use in source and binary forms, with or without
12 1.16 agc * modification, are permitted provided that the following conditions
13 1.16 agc * are met:
14 1.16 agc * 1. Redistributions of source code must retain the above copyright
15 1.16 agc * notice, this list of conditions and the following disclaimer.
16 1.16 agc * 2. Redistributions in binary form must reproduce the above copyright
17 1.16 agc * notice, this list of conditions and the following disclaimer in the
18 1.16 agc * documentation and/or other materials provided with the distribution.
19 1.16 agc * 3. Neither the name of the University nor the names of its contributors
20 1.16 agc * may be used to endorse or promote products derived from this software
21 1.16 agc * without specific prior written permission.
22 1.16 agc *
23 1.16 agc * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
24 1.16 agc * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
25 1.16 agc * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
26 1.16 agc * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
27 1.16 agc * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
28 1.16 agc * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
29 1.16 agc * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
30 1.16 agc * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
31 1.16 agc * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
32 1.16 agc * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33 1.16 agc * SUCH DAMAGE.
34 1.16 agc *
35 1.16 agc * from: Utah $Hdr: cpu.h 1.16 91/03/25$
36 1.16 agc *
37 1.16 agc * @(#)cpu.h 8.4 (Berkeley) 1/5/94
38 1.16 agc */
39 1.16 agc /*
40 1.16 agc * Copyright (c) 1988 University of Utah.
41 1.1 tsutsui *
42 1.1 tsutsui * This code is derived from software contributed to Berkeley by
43 1.1 tsutsui * the Systems Programming Group of the University of Utah Computer
44 1.1 tsutsui * Science Department.
45 1.1 tsutsui *
46 1.1 tsutsui * Redistribution and use in source and binary forms, with or without
47 1.1 tsutsui * modification, are permitted provided that the following conditions
48 1.1 tsutsui * are met:
49 1.1 tsutsui * 1. Redistributions of source code must retain the above copyright
50 1.1 tsutsui * notice, this list of conditions and the following disclaimer.
51 1.1 tsutsui * 2. Redistributions in binary form must reproduce the above copyright
52 1.1 tsutsui * notice, this list of conditions and the following disclaimer in the
53 1.1 tsutsui * documentation and/or other materials provided with the distribution.
54 1.1 tsutsui * 3. All advertising materials mentioning features or use of this software
55 1.1 tsutsui * must display the following acknowledgement:
56 1.1 tsutsui * This product includes software developed by the University of
57 1.1 tsutsui * California, Berkeley and its contributors.
58 1.1 tsutsui * 4. Neither the name of the University nor the names of its contributors
59 1.1 tsutsui * may be used to endorse or promote products derived from this software
60 1.1 tsutsui * without specific prior written permission.
61 1.1 tsutsui *
62 1.1 tsutsui * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
63 1.1 tsutsui * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
64 1.1 tsutsui * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
65 1.1 tsutsui * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
66 1.1 tsutsui * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
67 1.1 tsutsui * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
68 1.1 tsutsui * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
69 1.1 tsutsui * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
70 1.1 tsutsui * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
71 1.1 tsutsui * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
72 1.1 tsutsui * SUCH DAMAGE.
73 1.1 tsutsui *
74 1.1 tsutsui * from: Utah $Hdr: cpu.h 1.16 91/03/25$
75 1.1 tsutsui *
76 1.1 tsutsui * @(#)cpu.h 8.4 (Berkeley) 1/5/94
77 1.1 tsutsui */
78 1.1 tsutsui
79 1.1 tsutsui #ifndef _NEWS68K_CPU_H_
80 1.2 tsutsui #define _NEWS68K_CPU_H_
81 1.1 tsutsui
82 1.1 tsutsui /*
83 1.1 tsutsui * Exported definitions unique to news68k cpu support.
84 1.1 tsutsui */
85 1.1 tsutsui
86 1.10 mrg #if defined(_KERNEL_OPT)
87 1.4 thorpej #include "opt_lockdebug.h"
88 1.4 thorpej #endif
89 1.4 thorpej
90 1.1 tsutsui /*
91 1.1 tsutsui * Get common m68k CPU definitions.
92 1.1 tsutsui */
93 1.1 tsutsui #include <m68k/cpu.h>
94 1.1 tsutsui
95 1.1 tsutsui /*
96 1.1 tsutsui * XXX news1700 L2 cache would be corrupted with DC_BE and IC_BE...
97 1.1 tsutsui * XXX Should these be defined in machine/cpu.h?
98 1.1 tsutsui */
99 1.1 tsutsui #undef CACHE_ON
100 1.1 tsutsui #undef CACHE_CLR
101 1.1 tsutsui #undef IC_CLEAR
102 1.1 tsutsui #undef DC_CLEAR
103 1.1 tsutsui #define CACHE_ON (DC_WA|DC_CLR|DC_ENABLE|IC_CLR|IC_ENABLE)
104 1.1 tsutsui #define CACHE_CLR CACHE_ON
105 1.1 tsutsui #define IC_CLEAR (DC_WA|DC_ENABLE|IC_CLR|IC_ENABLE)
106 1.1 tsutsui #define DC_CLEAR (DC_WA|DC_CLR|DC_ENABLE|IC_ENABLE)
107 1.1 tsutsui
108 1.7 tsutsui #define DCIC_CLR (DC_CLR|IC_CLR)
109 1.7 tsutsui #define CACHE_BE (DC_BE|IC_BE)
110 1.2 tsutsui
111 1.1 tsutsui /*
112 1.1 tsutsui * Get interrupt glue.
113 1.1 tsutsui */
114 1.1 tsutsui #include <machine/intr.h>
115 1.1 tsutsui
116 1.4 thorpej #include <sys/sched.h>
117 1.4 thorpej struct cpu_info {
118 1.4 thorpej struct schedstate_percpu ci_schedstate; /* scheduler state */
119 1.4 thorpej #if defined(DIAGNOSTIC) || defined(LOCKDEBUG)
120 1.4 thorpej u_long ci_spin_locks; /* # of spin locks held */
121 1.4 thorpej u_long ci_simple_locks; /* # of simple locks held */
122 1.4 thorpej #endif
123 1.4 thorpej };
124 1.4 thorpej
125 1.4 thorpej #ifdef _KERNEL
126 1.4 thorpej extern struct cpu_info cpu_info_store;
127 1.4 thorpej
128 1.4 thorpej #define curcpu() (&cpu_info_store)
129 1.4 thorpej
130 1.1 tsutsui /*
131 1.1 tsutsui * definitions of cpu-dependent requirements
132 1.1 tsutsui * referenced in generic code
133 1.1 tsutsui */
134 1.2 tsutsui #define cpu_swapin(p) /* nothing */
135 1.2 tsutsui #define cpu_wait(p) /* nothing */
136 1.2 tsutsui #define cpu_swapout(p) /* nothing */
137 1.2 tsutsui #define cpu_number() 0
138 1.1 tsutsui
139 1.14 thorpej void cpu_proc_fork(struct proc *, struct proc *);
140 1.14 thorpej
141 1.1 tsutsui /*
142 1.1 tsutsui * Arguments to hardclock and gatherstats encapsulate the previous
143 1.1 tsutsui * machine state in an opaque clockframe. One the hp300, we use
144 1.1 tsutsui * what the hardware pushes on an interrupt (frame format 0).
145 1.1 tsutsui */
146 1.1 tsutsui struct clockframe {
147 1.1 tsutsui u_short sr; /* sr at time of interrupt */
148 1.1 tsutsui u_long pc; /* pc at time of interrupt */
149 1.1 tsutsui u_short vo; /* vector offset (4-word frame) */
150 1.1 tsutsui };
151 1.1 tsutsui
152 1.2 tsutsui #define CLKF_USERMODE(framep) (((framep)->sr & PSL_S) == 0)
153 1.2 tsutsui #define CLKF_BASEPRI(framep) (((framep)->sr & PSL_IPL) == 0)
154 1.2 tsutsui #define CLKF_PC(framep) ((framep)->pc)
155 1.1 tsutsui #if 0
156 1.1 tsutsui /* We would like to do it this way... */
157 1.2 tsutsui #define CLKF_INTR(framep) (((framep)->sr & PSL_M) == 0)
158 1.1 tsutsui #else
159 1.1 tsutsui /* but until we start using PSL_M, we have to do this instead */
160 1.2 tsutsui #define CLKF_INTR(framep) (0) /* XXX */
161 1.1 tsutsui #endif
162 1.1 tsutsui
163 1.1 tsutsui
164 1.1 tsutsui /*
165 1.1 tsutsui * Preempt the current process if in interrupt from user mode,
166 1.1 tsutsui * or after the current trap/syscall if in system mode.
167 1.1 tsutsui */
168 1.1 tsutsui extern int want_resched; /* resched() was called */
169 1.5 thorpej #define need_resched(ci) do { want_resched++; aston(); } while(0)
170 1.1 tsutsui
171 1.1 tsutsui /*
172 1.1 tsutsui * Give a profiling tick to the current process when the user profiling
173 1.1 tsutsui * buffer pages are invalid. On the hp300, request an ast to send us
174 1.1 tsutsui * through trap, marking the proc as needing a profiling tick.
175 1.1 tsutsui */
176 1.3 tsutsui #define need_proftick(p) do { (p)->p_flag |= P_OWEUPC; aston(); } while(0)
177 1.1 tsutsui
178 1.1 tsutsui /*
179 1.1 tsutsui * Notify the current process (p) that it has a signal pending,
180 1.1 tsutsui * process as soon as possible.
181 1.1 tsutsui */
182 1.2 tsutsui #define signotify(p) aston()
183 1.1 tsutsui
184 1.1 tsutsui extern int astpending; /* need to trap before returning to user mode */
185 1.3 tsutsui extern volatile u_char *ctrl_ast;
186 1.3 tsutsui #define aston() do { astpending++; *ctrl_ast = 0xff; } while(0)
187 1.4 thorpej
188 1.4 thorpej #endif /* _KERNEL */
189 1.1 tsutsui
190 1.1 tsutsui /*
191 1.1 tsutsui * CTL_MACHDEP definitions.
192 1.1 tsutsui */
193 1.2 tsutsui #define CPU_CONSDEV 1 /* dev_t: console terminal device */
194 1.2 tsutsui #define CPU_MAXID 2 /* number of valid machdep ids */
195 1.1 tsutsui
196 1.1 tsutsui #define CTL_MACHDEP_NAMES { \
197 1.1 tsutsui { 0, 0 }, \
198 1.1 tsutsui { "console_device", CTLTYPE_STRUCT }, \
199 1.1 tsutsui }
200 1.1 tsutsui
201 1.1 tsutsui #ifdef _KERNEL
202 1.1 tsutsui
203 1.2 tsutsui #if defined(news1700) || defined(news1200)
204 1.2 tsutsui #ifndef M68030
205 1.1 tsutsui #define M68030
206 1.1 tsutsui #endif
207 1.2 tsutsui #define M68K_MMU_MOTOROLA
208 1.2 tsutsui #endif
209 1.2 tsutsui
210 1.2 tsutsui #if defined(news1700)
211 1.2 tsutsui #define CACHE_HAVE_PAC
212 1.2 tsutsui #endif
213 1.1 tsutsui
214 1.1 tsutsui #endif
215 1.1 tsutsui
216 1.1 tsutsui #ifdef _KERNEL
217 1.2 tsutsui extern int systype;
218 1.2 tsutsui #define NEWS1700 0
219 1.2 tsutsui #define NEWS1200 1
220 1.2 tsutsui
221 1.2 tsutsui extern int cpuspeed;
222 1.7 tsutsui extern char *intiobase, *intiolimit, *extiobase;
223 1.2 tsutsui extern u_int intiobase_phys, intiotop_phys;
224 1.2 tsutsui extern u_int extiobase_phys, extiotop_phys;
225 1.2 tsutsui extern u_int intrcnt[];
226 1.1 tsutsui
227 1.13 tsutsui extern void (*vectab[])(void);
228 1.1 tsutsui
229 1.1 tsutsui struct frame;
230 1.1 tsutsui struct fpframe;
231 1.1 tsutsui struct pcb;
232 1.1 tsutsui
233 1.1 tsutsui /* locore.s functions */
234 1.13 tsutsui void m68881_save(struct fpframe *);
235 1.13 tsutsui void m68881_restore(struct fpframe *);
236 1.2 tsutsui
237 1.13 tsutsui int suline(caddr_t, caddr_t);
238 1.13 tsutsui void savectx(struct pcb *);
239 1.14 thorpej void switch_exit(struct lwp *);
240 1.15 jdolecek void switch_lwp_exit(struct lwp *);
241 1.13 tsutsui void proc_trampoline(void);
242 1.13 tsutsui void loadustp(int);
243 1.13 tsutsui void badtrap(void);
244 1.13 tsutsui void intrhand_vectored(void);
245 1.13 tsutsui int getsr(void);
246 1.1 tsutsui
247 1.1 tsutsui
248 1.13 tsutsui void doboot(int)
249 1.1 tsutsui __attribute__((__noreturn__));
250 1.13 tsutsui void nmihand(struct frame *);
251 1.13 tsutsui void ecacheon(void);
252 1.13 tsutsui void ecacheoff(void);
253 1.1 tsutsui
254 1.1 tsutsui /* machdep.c functions */
255 1.13 tsutsui int badaddr(caddr_t, int);
256 1.13 tsutsui int badbaddr(caddr_t);
257 1.1 tsutsui
258 1.1 tsutsui /* sys_machdep.c functions */
259 1.13 tsutsui int cachectl1(unsigned long, vaddr_t, size_t, struct proc *);
260 1.1 tsutsui
261 1.1 tsutsui /* vm_machdep.c functions */
262 1.13 tsutsui void physaccess(caddr_t, caddr_t, int, int);
263 1.13 tsutsui void physunaccess(caddr_t, int);
264 1.13 tsutsui int kvtop(caddr_t);
265 1.1 tsutsui
266 1.1 tsutsui #endif
267 1.1 tsutsui
268 1.1 tsutsui /* physical memory sections */
269 1.2 tsutsui #define ROMBASE (0xe0000000)
270 1.2 tsutsui
271 1.2 tsutsui #define INTIOBASE1700 (0xe0c00000)
272 1.1 tsutsui #define INTIOTOP1700 (0xe1d00000) /* XXX */
273 1.2 tsutsui #define EXTIOBASE1700 (0xf0f00000)
274 1.1 tsutsui #define EXTIOTOP1700 (0xf1000000) /* XXX */
275 1.2 tsutsui
276 1.2 tsutsui #define INTIOBASE1200 (0xe1000000)
277 1.2 tsutsui #define INTIOTOP1200 (0xe1d00000) /* XXX */
278 1.2 tsutsui #define EXTIOBASE1200 (0xe4000000)
279 1.2 tsutsui #define EXTIOTOP1200 (0xe4020000) /* XXX */
280 1.2 tsutsui
281 1.2 tsutsui #define MAXADDR (0xfffff000)
282 1.1 tsutsui
283 1.1 tsutsui /*
284 1.1 tsutsui * Internal IO space:
285 1.1 tsutsui *
286 1.1 tsutsui * Internal IO space is mapped in the kernel from ``intiobase'' to
287 1.1 tsutsui * ``intiolimit'' (defined in locore.s). Since it is always mapped,
288 1.1 tsutsui * conversion between physical and kernel virtual addresses is easy.
289 1.1 tsutsui */
290 1.2 tsutsui #define ISIIOVA(va) \
291 1.1 tsutsui ((char *)(va) >= intiobase && (char *)(va) < intiolimit)
292 1.2 tsutsui #define IIOV(pa) (((u_int)(pa) - intiobase_phys) + (u_int)intiobase)
293 1.2 tsutsui #define ISIIOPA(pa) \
294 1.2 tsutsui ((u_int)(pa) >= intiobase_phys && (u_int)(pa) < intiotop_phys)
295 1.2 tsutsui #define IIOP(va) (((u_int)(va) - (u_int)intiobase) + intiobase_phys)
296 1.2 tsutsui #define IIOPOFF(pa) ((u_int)(pa) - intiobase_phys)
297 1.6 tsutsui
298 1.6 tsutsui /* XXX EIO space mapping should be modified like hp300 XXX */
299 1.6 tsutsui #define EIOSIZE (extiotop_phys - extiobase_phys)
300 1.6 tsutsui #define ISEIOVA(va) \
301 1.6 tsutsui ((char *)(va) >= extiobase && (char *)(va) < (char *)EIOSIZE)
302 1.6 tsutsui #define EIOV(pa) (((u_int)(pa) - extiobase_phys) + (u_int)extiobase)
303 1.12 chs
304 1.12 chs #if defined(CACHE_HAVE_PAC) || defined(CACHE_HAVE_VAC)
305 1.12 chs #define M68K_CACHEOPS_MACHDEP
306 1.12 chs #endif
307 1.12 chs
308 1.12 chs #ifdef CACHE_HAVE_PAC
309 1.12 chs #define M68K_CACHEOPS_MACHDEP_PCIA
310 1.12 chs #endif
311 1.12 chs
312 1.12 chs #ifdef CACHE_HAVE_VAC
313 1.12 chs #define M68K_CACHEOPS_MACHDEP_DCIA
314 1.12 chs #define M68K_CACHEOPS_MACHDEP_DCIS
315 1.12 chs #define M68K_CACHEOPS_MACHDEP_DCIU
316 1.12 chs #endif
317 1.1 tsutsui
318 1.1 tsutsui #endif /* !_NEWS68K_CPU_H_ */
319