cpu.h revision 1.55 1 1.55 thorpej /* $NetBSD: cpu.h,v 1.55 2024/01/20 00:15:32 thorpej Exp $ */
2 1.1 tsutsui
3 1.1 tsutsui /*
4 1.38 rmind * Copyright (c) 1988 University of Utah.
5 1.1 tsutsui * Copyright (c) 1982, 1990, 1993
6 1.1 tsutsui * The Regents of the University of California. All rights reserved.
7 1.16 agc *
8 1.16 agc * This code is derived from software contributed to Berkeley by
9 1.16 agc * the Systems Programming Group of the University of Utah Computer
10 1.16 agc * Science Department.
11 1.16 agc *
12 1.16 agc * Redistribution and use in source and binary forms, with or without
13 1.16 agc * modification, are permitted provided that the following conditions
14 1.16 agc * are met:
15 1.16 agc * 1. Redistributions of source code must retain the above copyright
16 1.16 agc * notice, this list of conditions and the following disclaimer.
17 1.16 agc * 2. Redistributions in binary form must reproduce the above copyright
18 1.16 agc * notice, this list of conditions and the following disclaimer in the
19 1.16 agc * documentation and/or other materials provided with the distribution.
20 1.16 agc * 3. Neither the name of the University nor the names of its contributors
21 1.16 agc * may be used to endorse or promote products derived from this software
22 1.16 agc * without specific prior written permission.
23 1.16 agc *
24 1.16 agc * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
25 1.16 agc * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 1.16 agc * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 1.16 agc * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
28 1.16 agc * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29 1.16 agc * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
30 1.16 agc * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
31 1.16 agc * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
32 1.16 agc * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
33 1.16 agc * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
34 1.16 agc * SUCH DAMAGE.
35 1.16 agc *
36 1.16 agc * from: Utah $Hdr: cpu.h 1.16 91/03/25$
37 1.16 agc *
38 1.16 agc * @(#)cpu.h 8.4 (Berkeley) 1/5/94
39 1.16 agc */
40 1.1 tsutsui
41 1.1 tsutsui #ifndef _NEWS68K_CPU_H_
42 1.2 tsutsui #define _NEWS68K_CPU_H_
43 1.1 tsutsui
44 1.10 mrg #if defined(_KERNEL_OPT)
45 1.4 thorpej #include "opt_lockdebug.h"
46 1.52 thorpej #include "opt_newsconf.h"
47 1.4 thorpej #endif
48 1.4 thorpej
49 1.1 tsutsui /*
50 1.1 tsutsui * Get common m68k CPU definitions.
51 1.1 tsutsui */
52 1.1 tsutsui #include <m68k/cpu.h>
53 1.1 tsutsui
54 1.41 tsutsui #if defined(_KERNEL)
55 1.41 tsutsui /*
56 1.41 tsutsui * Exported definitions unique to news68k cpu support.
57 1.41 tsutsui */
58 1.41 tsutsui
59 1.1 tsutsui /*
60 1.1 tsutsui * XXX news1700 L2 cache would be corrupted with DC_BE and IC_BE...
61 1.1 tsutsui * XXX Should these be defined in machine/cpu.h?
62 1.1 tsutsui */
63 1.1 tsutsui #undef CACHE_ON
64 1.1 tsutsui #undef CACHE_CLR
65 1.1 tsutsui #undef IC_CLEAR
66 1.1 tsutsui #undef DC_CLEAR
67 1.1 tsutsui #define CACHE_ON (DC_WA|DC_CLR|DC_ENABLE|IC_CLR|IC_ENABLE)
68 1.1 tsutsui #define CACHE_CLR CACHE_ON
69 1.1 tsutsui #define IC_CLEAR (DC_WA|DC_ENABLE|IC_CLR|IC_ENABLE)
70 1.1 tsutsui #define DC_CLEAR (DC_WA|DC_CLR|DC_ENABLE|IC_ENABLE)
71 1.1 tsutsui
72 1.7 tsutsui #define DCIC_CLR (DC_CLR|IC_CLR)
73 1.7 tsutsui #define CACHE_BE (DC_BE|IC_BE)
74 1.2 tsutsui
75 1.55 thorpej #define cpu_set_hw_ast(l) \
76 1.55 thorpej do { \
77 1.55 thorpej extern volatile u_char *ctrl_ast; \
78 1.55 thorpej __USE(l); \
79 1.55 thorpej *ctrl_ast = 0xff; \
80 1.55 thorpej } while (/*CONSTCOND*/0)
81 1.4 thorpej
82 1.2 tsutsui #if defined(news1700)
83 1.2 tsutsui #define CACHE_HAVE_PAC
84 1.2 tsutsui #endif
85 1.1 tsutsui
86 1.2 tsutsui extern int systype;
87 1.2 tsutsui #define NEWS1700 0
88 1.2 tsutsui #define NEWS1200 1
89 1.2 tsutsui
90 1.2 tsutsui extern int cpuspeed;
91 1.7 tsutsui extern char *intiobase, *intiolimit, *extiobase;
92 1.2 tsutsui extern u_int intiobase_phys, intiotop_phys;
93 1.2 tsutsui extern u_int extiobase_phys, extiotop_phys;
94 1.1 tsutsui
95 1.40 tsutsui extern void *romcallvec;
96 1.1 tsutsui
97 1.1 tsutsui struct frame;
98 1.1 tsutsui
99 1.13 tsutsui void doboot(int)
100 1.1 tsutsui __attribute__((__noreturn__));
101 1.13 tsutsui void nmihand(struct frame *);
102 1.13 tsutsui void ecacheon(void);
103 1.13 tsutsui void ecacheoff(void);
104 1.1 tsutsui
105 1.1 tsutsui /* machdep.c functions */
106 1.26 christos int badaddr(void *, int);
107 1.26 christos int badbaddr(void *);
108 1.1 tsutsui
109 1.1 tsutsui #endif
110 1.1 tsutsui
111 1.1 tsutsui /* physical memory sections */
112 1.22 tsutsui #define ROMBASE 0xe0000000
113 1.2 tsutsui
114 1.22 tsutsui #define INTIOBASE1700 0xe0c00000
115 1.22 tsutsui #define INTIOTOP1700 0xe1d00000 /* XXX */
116 1.22 tsutsui #define EXTIOBASE1700 0xf0f00000
117 1.22 tsutsui #define EXTIOTOP1700 0xf1000000 /* XXX */
118 1.22 tsutsui #define CTRL_POWER1700 0xe1380000
119 1.22 tsutsui #define CTRL_LED1700 0xe0dc0000
120 1.22 tsutsui
121 1.22 tsutsui #define INTIOBASE1200 0xe1000000
122 1.22 tsutsui #define INTIOTOP1200 0xe1d00000 /* XXX */
123 1.22 tsutsui #define EXTIOBASE1200 0xe4000000
124 1.22 tsutsui #define EXTIOTOP1200 0xe4020000 /* XXX */
125 1.22 tsutsui #define CTRL_POWER1200 0xe1000000
126 1.22 tsutsui #define CTRL_LED1200 0xe1500001
127 1.2 tsutsui
128 1.22 tsutsui #define MAXADDR 0xfffff000
129 1.1 tsutsui
130 1.1 tsutsui /*
131 1.1 tsutsui * Internal IO space:
132 1.1 tsutsui *
133 1.1 tsutsui * Internal IO space is mapped in the kernel from ``intiobase'' to
134 1.1 tsutsui * ``intiolimit'' (defined in locore.s). Since it is always mapped,
135 1.1 tsutsui * conversion between physical and kernel virtual addresses is easy.
136 1.1 tsutsui */
137 1.2 tsutsui #define ISIIOVA(va) \
138 1.1 tsutsui ((char *)(va) >= intiobase && (char *)(va) < intiolimit)
139 1.2 tsutsui #define IIOV(pa) (((u_int)(pa) - intiobase_phys) + (u_int)intiobase)
140 1.2 tsutsui #define ISIIOPA(pa) \
141 1.2 tsutsui ((u_int)(pa) >= intiobase_phys && (u_int)(pa) < intiotop_phys)
142 1.2 tsutsui #define IIOP(va) (((u_int)(va) - (u_int)intiobase) + intiobase_phys)
143 1.2 tsutsui #define IIOPOFF(pa) ((u_int)(pa) - intiobase_phys)
144 1.6 tsutsui
145 1.6 tsutsui /* XXX EIO space mapping should be modified like hp300 XXX */
146 1.6 tsutsui #define EIOSIZE (extiotop_phys - extiobase_phys)
147 1.6 tsutsui #define ISEIOVA(va) \
148 1.6 tsutsui ((char *)(va) >= extiobase && (char *)(va) < (char *)EIOSIZE)
149 1.6 tsutsui #define EIOV(pa) (((u_int)(pa) - extiobase_phys) + (u_int)extiobase)
150 1.12 chs
151 1.12 chs #if defined(CACHE_HAVE_PAC) || defined(CACHE_HAVE_VAC)
152 1.12 chs #define M68K_CACHEOPS_MACHDEP
153 1.12 chs #endif
154 1.12 chs
155 1.12 chs #ifdef CACHE_HAVE_PAC
156 1.12 chs #define M68K_CACHEOPS_MACHDEP_PCIA
157 1.12 chs #endif
158 1.12 chs
159 1.12 chs #ifdef CACHE_HAVE_VAC
160 1.12 chs #define M68K_CACHEOPS_MACHDEP_DCIA
161 1.12 chs #define M68K_CACHEOPS_MACHDEP_DCIS
162 1.12 chs #define M68K_CACHEOPS_MACHDEP_DCIU
163 1.12 chs #endif
164 1.1 tsutsui
165 1.1 tsutsui #endif /* !_NEWS68K_CPU_H_ */
166