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cpu.h revision 1.22
      1 /*	$NetBSD: cpu.h,v 1.22 2004/12/15 17:22:11 tsutsui Exp $	*/
      2 
      3 /*
      4  * Copyright (c) 1982, 1990, 1993
      5  *	The Regents of the University of California.  All rights reserved.
      6  *
      7  * This code is derived from software contributed to Berkeley by
      8  * the Systems Programming Group of the University of Utah Computer
      9  * Science Department.
     10  *
     11  * Redistribution and use in source and binary forms, with or without
     12  * modification, are permitted provided that the following conditions
     13  * are met:
     14  * 1. Redistributions of source code must retain the above copyright
     15  *    notice, this list of conditions and the following disclaimer.
     16  * 2. Redistributions in binary form must reproduce the above copyright
     17  *    notice, this list of conditions and the following disclaimer in the
     18  *    documentation and/or other materials provided with the distribution.
     19  * 3. Neither the name of the University nor the names of its contributors
     20  *    may be used to endorse or promote products derived from this software
     21  *    without specific prior written permission.
     22  *
     23  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     24  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     25  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     26  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     27  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     28  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     29  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     30  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     31  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     32  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     33  * SUCH DAMAGE.
     34  *
     35  * from: Utah $Hdr: cpu.h 1.16 91/03/25$
     36  *
     37  *	@(#)cpu.h	8.4 (Berkeley) 1/5/94
     38  */
     39 /*
     40  * Copyright (c) 1988 University of Utah.
     41  *
     42  * This code is derived from software contributed to Berkeley by
     43  * the Systems Programming Group of the University of Utah Computer
     44  * Science Department.
     45  *
     46  * Redistribution and use in source and binary forms, with or without
     47  * modification, are permitted provided that the following conditions
     48  * are met:
     49  * 1. Redistributions of source code must retain the above copyright
     50  *    notice, this list of conditions and the following disclaimer.
     51  * 2. Redistributions in binary form must reproduce the above copyright
     52  *    notice, this list of conditions and the following disclaimer in the
     53  *    documentation and/or other materials provided with the distribution.
     54  * 3. All advertising materials mentioning features or use of this software
     55  *    must display the following acknowledgement:
     56  *	This product includes software developed by the University of
     57  *	California, Berkeley and its contributors.
     58  * 4. Neither the name of the University nor the names of its contributors
     59  *    may be used to endorse or promote products derived from this software
     60  *    without specific prior written permission.
     61  *
     62  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     63  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     64  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     65  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     66  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     67  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     68  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     69  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     70  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     71  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     72  * SUCH DAMAGE.
     73  *
     74  * from: Utah $Hdr: cpu.h 1.16 91/03/25$
     75  *
     76  *	@(#)cpu.h	8.4 (Berkeley) 1/5/94
     77  */
     78 
     79 #ifndef _NEWS68K_CPU_H_
     80 #define _NEWS68K_CPU_H_
     81 
     82 #if defined(_KERNEL)
     83 
     84 /*
     85  * Exported definitions unique to news68k cpu support.
     86  */
     87 
     88 #if defined(_KERNEL_OPT)
     89 #include "opt_lockdebug.h"
     90 #endif
     91 
     92 /*
     93  * Get common m68k CPU definitions.
     94  */
     95 #include <m68k/cpu.h>
     96 
     97 /*
     98  * XXX news1700 L2 cache would be corrupted with DC_BE and IC_BE...
     99  * XXX Should these be defined in machine/cpu.h?
    100  */
    101 #undef CACHE_ON
    102 #undef CACHE_CLR
    103 #undef IC_CLEAR
    104 #undef DC_CLEAR
    105 #define CACHE_ON	(DC_WA|DC_CLR|DC_ENABLE|IC_CLR|IC_ENABLE)
    106 #define CACHE_CLR	CACHE_ON
    107 #define IC_CLEAR	(DC_WA|DC_ENABLE|IC_CLR|IC_ENABLE)
    108 #define DC_CLEAR	(DC_WA|DC_CLR|DC_ENABLE|IC_ENABLE)
    109 
    110 #define DCIC_CLR	(DC_CLR|IC_CLR)
    111 #define CACHE_BE	(DC_BE|IC_BE)
    112 
    113 /*
    114  * Get interrupt glue.
    115  */
    116 #include <machine/intr.h>
    117 
    118 #include <sys/cpu_data.h>
    119 struct cpu_info {
    120 	struct cpu_data ci_data;	/* MI per-cpu data */
    121 };
    122 
    123 extern struct cpu_info cpu_info_store;
    124 
    125 #define	curcpu()			(&cpu_info_store)
    126 
    127 /*
    128  * definitions of cpu-dependent requirements
    129  * referenced in generic code
    130  */
    131 #define cpu_swapin(p)			/* nothing */
    132 #define cpu_swapout(p)			/* nothing */
    133 #define cpu_number()			0
    134 
    135 void	cpu_proc_fork(struct proc *, struct proc *);
    136 
    137 /*
    138  * Arguments to hardclock and gatherstats encapsulate the previous
    139  * machine state in an opaque clockframe.  One the hp300, we use
    140  * what the hardware pushes on an interrupt (frame format 0).
    141  */
    142 struct clockframe {
    143 	u_short	sr;		/* sr at time of interrupt */
    144 	u_long	pc;		/* pc at time of interrupt */
    145 	u_short	vo;		/* vector offset (4-word frame) */
    146 };
    147 
    148 #define CLKF_USERMODE(framep)	(((framep)->sr & PSL_S) == 0)
    149 #define CLKF_BASEPRI(framep)	(((framep)->sr & PSL_IPL) == 0)
    150 #define CLKF_PC(framep)		((framep)->pc)
    151 #if 0
    152 /* We would like to do it this way... */
    153 #define CLKF_INTR(framep)	(((framep)->sr & PSL_M) == 0)
    154 #else
    155 /* but until we start using PSL_M, we have to do this instead */
    156 #define CLKF_INTR(framep)	(0)	/* XXX */
    157 #endif
    158 
    159 
    160 /*
    161  * Preempt the current process if in interrupt from user mode,
    162  * or after the current trap/syscall if in system mode.
    163  */
    164 extern int want_resched;	/* resched() was called */
    165 #define need_resched(ci)	do { want_resched++; aston(); } while(0)
    166 
    167 /*
    168  * Give a profiling tick to the current process when the user profiling
    169  * buffer pages are invalid.  On the hp300, request an ast to send us
    170  * through trap, marking the proc as needing a profiling tick.
    171  */
    172 #define need_proftick(p)	do { (p)->p_flag |= P_OWEUPC; aston(); } while(0)
    173 
    174 /*
    175  * Notify the current process (p) that it has a signal pending,
    176  * process as soon as possible.
    177  */
    178 #define signotify(p)	aston()
    179 
    180 extern int astpending;		/* need to trap before returning to user mode */
    181 extern volatile u_char *ctrl_ast;
    182 #define aston()		do { astpending++; *ctrl_ast = 0xff; } while(0)
    183 
    184 #endif /* _KERNEL */
    185 
    186 /*
    187  * CTL_MACHDEP definitions.
    188  */
    189 #define CPU_CONSDEV		1	/* dev_t: console terminal device */
    190 #define CPU_MAXID		2	/* number of valid machdep ids */
    191 
    192 #define CTL_MACHDEP_NAMES { \
    193 	{ 0, 0 }, \
    194 	{ "console_device", CTLTYPE_STRUCT }, \
    195 }
    196 
    197 #ifdef _KERNEL
    198 
    199 #if defined(news1700) || defined(news1200)
    200 #ifndef M68030
    201 #define M68030
    202 #endif
    203 #define M68K_MMU_MOTOROLA
    204 #endif
    205 
    206 #if defined(news1700)
    207 #define CACHE_HAVE_PAC
    208 #endif
    209 
    210 #endif
    211 
    212 #ifdef _KERNEL
    213 extern int systype;
    214 #define NEWS1700	0
    215 #define NEWS1200	1
    216 
    217 extern int cpuspeed;
    218 extern char *intiobase, *intiolimit, *extiobase;
    219 extern u_int intiobase_phys, intiotop_phys;
    220 extern u_int extiobase_phys, extiotop_phys;
    221 extern u_int intrcnt[];
    222 
    223 extern void (*vectab[])(void);
    224 
    225 struct frame;
    226 struct fpframe;
    227 struct pcb;
    228 
    229 /* locore.s functions */
    230 void m68881_save(struct fpframe *);
    231 void m68881_restore(struct fpframe *);
    232 
    233 int suline(caddr_t, caddr_t);
    234 void savectx(struct pcb *);
    235 void switch_exit(struct lwp *);
    236 void switch_lwp_exit(struct lwp *);
    237 void proc_trampoline(void);
    238 void loadustp(int);
    239 void badtrap(void);
    240 void intrhand_vectored(void);
    241 int getsr(void);
    242 
    243 
    244 void doboot(int)
    245 	__attribute__((__noreturn__));
    246 void nmihand(struct frame *);
    247 void ecacheon(void);
    248 void ecacheoff(void);
    249 
    250 /* machdep.c functions */
    251 int badaddr(caddr_t, int);
    252 int badbaddr(caddr_t);
    253 
    254 /* sys_machdep.c functions */
    255 int cachectl1(unsigned long, vaddr_t, size_t, struct proc *);
    256 
    257 /* vm_machdep.c functions */
    258 void physaccess(caddr_t, caddr_t, int, int);
    259 void physunaccess(caddr_t, int);
    260 int kvtop(caddr_t);
    261 
    262 #endif
    263 
    264 /* physical memory sections */
    265 #define ROMBASE		0xe0000000
    266 
    267 #define INTIOBASE1700	0xe0c00000
    268 #define INTIOTOP1700	0xe1d00000 /* XXX */
    269 #define EXTIOBASE1700	0xf0f00000
    270 #define EXTIOTOP1700	0xf1000000 /* XXX */
    271 #define CTRL_POWER1700	0xe1380000
    272 #define CTRL_LED1700	0xe0dc0000
    273 
    274 #define INTIOBASE1200	0xe1000000
    275 #define INTIOTOP1200	0xe1d00000 /* XXX */
    276 #define EXTIOBASE1200	0xe4000000
    277 #define EXTIOTOP1200	0xe4020000 /* XXX */
    278 #define CTRL_POWER1200	0xe1000000
    279 #define CTRL_LED1200	0xe1500001
    280 
    281 #define MAXADDR		0xfffff000
    282 
    283 /*
    284  * Internal IO space:
    285  *
    286  * Internal IO space is mapped in the kernel from ``intiobase'' to
    287  * ``intiolimit'' (defined in locore.s).  Since it is always mapped,
    288  * conversion between physical and kernel virtual addresses is easy.
    289  */
    290 #define ISIIOVA(va) \
    291 	((char *)(va) >= intiobase && (char *)(va) < intiolimit)
    292 #define IIOV(pa)	(((u_int)(pa) - intiobase_phys) + (u_int)intiobase)
    293 #define ISIIOPA(pa) \
    294 	((u_int)(pa) >= intiobase_phys && (u_int)(pa) < intiotop_phys)
    295 #define IIOP(va)	(((u_int)(va) - (u_int)intiobase) + intiobase_phys)
    296 #define IIOPOFF(pa)	((u_int)(pa) - intiobase_phys)
    297 
    298 /* XXX EIO space mapping should be modified like hp300 XXX */
    299 #define	EIOSIZE		(extiotop_phys - extiobase_phys)
    300 #define ISEIOVA(va) \
    301 	((char *)(va) >= extiobase && (char *)(va) < (char *)EIOSIZE)
    302 #define EIOV(pa)	(((u_int)(pa) - extiobase_phys) + (u_int)extiobase)
    303 
    304 #if defined(CACHE_HAVE_PAC) || defined(CACHE_HAVE_VAC)
    305 #define M68K_CACHEOPS_MACHDEP
    306 #endif
    307 
    308 #ifdef CACHE_HAVE_PAC
    309 #define M68K_CACHEOPS_MACHDEP_PCIA
    310 #endif
    311 
    312 #ifdef CACHE_HAVE_VAC
    313 #define M68K_CACHEOPS_MACHDEP_DCIA
    314 #define M68K_CACHEOPS_MACHDEP_DCIS
    315 #define M68K_CACHEOPS_MACHDEP_DCIU
    316 #endif
    317 
    318 #endif /* !_NEWS68K_CPU_H_ */
    319