Home | History | Annotate | Line # | Download | only in include
cpu.h revision 1.24
      1 /*	$NetBSD: cpu.h,v 1.24 2007/02/10 02:01:26 tsutsui Exp $	*/
      2 
      3 /*
      4  * Copyright (c) 1982, 1990, 1993
      5  *	The Regents of the University of California.  All rights reserved.
      6  *
      7  * This code is derived from software contributed to Berkeley by
      8  * the Systems Programming Group of the University of Utah Computer
      9  * Science Department.
     10  *
     11  * Redistribution and use in source and binary forms, with or without
     12  * modification, are permitted provided that the following conditions
     13  * are met:
     14  * 1. Redistributions of source code must retain the above copyright
     15  *    notice, this list of conditions and the following disclaimer.
     16  * 2. Redistributions in binary form must reproduce the above copyright
     17  *    notice, this list of conditions and the following disclaimer in the
     18  *    documentation and/or other materials provided with the distribution.
     19  * 3. Neither the name of the University nor the names of its contributors
     20  *    may be used to endorse or promote products derived from this software
     21  *    without specific prior written permission.
     22  *
     23  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     24  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     25  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     26  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     27  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     28  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     29  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     30  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     31  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     32  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     33  * SUCH DAMAGE.
     34  *
     35  * from: Utah $Hdr: cpu.h 1.16 91/03/25$
     36  *
     37  *	@(#)cpu.h	8.4 (Berkeley) 1/5/94
     38  */
     39 /*
     40  * Copyright (c) 1988 University of Utah.
     41  *
     42  * This code is derived from software contributed to Berkeley by
     43  * the Systems Programming Group of the University of Utah Computer
     44  * Science Department.
     45  *
     46  * Redistribution and use in source and binary forms, with or without
     47  * modification, are permitted provided that the following conditions
     48  * are met:
     49  * 1. Redistributions of source code must retain the above copyright
     50  *    notice, this list of conditions and the following disclaimer.
     51  * 2. Redistributions in binary form must reproduce the above copyright
     52  *    notice, this list of conditions and the following disclaimer in the
     53  *    documentation and/or other materials provided with the distribution.
     54  * 3. All advertising materials mentioning features or use of this software
     55  *    must display the following acknowledgement:
     56  *	This product includes software developed by the University of
     57  *	California, Berkeley and its contributors.
     58  * 4. Neither the name of the University nor the names of its contributors
     59  *    may be used to endorse or promote products derived from this software
     60  *    without specific prior written permission.
     61  *
     62  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     63  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     64  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     65  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     66  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     67  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     68  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     69  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     70  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     71  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     72  * SUCH DAMAGE.
     73  *
     74  * from: Utah $Hdr: cpu.h 1.16 91/03/25$
     75  *
     76  *	@(#)cpu.h	8.4 (Berkeley) 1/5/94
     77  */
     78 
     79 #ifndef _NEWS68K_CPU_H_
     80 #define _NEWS68K_CPU_H_
     81 
     82 #if defined(_KERNEL)
     83 
     84 /*
     85  * Exported definitions unique to news68k cpu support.
     86  */
     87 
     88 #if defined(_KERNEL_OPT)
     89 #include "opt_lockdebug.h"
     90 #endif
     91 
     92 /*
     93  * Get common m68k CPU definitions.
     94  */
     95 #include <m68k/cpu.h>
     96 
     97 /*
     98  * XXX news1700 L2 cache would be corrupted with DC_BE and IC_BE...
     99  * XXX Should these be defined in machine/cpu.h?
    100  */
    101 #undef CACHE_ON
    102 #undef CACHE_CLR
    103 #undef IC_CLEAR
    104 #undef DC_CLEAR
    105 #define CACHE_ON	(DC_WA|DC_CLR|DC_ENABLE|IC_CLR|IC_ENABLE)
    106 #define CACHE_CLR	CACHE_ON
    107 #define IC_CLEAR	(DC_WA|DC_ENABLE|IC_CLR|IC_ENABLE)
    108 #define DC_CLEAR	(DC_WA|DC_CLR|DC_ENABLE|IC_ENABLE)
    109 
    110 #define DCIC_CLR	(DC_CLR|IC_CLR)
    111 #define CACHE_BE	(DC_BE|IC_BE)
    112 
    113 /*
    114  * Get interrupt glue.
    115  */
    116 #include <machine/intr.h>
    117 
    118 #include <sys/cpu_data.h>
    119 struct cpu_info {
    120 	struct cpu_data ci_data;	/* MI per-cpu data */
    121 	int	ci_mtx_count;
    122 	int	ci_mtx_oldspl;
    123 };
    124 
    125 extern struct cpu_info cpu_info_store;
    126 
    127 #define	curcpu()			(&cpu_info_store)
    128 
    129 /*
    130  * definitions of cpu-dependent requirements
    131  * referenced in generic code
    132  */
    133 #define cpu_swapin(p)			/* nothing */
    134 #define cpu_swapout(p)			/* nothing */
    135 #define cpu_number()			0
    136 
    137 void	cpu_proc_fork(struct proc *, struct proc *);
    138 
    139 /*
    140  * Arguments to hardclock and gatherstats encapsulate the previous
    141  * machine state in an opaque clockframe.  One the hp300, we use
    142  * what the hardware pushes on an interrupt (frame format 0).
    143  */
    144 struct clockframe {
    145 	u_short	sr;		/* sr at time of interrupt */
    146 	u_long	pc;		/* pc at time of interrupt */
    147 	u_short	vo;		/* vector offset (4-word frame) */
    148 };
    149 
    150 #define CLKF_USERMODE(framep)	(((framep)->sr & PSL_S) == 0)
    151 #define CLKF_BASEPRI(framep)	(((framep)->sr & PSL_IPL) == 0)
    152 #define CLKF_PC(framep)		((framep)->pc)
    153 #if 0
    154 /* We would like to do it this way... */
    155 #define CLKF_INTR(framep)	(((framep)->sr & PSL_M) == 0)
    156 #else
    157 /* but until we start using PSL_M, we have to do this instead */
    158 #define CLKF_INTR(framep)	(0)	/* XXX */
    159 #endif
    160 
    161 
    162 /*
    163  * Preempt the current process if in interrupt from user mode,
    164  * or after the current trap/syscall if in system mode.
    165  */
    166 extern int want_resched;	/* resched() was called */
    167 #define cpu_need_resched(ci)	do { want_resched++; aston(); } while(0)
    168 
    169 /*
    170  * Give a profiling tick to the current process when the user profiling
    171  * buffer pages are invalid.  On the hp300, request an ast to send us
    172  * through trap, marking the proc as needing a profiling tick.
    173  */
    174 #define cpu_need_proftick(l)	\
    175 	do { (l)->l_flag |= LP_OWEUPC; aston(); } while(0)
    176 
    177 /*
    178  * Notify the current process (p) that it has a signal pending,
    179  * process as soon as possible.
    180  */
    181 #define cpu_signotify(l)	aston()
    182 
    183 extern int astpending;		/* need to trap before returning to user mode */
    184 extern volatile u_char *ctrl_ast;
    185 #define aston()		do { astpending++; *ctrl_ast = 0xff; } while(0)
    186 
    187 #endif /* _KERNEL */
    188 
    189 /*
    190  * CTL_MACHDEP definitions.
    191  */
    192 #define CPU_CONSDEV		1	/* dev_t: console terminal device */
    193 #define CPU_MAXID		2	/* number of valid machdep ids */
    194 
    195 #define CTL_MACHDEP_NAMES { \
    196 	{ 0, 0 }, \
    197 	{ "console_device", CTLTYPE_STRUCT }, \
    198 }
    199 
    200 #ifdef _KERNEL
    201 
    202 #if defined(news1700) || defined(news1200)
    203 #ifndef M68030
    204 #define M68030
    205 #endif
    206 #define M68K_MMU_MOTOROLA
    207 #endif
    208 
    209 #if defined(news1700)
    210 #define CACHE_HAVE_PAC
    211 #endif
    212 
    213 #endif
    214 
    215 #ifdef _KERNEL
    216 extern int systype;
    217 #define NEWS1700	0
    218 #define NEWS1200	1
    219 
    220 extern int cpuspeed;
    221 extern char *intiobase, *intiolimit, *extiobase;
    222 extern u_int intiobase_phys, intiotop_phys;
    223 extern u_int extiobase_phys, extiotop_phys;
    224 extern u_int intrcnt[];
    225 
    226 extern void (*vectab[])(void);
    227 
    228 struct frame;
    229 struct fpframe;
    230 struct pcb;
    231 
    232 /* locore.s functions */
    233 void m68881_save(struct fpframe *);
    234 void m68881_restore(struct fpframe *);
    235 
    236 int suline(caddr_t, caddr_t);
    237 void savectx(struct pcb *);
    238 void switch_exit(struct lwp *);
    239 void switch_lwp_exit(struct lwp *);
    240 void proc_trampoline(void);
    241 void loadustp(int);
    242 void badtrap(void);
    243 void intrhand_vectored(void);
    244 int getsr(void);
    245 
    246 
    247 void doboot(int)
    248 	__attribute__((__noreturn__));
    249 void nmihand(struct frame *);
    250 void ecacheon(void);
    251 void ecacheoff(void);
    252 
    253 /* machdep.c functions */
    254 int badaddr(caddr_t, int);
    255 int badbaddr(caddr_t);
    256 
    257 /* sys_machdep.c functions */
    258 int cachectl1(unsigned long, vaddr_t, size_t, struct proc *);
    259 
    260 /* vm_machdep.c functions */
    261 void physaccess(caddr_t, caddr_t, int, int);
    262 void physunaccess(caddr_t, int);
    263 int kvtop(caddr_t);
    264 
    265 #endif
    266 
    267 /* physical memory sections */
    268 #define ROMBASE		0xe0000000
    269 
    270 #define INTIOBASE1700	0xe0c00000
    271 #define INTIOTOP1700	0xe1d00000 /* XXX */
    272 #define EXTIOBASE1700	0xf0f00000
    273 #define EXTIOTOP1700	0xf1000000 /* XXX */
    274 #define CTRL_POWER1700	0xe1380000
    275 #define CTRL_LED1700	0xe0dc0000
    276 
    277 #define INTIOBASE1200	0xe1000000
    278 #define INTIOTOP1200	0xe1d00000 /* XXX */
    279 #define EXTIOBASE1200	0xe4000000
    280 #define EXTIOTOP1200	0xe4020000 /* XXX */
    281 #define CTRL_POWER1200	0xe1000000
    282 #define CTRL_LED1200	0xe1500001
    283 
    284 #define MAXADDR		0xfffff000
    285 
    286 /*
    287  * Internal IO space:
    288  *
    289  * Internal IO space is mapped in the kernel from ``intiobase'' to
    290  * ``intiolimit'' (defined in locore.s).  Since it is always mapped,
    291  * conversion between physical and kernel virtual addresses is easy.
    292  */
    293 #define ISIIOVA(va) \
    294 	((char *)(va) >= intiobase && (char *)(va) < intiolimit)
    295 #define IIOV(pa)	(((u_int)(pa) - intiobase_phys) + (u_int)intiobase)
    296 #define ISIIOPA(pa) \
    297 	((u_int)(pa) >= intiobase_phys && (u_int)(pa) < intiotop_phys)
    298 #define IIOP(va)	(((u_int)(va) - (u_int)intiobase) + intiobase_phys)
    299 #define IIOPOFF(pa)	((u_int)(pa) - intiobase_phys)
    300 
    301 /* XXX EIO space mapping should be modified like hp300 XXX */
    302 #define	EIOSIZE		(extiotop_phys - extiobase_phys)
    303 #define ISEIOVA(va) \
    304 	((char *)(va) >= extiobase && (char *)(va) < (char *)EIOSIZE)
    305 #define EIOV(pa)	(((u_int)(pa) - extiobase_phys) + (u_int)extiobase)
    306 
    307 #if defined(CACHE_HAVE_PAC) || defined(CACHE_HAVE_VAC)
    308 #define M68K_CACHEOPS_MACHDEP
    309 #endif
    310 
    311 #ifdef CACHE_HAVE_PAC
    312 #define M68K_CACHEOPS_MACHDEP_PCIA
    313 #endif
    314 
    315 #ifdef CACHE_HAVE_VAC
    316 #define M68K_CACHEOPS_MACHDEP_DCIA
    317 #define M68K_CACHEOPS_MACHDEP_DCIS
    318 #define M68K_CACHEOPS_MACHDEP_DCIU
    319 #endif
    320 
    321 #endif /* !_NEWS68K_CPU_H_ */
    322