cpu.h revision 1.50
1 /* $NetBSD: cpu.h,v 1.50 2024/01/15 00:35:23 thorpej Exp $ */ 2 3 /* 4 * Copyright (c) 1988 University of Utah. 5 * Copyright (c) 1982, 1990, 1993 6 * The Regents of the University of California. All rights reserved. 7 * 8 * This code is derived from software contributed to Berkeley by 9 * the Systems Programming Group of the University of Utah Computer 10 * Science Department. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 3. Neither the name of the University nor the names of its contributors 21 * may be used to endorse or promote products derived from this software 22 * without specific prior written permission. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 25 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 27 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 30 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 34 * SUCH DAMAGE. 35 * 36 * from: Utah $Hdr: cpu.h 1.16 91/03/25$ 37 * 38 * @(#)cpu.h 8.4 (Berkeley) 1/5/94 39 */ 40 41 #ifndef _NEWS68K_CPU_H_ 42 #define _NEWS68K_CPU_H_ 43 44 #if defined(_KERNEL_OPT) 45 #include "opt_lockdebug.h" 46 #include "opt_m68k_arch.h" 47 #endif 48 49 /* 50 * Get common m68k CPU definitions. 51 */ 52 #include <m68k/cpu.h> 53 54 #if defined(_KERNEL) 55 /* 56 * Exported definitions unique to news68k cpu support. 57 */ 58 59 /* 60 * XXX news1700 L2 cache would be corrupted with DC_BE and IC_BE... 61 * XXX Should these be defined in machine/cpu.h? 62 */ 63 #undef CACHE_ON 64 #undef CACHE_CLR 65 #undef IC_CLEAR 66 #undef DC_CLEAR 67 #define CACHE_ON (DC_WA|DC_CLR|DC_ENABLE|IC_CLR|IC_ENABLE) 68 #define CACHE_CLR CACHE_ON 69 #define IC_CLEAR (DC_WA|DC_ENABLE|IC_CLR|IC_ENABLE) 70 #define DC_CLEAR (DC_WA|DC_CLR|DC_ENABLE|IC_ENABLE) 71 72 #define DCIC_CLR (DC_CLR|IC_CLR) 73 #define CACHE_BE (DC_BE|IC_BE) 74 75 /* 76 * Get interrupt glue. 77 */ 78 #include <machine/intr.h> 79 80 /* 81 * Arguments to hardclock and gatherstats encapsulate the previous 82 * machine state in an opaque clockframe. On the news68k, we use 83 * what the locore.s glue puts on the stack before calling C-code. 84 */ 85 struct clockframe { 86 u_int cf_regs[4]; /* d0,d1,a0,a1 */ 87 u_short cf_sr; /* sr at time of interrupt */ 88 u_long cf_pc; /* pc at time of interrupt */ 89 u_short cf_vo; /* vector offset (4-word frame) */ 90 } __attribute__((packed)); 91 92 #define CLKF_USERMODE(framep) (((framep)->cf_sr & PSL_S) == 0) 93 #define CLKF_PC(framep) ((framep)->cf_pc) 94 #if 0 95 /* We would like to do it this way... */ 96 #define CLKF_INTR(framep) (((framep)->cf_sr & PSL_M) == 0) 97 #else 98 /* but until we start using PSL_M, we have to do this instead */ 99 #include <machine/intr.h> 100 #define CLKF_INTR(framep) (idepth > 1) /* XXX */ 101 #endif 102 103 104 /* 105 * Preempt the current process if in interrupt from user mode, 106 * or after the current trap/syscall if in system mode. 107 */ 108 #define cpu_need_resched(ci,l,flags) do { \ 109 __USE(flags); \ 110 aston(); \ 111 } while (/*CONSTCOND*/0) 112 113 /* 114 * Give a profiling tick to the current process when the user profiling 115 * buffer pages are invalid. On the news68k, request an ast to send us 116 * through trap, marking the proc as needing a profiling tick. 117 */ 118 #define cpu_need_proftick(l) \ 119 do { (l)->l_pflag |= LP_OWEUPC; aston(); } while (/* CONSTCOND */0) 120 121 /* 122 * Notify the current process (p) that it has a signal pending, 123 * process as soon as possible. 124 */ 125 #define cpu_signotify(l) aston() 126 127 extern int astpending; /* need to trap before returning to user mode */ 128 extern volatile u_char *ctrl_ast; 129 #define aston() \ 130 do { astpending++; *ctrl_ast = 0xff; } while (/* CONSTCOND */0) 131 132 #if defined(news1700) || defined(news1200) 133 #ifndef M68030 134 #define M68030 135 #endif 136 #define M68K_MMU_MOTOROLA 137 #endif 138 139 #if defined(news1700) 140 #define CACHE_HAVE_PAC 141 #endif 142 143 extern int systype; 144 #define NEWS1700 0 145 #define NEWS1200 1 146 147 extern int cpuspeed; 148 extern char *intiobase, *intiolimit, *extiobase; 149 extern u_int intiobase_phys, intiotop_phys; 150 extern u_int extiobase_phys, extiotop_phys; 151 extern u_int intrcnt[]; 152 153 extern void *romcallvec; 154 155 struct frame; 156 157 void doboot(int) 158 __attribute__((__noreturn__)); 159 void nmihand(struct frame *); 160 void ecacheon(void); 161 void ecacheoff(void); 162 163 /* machdep.c functions */ 164 int badaddr(void *, int); 165 int badbaddr(void *); 166 167 #endif 168 169 /* physical memory sections */ 170 #define ROMBASE 0xe0000000 171 172 #define INTIOBASE1700 0xe0c00000 173 #define INTIOTOP1700 0xe1d00000 /* XXX */ 174 #define EXTIOBASE1700 0xf0f00000 175 #define EXTIOTOP1700 0xf1000000 /* XXX */ 176 #define CTRL_POWER1700 0xe1380000 177 #define CTRL_LED1700 0xe0dc0000 178 179 #define INTIOBASE1200 0xe1000000 180 #define INTIOTOP1200 0xe1d00000 /* XXX */ 181 #define EXTIOBASE1200 0xe4000000 182 #define EXTIOTOP1200 0xe4020000 /* XXX */ 183 #define CTRL_POWER1200 0xe1000000 184 #define CTRL_LED1200 0xe1500001 185 186 #define MAXADDR 0xfffff000 187 188 /* 189 * Internal IO space: 190 * 191 * Internal IO space is mapped in the kernel from ``intiobase'' to 192 * ``intiolimit'' (defined in locore.s). Since it is always mapped, 193 * conversion between physical and kernel virtual addresses is easy. 194 */ 195 #define ISIIOVA(va) \ 196 ((char *)(va) >= intiobase && (char *)(va) < intiolimit) 197 #define IIOV(pa) (((u_int)(pa) - intiobase_phys) + (u_int)intiobase) 198 #define ISIIOPA(pa) \ 199 ((u_int)(pa) >= intiobase_phys && (u_int)(pa) < intiotop_phys) 200 #define IIOP(va) (((u_int)(va) - (u_int)intiobase) + intiobase_phys) 201 #define IIOPOFF(pa) ((u_int)(pa) - intiobase_phys) 202 203 /* XXX EIO space mapping should be modified like hp300 XXX */ 204 #define EIOSIZE (extiotop_phys - extiobase_phys) 205 #define ISEIOVA(va) \ 206 ((char *)(va) >= extiobase && (char *)(va) < (char *)EIOSIZE) 207 #define EIOV(pa) (((u_int)(pa) - extiobase_phys) + (u_int)extiobase) 208 209 #if defined(CACHE_HAVE_PAC) || defined(CACHE_HAVE_VAC) 210 #define M68K_CACHEOPS_MACHDEP 211 #endif 212 213 #ifdef CACHE_HAVE_PAC 214 #define M68K_CACHEOPS_MACHDEP_PCIA 215 #endif 216 217 #ifdef CACHE_HAVE_VAC 218 #define M68K_CACHEOPS_MACHDEP_DCIA 219 #define M68K_CACHEOPS_MACHDEP_DCIS 220 #define M68K_CACHEOPS_MACHDEP_DCIU 221 #endif 222 223 #endif /* !_NEWS68K_CPU_H_ */ 224
Indexes created Mon Sep 29 18:09:42 GMT 2025