1 /* $NetBSD: pq3obio.c,v 1.7 2021/08/07 16:19:02 thorpej Exp $ */ 2 /*- 3 * Copyright (c) 2010, 2011 The NetBSD Foundation, Inc. 4 * All rights reserved. 5 * 6 * This code is derived from software contributed to The NetBSD Foundation 7 * by Raytheon BBN Technologies Corp and Defense Advanced Research Projects 8 * Agency and which was developed by Matt Thomas of 3am Software Foundry. 9 * 10 * This material is based upon work supported by the Defense Advanced Research 11 * Projects Agency and Space and Naval Warfare Systems Center, Pacific, under 12 * Contract No. N66001-09-C-2073. 13 * Approved for Public Release, Distribution Unlimited 14 * 15 * Redistribution and use in source and binary forms, with or without 16 * modification, are permitted provided that the following conditions 17 * are met: 18 * 1. Redistributions of source code must retain the above copyright 19 * notice, this list of conditions and the following disclaimer. 20 * 2. Redistributions in binary form must reproduce the above copyright 21 * notice, this list of conditions and the following disclaimer in the 22 * documentation and/or other materials provided with the distribution. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 25 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 26 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 27 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 28 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 34 * POSSIBILITY OF SUCH DAMAGE. 35 */ 36 37 #define LBC_PRIVATE 38 39 #include <sys/cdefs.h> 40 __KERNEL_RCSID(0, "$NetBSD: pq3obio.c,v 1.7 2021/08/07 16:19:02 thorpej Exp $"); 41 42 #include "locators.h" 43 44 #include <sys/param.h> 45 #include <sys/device.h> 46 #include <sys/kmem.h> 47 #include <sys/bus.h> 48 #include <sys/extent.h> 49 50 #include <powerpc/booke/cpuvar.h> 51 #include <powerpc/booke/e500var.h> 52 #include <powerpc/booke/e500reg.h> 53 #include <powerpc/booke/obiovar.h> 54 55 #define OBIO_PORTS 8 56 57 static int pq3obio_match(device_t, cfdata_t, void *); 58 static void pq3obio_attach(device_t, device_t, void *); 59 60 CFATTACH_DECL_NEW(pq3obio, sizeof(struct pq3obio_softc), 61 pq3obio_match, pq3obio_attach, NULL, NULL); 62 63 static int 64 pq3obio_match(device_t parent, cfdata_t cf, void *aux) 65 { 66 67 if (!e500_cpunode_submatch(parent, cf, "lbc", aux)) 68 return 0; 69 70 return 1; 71 } 72 73 static int 74 pq3obio_print(void *aux, const char *pnp) 75 { 76 struct generic_attach_args * const ga = aux; 77 78 if (pnp) 79 aprint_normal(" at %s", pnp); 80 81 if (ga->ga_cs != OBIOCF_CS_DEFAULT) 82 aprint_normal(" cs %d", ga->ga_cs); 83 84 if (ga->ga_addr != OBIOCF_ADDR_DEFAULT) { 85 aprint_normal(" addr %#x", ga->ga_addr); 86 if (ga->ga_size != OBIOCF_SIZE_DEFAULT) 87 aprint_normal(" size %#x", ga->ga_size); 88 } 89 if (ga->ga_irq != OBIOCF_IRQ_DEFAULT) 90 aprint_normal(" irq %d", ga->ga_irq); 91 92 return UNCONF; 93 } 94 95 static int 96 pq3obio_search(device_t parent, cfdata_t cf, const int *slocs, void *aux) 97 { 98 struct pq3obio_softc * const sc = device_private(parent); 99 struct generic_attach_args ga; 100 bool tryagain; 101 102 do { 103 const struct pq3lbc_softc *lbc; 104 ga.ga_name = "obio"; 105 ga.ga_addr = cf->cf_loc[OBIOCF_ADDR]; 106 ga.ga_size = cf->cf_loc[OBIOCF_SIZE]; 107 ga.ga_irq = cf->cf_loc[OBIOCF_IRQ]; 108 ga.ga_cs = cf->cf_loc[OBIOCF_CS]; 109 ga.ga_bst = &sc->sc_obio_bst; 110 111 if (ga.ga_cs != OBIOCF_CS_DEFAULT) { 112 lbc = &sc->sc_lbcs[ga.ga_cs]; 113 if ((u_int) ga.ga_cs >= __arraycount(sc->sc_lbcs)) 114 return 0; 115 if (ga.ga_addr != OBIOCF_ADDR_DEFAULT) { 116 if (ga.ga_addr < lbc->lbc_base 117 || ga.ga_addr > lbc->lbc_limit) 118 return 0; 119 } else { 120 ga.ga_addr = lbc->lbc_base; 121 } 122 } else { 123 u_int cs; 124 if (ga.ga_addr == OBIOCF_ADDR_DEFAULT) 125 return 0; 126 for (cs = 0, lbc = sc->sc_lbcs; 127 cs < __arraycount(sc->sc_lbcs); 128 cs++, lbc++) { 129 if (ga.ga_addr >= lbc->lbc_base 130 && ga.ga_addr <= lbc->lbc_limit) { 131 ga.ga_cs = cs; 132 break; 133 } 134 } 135 if (ga.ga_cs == OBIOCF_CS_DEFAULT) 136 return 0; 137 } 138 139 if (ga.ga_size != OBIOCF_SIZE_DEFAULT) { 140 if (ga.ga_size >= lbc->lbc_limit - ga.ga_addr) 141 return 0; 142 } else { 143 ga.ga_size = lbc->lbc_limit + 1 - lbc->lbc_base; 144 } 145 146 tryagain = false; 147 if (config_probe(parent, cf, &ga)) { 148 int floc[OBIOCF_NLOCS] = { 149 [OBIOCF_ADDR] = ga.ga_addr, 150 [OBIOCF_SIZE] = ga.ga_size, 151 [OBIOCF_IRQ] = ga.ga_irq, 152 [OBIOCF_CS] = ga.ga_cs, 153 }; 154 config_attach(parent, cf, &ga, pq3obio_print, 155 CFARGS(.locators = floc)); 156 tryagain = (cf->cf_fstate == FSTATE_STAR); 157 } 158 } while (tryagain); 159 160 return (0); 161 } 162 163 static const char br_msel_strings[8][6] = { 164 [__SHIFTOUT(BR_MSEL_GPCM,BR_MSEL)] = "GPCM", 165 [__SHIFTOUT(BR_MSEL_FCM,BR_MSEL)] = "FCM", 166 [__SHIFTOUT(BR_MSEL_SDRAM,BR_MSEL)] = "SDRAM", 167 [__SHIFTOUT(BR_MSEL_UPMA,BR_MSEL)] = "UPMA", 168 [__SHIFTOUT(BR_MSEL_UPMB,BR_MSEL)] = "UPMB", 169 [__SHIFTOUT(BR_MSEL_UPMC,BR_MSEL)] = "UPMC", 170 }; 171 172 static void 173 pq3obio_attach(device_t parent, device_t self, void *aux) 174 { 175 struct cpunode_softc * const psc = device_private(parent); 176 struct pq3obio_softc * const sc = device_private(self); 177 struct cpunode_attach_args * const cna = aux; 178 struct cpunode_locators * const cnl = &cna->cna_locs; 179 struct powerpc_bus_space * const t = &sc->sc_obio_bst; 180 u_int found = 0; 181 int error; 182 183 psc->sc_children |= cna->cna_childmask; 184 sc->sc_dev = self; 185 sc->sc_bst = cna->cna_memt; 186 187 error = bus_space_map(sc->sc_bst, cnl->cnl_addr, cnl->cnl_size, 0, 188 &sc->sc_bsh); 189 if (error) { 190 aprint_error("failed to map registers: %d\n", error); 191 return; 192 } 193 194 for (u_int i = 0; i < OBIO_PORTS; i++) { 195 struct pq3lbc_softc * const lbc = &sc->sc_lbcs[i]; 196 uint32_t br = bus_space_read_4(sc->sc_bst, sc->sc_bsh, BRn(i)); 197 if (br & BR_V) { 198 found++; 199 lbc->lbc_br = br; 200 lbc->lbc_or = bus_space_read_4(sc->sc_bst, 201 sc->sc_bsh, ORn(i)); 202 lbc->lbc_base = lbc->lbc_br & BR_BA & lbc->lbc_or; 203 lbc->lbc_limit = lbc->lbc_base + ~(lbc->lbc_or & OR_AM); 204 } 205 } 206 207 aprint_normal(": %u of 8 ports enabled\n", found); 208 if (found == 0) 209 return; 210 211 t->pbs_base = 0xffffffff; 212 t->pbs_limit = 0; 213 t->pbs_flags = _BUS_SPACE_BIG_ENDIAN; 214 215 u_int sorted[OBIO_PORTS]; 216 u_int nsorted = 0; 217 218 for (u_int i = 0; i < OBIO_PORTS; i++) { 219 struct pq3lbc_softc * const lbc = &sc->sc_lbcs[i]; 220 if ((lbc->lbc_br & BR_V) == 0) 221 continue; 222 223 u_int j; 224 for (j = 0; j < nsorted; j++) { 225 if (lbc->lbc_base < sc->sc_lbcs[sorted[j]].lbc_base) 226 break; 227 } 228 for (u_int k = ++nsorted; k > j; k--) { 229 sorted[k] = sorted[k - 1]; 230 } 231 sorted[j] = i; 232 233 if (lbc->lbc_base < t->pbs_base) 234 t->pbs_base = lbc->lbc_base; 235 if (lbc->lbc_limit > t->pbs_limit) 236 t->pbs_limit = lbc->lbc_limit; 237 #if 0 238 aprint_normal_dev(sc->sc_dev, 239 "cs%u: br=%#x or=%#x", i, lbc->lbc_br, lbc->lbc_or); 240 #endif 241 u_int n = ffs(~(lbc->lbc_or & OR_AM) + 1) - 1; 242 aprint_normal_dev(sc->sc_dev, 243 "cs%u: %u%cB %u-bit %s region at %#x\n", 244 i, 245 1 << (n % 10), " KMGTPE"[n / 10], 246 1 << (__SHIFTOUT(lbc->lbc_br, BR_PS) + 2), 247 br_msel_strings[__SHIFTOUT(lbc->lbc_br,BR_MSEL)], 248 lbc->lbc_base); 249 } 250 251 error = bus_space_init(t, device_xname(sc->sc_dev), NULL, 0); 252 if (error) { 253 aprint_error_dev(sc->sc_dev, 254 "failed to initialize obio bus space: %d\n", error); 255 return; 256 } 257 258 /* 259 * We've created a bus space which covers all the chip selects 260 * but there might be gaps inbetween them. We need to make sure 261 * bus_space_map will fail for those. To do that, we reserve 262 * the gaps between the chip-selects. 263 */ 264 for (u_int i = 1; i < found; i++) { 265 struct pq3lbc_softc * const lbc_lo = &sc->sc_lbcs[sorted[i-1]]; 266 struct pq3lbc_softc * const lbc_hi = &sc->sc_lbcs[sorted[i]]; 267 if (lbc_lo->lbc_limit + 1 == lbc_hi->lbc_base) 268 continue; 269 error = extent_alloc_region(t->pbs_extent, 270 lbc_lo->lbc_limit + 1, 271 lbc_hi->lbc_base - (lbc_lo->lbc_limit + 1), 0); 272 if (error) { 273 aprint_error_dev(sc->sc_dev, 274 "failed to reserve %#x..%#x: %d\n", 275 lbc_lo->lbc_limit + 1, 276 lbc_hi->lbc_base - 1, 277 error); 278 return; 279 } 280 } 281 282 /* 283 * Now we can do the device configuration to find what might 284 * be using obio. 285 */ 286 int locs[OBIOCF_NLOCS]; 287 locs[OBIOCF_ADDR] = OBIOCF_ADDR_DEFAULT; 288 locs[OBIOCF_SIZE] = OBIOCF_SIZE_DEFAULT; 289 locs[OBIOCF_CS] = OBIOCF_CS_DEFAULT; 290 config_search(self, NULL, 291 CFARGS(.search = pq3obio_search, 292 .locators = locs)); 293 } 294
Indexes created Sat Sep 20 22:09:52 GMT 2025