pq3obio.c revision 1.1.4.1
1 /* $NetBSD: pq3obio.c,v 1.1.4.1 2011/06/06 09:06:26 jruoho Exp $ */ 2 /*- 3 * Copyright (c) 2010, 2011 The NetBSD Foundation, Inc. 4 * All rights reserved. 5 * 6 * This code is derived from software contributed to The NetBSD Foundation 7 * by Raytheon BBN Technologies Corp and Defense Advanced Research Projects 8 * Agency and which was developed by Matt Thomas of 3am Software Foundry. 9 * 10 * This material is based upon work supported by the Defense Advanced Research 11 * Projects Agency and Space and Naval Warfare Systems Center, Pacific, under 12 * Contract No. N66001-09-C-2073. 13 * Approved for Public Release, Distribution Unlimited 14 * 15 * Redistribution and use in source and binary forms, with or without 16 * modification, are permitted provided that the following conditions 17 * are met: 18 * 1. Redistributions of source code must retain the above copyright 19 * notice, this list of conditions and the following disclaimer. 20 * 2. Redistributions in binary form must reproduce the above copyright 21 * notice, this list of conditions and the following disclaimer in the 22 * documentation and/or other materials provided with the distribution. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 25 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 26 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 27 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 28 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 34 * POSSIBILITY OF SUCH DAMAGE. 35 */ 36 37 #define LBC_PRIVATE 38 39 #include "locators.h" 40 41 #include <sys/cdefs.h> 42 43 __KERNEL_RCSID(0, "$NetBSD: pq3obio.c,v 1.1.4.1 2011/06/06 09:06:26 jruoho Exp $"); 44 45 #include <sys/param.h> 46 #include <sys/device.h> 47 #include <sys/kmem.h> 48 #include <sys/bus.h> 49 #include <sys/extent.h> 50 51 #include <powerpc/booke/cpuvar.h> 52 #include <powerpc/booke/e500var.h> 53 #include <powerpc/booke/e500reg.h> 54 #include <powerpc/booke/obiovar.h> 55 56 static int pq3obio_match(device_t, cfdata_t, void *); 57 static void pq3obio_attach(device_t, device_t, void *); 58 59 CFATTACH_DECL_NEW(pq3obio, sizeof(struct pq3obio_softc), 60 pq3obio_match, pq3obio_attach, NULL, NULL); 61 62 static int 63 pq3obio_match(device_t parent, cfdata_t cf, void *aux) 64 { 65 66 if (!e500_cpunode_submatch(parent, cf, "lbc", aux)) 67 return 0; 68 69 return 1; 70 } 71 72 static int 73 pq3obio_print(void *aux, const char *pnp) 74 { 75 struct generic_attach_args * const ga = aux; 76 77 if (pnp) 78 aprint_normal(" at %s", pnp); 79 80 if (ga->ga_cs != OBIOCF_CS_DEFAULT) 81 aprint_normal(" cs %d", ga->ga_cs); 82 83 if (ga->ga_addr != OBIOCF_ADDR_DEFAULT) { 84 aprint_normal(" addr %#x", ga->ga_addr); 85 if (ga->ga_size != OBIOCF_SIZE_DEFAULT) 86 aprint_normal(" size %#x", ga->ga_size); 87 } 88 if (ga->ga_irq != OBIOCF_IRQ_DEFAULT) 89 aprint_normal(" irq %d", ga->ga_irq); 90 91 return UNCONF; 92 } 93 94 static int 95 pq3obio_search(device_t parent, cfdata_t cf, const int *slocs, void *aux) 96 { 97 struct pq3obio_softc * const sc = device_private(parent); 98 struct generic_attach_args ga; 99 bool tryagain; 100 101 do { 102 const struct pq3lbc_softc *lbc; 103 ga.ga_name = "obio"; 104 ga.ga_addr = cf->cf_loc[OBIOCF_ADDR]; 105 ga.ga_size = cf->cf_loc[OBIOCF_SIZE]; 106 ga.ga_irq = cf->cf_loc[OBIOCF_IRQ]; 107 ga.ga_cs = cf->cf_loc[OBIOCF_CS]; 108 ga.ga_bst = &sc->sc_obio_bst; 109 110 if (ga.ga_cs != OBIOCF_CS_DEFAULT) { 111 lbc = &sc->sc_lbcs[ga.ga_cs]; 112 if ((u_int) ga.ga_cs >= __arraycount(sc->sc_lbcs)) 113 return 0; 114 if (ga.ga_addr != OBIOCF_ADDR_DEFAULT) { 115 if (ga.ga_addr < lbc->lbc_base 116 || ga.ga_addr > lbc->lbc_limit) 117 return 0; 118 } else { 119 ga.ga_addr = lbc->lbc_base; 120 } 121 } else { 122 u_int cs; 123 if (ga.ga_addr == OBIOCF_ADDR_DEFAULT) 124 return 0; 125 for (cs = 0, lbc = sc->sc_lbcs; 126 cs < __arraycount(sc->sc_lbcs); 127 cs++, lbc++) { 128 if (ga.ga_addr >= lbc->lbc_base 129 && ga.ga_addr <= lbc->lbc_limit) { 130 ga.ga_cs = cs; 131 break; 132 } 133 } 134 if (ga.ga_cs == OBIOCF_CS_DEFAULT) 135 return 0; 136 } 137 138 if (ga.ga_size != OBIOCF_SIZE_DEFAULT) { 139 if (ga.ga_size >= lbc->lbc_limit - ga.ga_addr) 140 return 0; 141 } else { 142 ga.ga_size = lbc->lbc_limit + 1 - lbc->lbc_base; 143 } 144 145 tryagain = false; 146 if (config_match(parent, cf, &ga) > 0) { 147 int floc[OBIOCF_NLOCS] = { 148 [OBIOCF_ADDR] = ga.ga_addr, 149 [OBIOCF_SIZE] = ga.ga_size, 150 [OBIOCF_IRQ] = ga.ga_irq, 151 [OBIOCF_CS] = ga.ga_cs, 152 }; 153 config_attach_loc(parent, cf, floc, &ga, pq3obio_print); 154 tryagain = (cf->cf_fstate == FSTATE_STAR); 155 } 156 } while (tryagain); 157 158 return (0); 159 } 160 161 static const char br_msel_strings[8][6] = { 162 [__SHIFTOUT(BR_MSEL_GPCM,BR_MSEL)] = "GPCM", 163 [__SHIFTOUT(BR_MSEL_FCM,BR_MSEL)] = "FCM", 164 [__SHIFTOUT(BR_MSEL_SDRAM,BR_MSEL)] = "SDRAM", 165 [__SHIFTOUT(BR_MSEL_UPMA,BR_MSEL)] = "UPMA", 166 [__SHIFTOUT(BR_MSEL_UPMB,BR_MSEL)] = "UPMB", 167 [__SHIFTOUT(BR_MSEL_UPMC,BR_MSEL)] = "UPMC", 168 }; 169 170 static void 171 pq3obio_attach(device_t parent, device_t self, void *aux) 172 { 173 struct cpunode_softc * const psc = device_private(parent); 174 struct pq3obio_softc * const sc = device_private(self); 175 struct cpunode_attach_args * const cna = aux; 176 struct cpunode_locators * const cnl = &cna->cna_locs; 177 struct powerpc_bus_space * const t = &sc->sc_obio_bst; 178 u_int found = 0; 179 int error; 180 181 psc->sc_children |= cna->cna_childmask; 182 sc->sc_dev = self; 183 sc->sc_bst = cna->cna_memt; 184 185 error = bus_space_map(sc->sc_bst, cnl->cnl_addr, cnl->cnl_size, 0, 186 &sc->sc_bsh); 187 if (error) { 188 aprint_error("failed to map registers: %d\n", error); 189 return; 190 } 191 192 for (u_int i = 0; i < 8; i++) { 193 struct pq3lbc_softc * const lbc = &sc->sc_lbcs[i]; 194 uint32_t br = bus_space_read_4(sc->sc_bst, sc->sc_bsh, BRn(i)); 195 if (br & BR_V) { 196 found++; 197 lbc->lbc_br = br; 198 lbc->lbc_or = bus_space_read_4(sc->sc_bst, 199 sc->sc_bsh, ORn(i)); 200 lbc->lbc_base = lbc->lbc_br & BR_BA & lbc->lbc_or; 201 lbc->lbc_limit = lbc->lbc_base + ~(lbc->lbc_or & OR_AM); 202 } 203 } 204 205 aprint_normal(": %u of 8 ports enabled\n", found); 206 if (found == 0) 207 return; 208 209 t->pbs_base = 0xffffffff; 210 t->pbs_limit = 0; 211 t->pbs_flags = _BUS_SPACE_BIG_ENDIAN; 212 213 u_int sorted[found]; 214 u_int nsorted = 0; 215 216 for (u_int i = 0; i < 8; i++) { 217 struct pq3lbc_softc * const lbc = &sc->sc_lbcs[i]; 218 if ((lbc->lbc_br & BR_V) == 0) 219 continue; 220 221 u_int j; 222 for (j = 0; j < nsorted; j++) { 223 if (lbc->lbc_base < sc->sc_lbcs[sorted[j]].lbc_base) 224 break; 225 } 226 for (u_int k = ++nsorted; k > j; k--) { 227 sorted[k] = sorted[k - 1]; 228 } 229 sorted[j] = i; 230 231 if (lbc->lbc_base < t->pbs_base) 232 t->pbs_base = lbc->lbc_base; 233 if (lbc->lbc_limit > t->pbs_limit) 234 t->pbs_limit = lbc->lbc_limit; 235 #if 0 236 aprint_normal_dev(sc->sc_dev, 237 "cs%u: br=%#x or=%#x", i, lbc->lbc_br, lbc->lbc_or); 238 #endif 239 u_int n = ffs(~(lbc->lbc_or & OR_AM) + 1) - 1; 240 aprint_normal_dev(sc->sc_dev, 241 "cs%u: %u%cB %u-bit %s region at %#x\n", 242 i, 243 1 << (n % 10), " KMGTPE"[n / 10], 244 1 << (__SHIFTOUT(lbc->lbc_br, BR_PS) + 2), 245 br_msel_strings[__SHIFTOUT(lbc->lbc_br,BR_MSEL)], 246 lbc->lbc_base); 247 } 248 249 error = bus_space_init(t, device_xname(sc->sc_dev), NULL, 0); 250 if (error) { 251 aprint_error_dev(sc->sc_dev, 252 "failed to initialize obio bus space: %d\n", error); 253 return; 254 } 255 256 /* 257 * We've created a bus space which covers all the chip selects 258 * but there might be gaps inbetween them. We need to make sure 259 * bus_space_map will fail for those. To do that, we reserve 260 * the gaps between the chip-selects. 261 */ 262 for (u_int i = 1; i < found; i++) { 263 struct pq3lbc_softc * const lbc_lo = &sc->sc_lbcs[sorted[i-1]]; 264 struct pq3lbc_softc * const lbc_hi = &sc->sc_lbcs[sorted[i]]; 265 if (lbc_lo->lbc_limit + 1 == lbc_hi->lbc_base) 266 continue; 267 error = extent_alloc_region(t->pbs_extent, 268 lbc_lo->lbc_limit + 1, 269 lbc_hi->lbc_base - (lbc_lo->lbc_limit + 1), 0); 270 if (error) { 271 aprint_error_dev(sc->sc_dev, 272 "failed to reserve %#x..%#x: %d\n", 273 lbc_lo->lbc_limit + 1, 274 lbc_hi->lbc_base - 1, 275 error); 276 return; 277 } 278 } 279 280 /* 281 * Now we can do the device configuration to find what might 282 * be using obio. 283 */ 284 int locs[OBIOCF_NLOCS]; 285 locs[OBIOCF_ADDR] = OBIOCF_ADDR_DEFAULT; 286 locs[OBIOCF_SIZE] = OBIOCF_SIZE_DEFAULT; 287 locs[OBIOCF_CS] = OBIOCF_CS_DEFAULT; 288 config_search_loc(pq3obio_search, self, "obio", locs, NULL); 289 } 290
Indexes created Thu Oct 16 14:10:15 GMT 2025