pq3obio.c revision 1.2
1 /* $NetBSD: pq3obio.c,v 1.2 2011/01/18 01:02:53 matt Exp $ */ 2 /*- 3 * Copyright (c) 2010, 2011 The NetBSD Foundation, Inc. 4 * All rights reserved. 5 * 6 * This code is derived from software contributed to The NetBSD Foundation 7 * by Raytheon BBN Technologies Corp and Defense Advanced Research Projects 8 * Agency and which was developed by Matt Thomas of 3am Software Foundry. 9 * 10 * This material is based upon work supported by the Defense Advanced Research 11 * Projects Agency and Space and Naval Warfare Systems Center, Pacific, under 12 * Contract No. N66001-09-C-2073. 13 * Approved for Public Release, Distribution Unlimited 14 * 15 * Redistribution and use in source and binary forms, with or without 16 * modification, are permitted provided that the following conditions 17 * are met: 18 * 1. Redistributions of source code must retain the above copyright 19 * notice, this list of conditions and the following disclaimer. 20 * 2. Redistributions in binary form must reproduce the above copyright 21 * notice, this list of conditions and the following disclaimer in the 22 * documentation and/or other materials provided with the distribution. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 25 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 26 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 27 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 28 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 34 * POSSIBILITY OF SUCH DAMAGE. 35 */ 36 37 #define LBC_PRIVATE 38 39 #include "locators.h" 40 41 #include <sys/cdefs.h> 42 43 __KERNEL_RCSID(0, "$NetBSD: pq3obio.c,v 1.2 2011/01/18 01:02:53 matt Exp $"); 44 45 #include <sys/param.h> 46 #include <sys/device.h> 47 #include <sys/kmem.h> 48 #include <sys/bus.h> 49 #include <sys/extent.h> 50 51 #include <powerpc/booke/cpuvar.h> 52 #include <powerpc/booke/e500var.h> 53 #include <powerpc/booke/e500reg.h> 54 55 struct pq3lbc_softc { 56 bus_addr_t lbc_base; 57 bus_addr_t lbc_limit; 58 uint32_t lbc_br; 59 uint32_t lbc_or; 60 }; 61 62 struct pq3obio_softc { 63 device_t sc_dev; 64 bus_space_tag_t sc_bst; 65 bus_space_handle_t sc_bsh; 66 struct pq3lbc_softc sc_lbcs[8]; 67 struct powerpc_bus_space sc_obio_bst; 68 }; 69 70 static int pq3obio_match(device_t, cfdata_t, void *); 71 static void pq3obio_attach(device_t, device_t, void *); 72 73 CFATTACH_DECL_NEW(pq3obio, sizeof(struct pq3obio_softc), 74 pq3obio_match, pq3obio_attach, NULL, NULL); 75 76 static int 77 pq3obio_match(device_t parent, cfdata_t cf, void *aux) 78 { 79 80 if (!e500_cpunode_submatch(parent, cf, "lbc", aux)) 81 return 0; 82 83 return 1; 84 } 85 86 static int 87 pq3obio_print(void *aux, const char *pnp) 88 { 89 struct generic_attach_args * const ga = aux; 90 91 if (pnp) 92 aprint_normal(" at %s", pnp); 93 94 if (ga->ga_cs != OBIOCF_CS_DEFAULT) 95 aprint_normal(" cs %d", ga->ga_cs); 96 97 if (ga->ga_addr != OBIOCF_ADDR_DEFAULT) { 98 aprint_normal(" addr %#x", ga->ga_addr); 99 if (ga->ga_size != OBIOCF_SIZE_DEFAULT) 100 aprint_normal(" size %#x", ga->ga_size); 101 } 102 if (ga->ga_irq != OBIOCF_IRQ_DEFAULT) 103 aprint_normal(" irq %d", ga->ga_irq); 104 105 return UNCONF; 106 } 107 108 static int 109 pq3obio_search(device_t parent, cfdata_t cf, const int *slocs, void *aux) 110 { 111 struct pq3obio_softc * const sc = device_private(parent); 112 struct generic_attach_args ga; 113 bool tryagain; 114 115 do { 116 const struct pq3lbc_softc *lbc; 117 ga.ga_name = "obio"; 118 ga.ga_addr = cf->cf_loc[OBIOCF_ADDR]; 119 ga.ga_size = cf->cf_loc[OBIOCF_SIZE]; 120 ga.ga_irq = cf->cf_loc[OBIOCF_IRQ]; 121 ga.ga_cs = cf->cf_loc[OBIOCF_CS]; 122 ga.ga_bst = &sc->sc_obio_bst; 123 124 if (ga.ga_cs != OBIOCF_CS_DEFAULT) { 125 lbc = &sc->sc_lbcs[ga.ga_cs]; 126 if ((u_int) ga.ga_cs >= __arraycount(sc->sc_lbcs)) 127 return 0; 128 if (ga.ga_addr != OBIOCF_ADDR_DEFAULT) { 129 if (ga.ga_addr < lbc->lbc_base 130 || ga.ga_addr > lbc->lbc_limit) 131 return 0; 132 } else { 133 ga.ga_addr = lbc->lbc_base; 134 } 135 } else { 136 u_int cs; 137 if (ga.ga_addr == OBIOCF_ADDR_DEFAULT) 138 return 0; 139 for (cs = 0, lbc = sc->sc_lbcs; 140 cs < __arraycount(sc->sc_lbcs); 141 cs++, lbc++) { 142 if (ga.ga_addr >= lbc->lbc_base 143 && ga.ga_addr <= lbc->lbc_limit) { 144 ga.ga_cs = cs; 145 break; 146 } 147 } 148 if (ga.ga_cs == OBIOCF_CS_DEFAULT) 149 return 0; 150 } 151 152 if (ga.ga_size != OBIOCF_SIZE_DEFAULT) { 153 if (ga.ga_size >= lbc->lbc_limit - ga.ga_addr) 154 return 0; 155 } else { 156 ga.ga_size = lbc->lbc_limit + 1 - lbc->lbc_base; 157 } 158 159 tryagain = false; 160 if (config_match(parent, cf, &ga) > 0) { 161 int floc[OBIOCF_NLOCS] = { 162 [OBIOCF_ADDR] = ga.ga_addr, 163 [OBIOCF_SIZE] = ga.ga_size, 164 [OBIOCF_IRQ] = ga.ga_irq, 165 [OBIOCF_CS] = ga.ga_cs, 166 }; 167 config_attach_loc(parent, cf, floc, &ga, pq3obio_print); 168 tryagain = (cf->cf_fstate == FSTATE_STAR); 169 } 170 } while (tryagain); 171 172 return (0); 173 } 174 175 static const char br_msel_strings[8][6] = { 176 [__SHIFTOUT(BR_MSEL_GPCM,BR_MSEL)] = "GPCM", 177 [__SHIFTOUT(BR_MSEL_FCM,BR_MSEL)] = "FCM", 178 [__SHIFTOUT(BR_MSEL_SDRAM,BR_MSEL)] = "SDRAM", 179 [__SHIFTOUT(BR_MSEL_UPMA,BR_MSEL)] = "UPMA", 180 [__SHIFTOUT(BR_MSEL_UPMB,BR_MSEL)] = "UPMB", 181 [__SHIFTOUT(BR_MSEL_UPMC,BR_MSEL)] = "UPMC", 182 }; 183 184 static void 185 pq3obio_attach(device_t parent, device_t self, void *aux) 186 { 187 struct cpunode_softc * const psc = device_private(parent); 188 struct pq3obio_softc * const sc = device_private(self); 189 struct cpunode_attach_args * const cna = aux; 190 struct cpunode_locators * const cnl = &cna->cna_locs; 191 struct powerpc_bus_space * const t = &sc->sc_obio_bst; 192 u_int found = 0; 193 int error; 194 195 psc->sc_children |= cna->cna_childmask; 196 sc->sc_dev = self; 197 sc->sc_bst = cna->cna_memt; 198 199 error = bus_space_map(sc->sc_bst, cnl->cnl_addr, cnl->cnl_size, 0, 200 &sc->sc_bsh); 201 if (error) { 202 aprint_error("failed to map registers: %d\n", error); 203 return; 204 } 205 206 for (u_int i = 0; i < 8; i++) { 207 struct pq3lbc_softc * const lbc = &sc->sc_lbcs[i]; 208 uint32_t br = bus_space_read_4(sc->sc_bst, sc->sc_bsh, BRn(i)); 209 if (br & BR_V) { 210 found++; 211 lbc->lbc_br = br; 212 lbc->lbc_or = bus_space_read_4(sc->sc_bst, 213 sc->sc_bsh, ORn(i)); 214 lbc->lbc_base = lbc->lbc_br & BR_BA & lbc->lbc_or; 215 lbc->lbc_limit = lbc->lbc_base + ~(lbc->lbc_or & OR_AM); 216 } 217 } 218 219 aprint_normal(": %u of 8 ports enabled\n", found); 220 if (found == 0) 221 return; 222 223 t->pbs_base = 0xffffffff; 224 t->pbs_limit = 0; 225 t->pbs_flags = _BUS_SPACE_BIG_ENDIAN; 226 227 u_int sorted[found]; 228 u_int nsorted = 0; 229 230 for (u_int i = 0; i < 8; i++) { 231 struct pq3lbc_softc * const lbc = &sc->sc_lbcs[i]; 232 if ((lbc->lbc_br & BR_V) == 0) 233 continue; 234 235 u_int j; 236 for (j = 0; j < nsorted; j++) { 237 if (lbc->lbc_base < sc->sc_lbcs[sorted[j]].lbc_base) 238 break; 239 } 240 for (u_int k = ++nsorted; k > j; k--) { 241 sorted[k] = sorted[k - 1]; 242 } 243 sorted[j] = i; 244 245 if (lbc->lbc_base < t->pbs_base) 246 t->pbs_base = lbc->lbc_base; 247 if (lbc->lbc_limit > t->pbs_limit) 248 t->pbs_limit = lbc->lbc_limit; 249 #if 0 250 aprint_normal_dev(sc->sc_dev, 251 "cs%u: br=%#x or=%#x", i, lbc->lbc_br, lbc->lbc_or); 252 #endif 253 u_int n = ffs(~(lbc->lbc_or & OR_AM) + 1) - 1; 254 aprint_normal_dev(sc->sc_dev, 255 "cs%u: %u%cB %u-bit %s region at %#x\n", 256 i, 257 1 << (n % 10), " KMGTPE"[n / 10], 258 1 << (__SHIFTOUT(lbc->lbc_br, BR_PS) + 2), 259 br_msel_strings[__SHIFTOUT(lbc->lbc_br,BR_MSEL)], 260 lbc->lbc_base); 261 } 262 263 error = bus_space_init(t, device_xname(sc->sc_dev), NULL, 0); 264 if (error) { 265 aprint_error_dev(sc->sc_dev, 266 "failed to initialize obio bus space: %d\n", error); 267 return; 268 } 269 270 /* 271 * We've created a bus space which covers all the chip selects 272 * but there might be gaps inbetween them. We need to make sure 273 * bus_space_map will fail for those. To do that, we reserve 274 * the gaps between the chip-selects. 275 */ 276 for (u_int i = 1; i < found; i++) { 277 struct pq3lbc_softc * const lbc_lo = &sc->sc_lbcs[sorted[i-1]]; 278 struct pq3lbc_softc * const lbc_hi = &sc->sc_lbcs[sorted[i]]; 279 if (lbc_lo->lbc_limit + 1 == lbc_hi->lbc_base) 280 continue; 281 error = extent_alloc_region(t->pbs_extent, 282 lbc_lo->lbc_limit + 1, 283 lbc_hi->lbc_base - (lbc_lo->lbc_limit + 1), 0); 284 if (error) { 285 aprint_error_dev(sc->sc_dev, 286 "failed to reserve %#x..%#x: %d\n", 287 lbc_lo->lbc_limit + 1, 288 lbc_hi->lbc_base - 1, 289 error); 290 return; 291 } 292 } 293 294 /* 295 * Now we can do the device configuration to find what might 296 * be using obio. 297 */ 298 int locs[OBIOCF_NLOCS]; 299 locs[OBIOCF_ADDR] = OBIOCF_ADDR_DEFAULT; 300 locs[OBIOCF_SIZE] = OBIOCF_SIZE_DEFAULT; 301 locs[OBIOCF_CS] = OBIOCF_CS_DEFAULT; 302 config_search_loc(pq3obio_search, self, "obio", locs, NULL); 303 } 304
Indexes created Sun Sep 28 07:09:56 GMT 2025