pq3sdhc.c revision 1.5 1 1.5 matt /* $NetBSD: pq3sdhc.c,v 1.5 2012/07/26 18:38:10 matt Exp $ */
2 1.2 matt /*-
3 1.2 matt * Copyright (c) 2011 The NetBSD Foundation, Inc.
4 1.2 matt * All rights reserved.
5 1.2 matt *
6 1.2 matt * This code is derived from software contributed to The NetBSD Foundation
7 1.2 matt * by Matt Thomas of 3am Software Foundry.
8 1.2 matt *
9 1.2 matt * Redistribution and use in source and binary forms, with or without
10 1.2 matt * modification, are permitted provided that the following conditions
11 1.2 matt * are met:
12 1.2 matt * 1. Redistributions of source code must retain the above copyright
13 1.2 matt * notice, this list of conditions and the following disclaimer.
14 1.2 matt * 2. Redistributions in binary form must reproduce the above copyright
15 1.2 matt * notice, this list of conditions and the following disclaimer in the
16 1.2 matt * documentation and/or other materials provided with the distribution.
17 1.2 matt *
18 1.2 matt * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
19 1.2 matt * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
20 1.2 matt * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
21 1.2 matt * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
22 1.2 matt * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 1.2 matt * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 1.2 matt * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 1.2 matt * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 1.2 matt * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 1.2 matt * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 1.2 matt * POSSIBILITY OF SUCH DAMAGE.
29 1.2 matt */
30 1.2 matt
31 1.5 matt #define ESDHC_PRIVATE
32 1.5 matt
33 1.2 matt #include <sys/cdefs.h>
34 1.5 matt __KERNEL_RCSID(0, "$NetBSD: pq3sdhc.c,v 1.5 2012/07/26 18:38:10 matt Exp $");
35 1.2 matt
36 1.2 matt #include <sys/param.h>
37 1.2 matt #include <sys/systm.h>
38 1.2 matt #include <sys/device.h>
39 1.2 matt #include <sys/kernel.h>
40 1.2 matt #include <sys/proc.h>
41 1.2 matt #include <sys/queue.h>
42 1.2 matt
43 1.2 matt #include <sys/bus.h>
44 1.2 matt
45 1.2 matt #include <powerpc/booke/cpuvar.h>
46 1.2 matt #include <powerpc/booke/e500var.h>
47 1.2 matt #include <powerpc/booke/e500reg.h>
48 1.2 matt
49 1.2 matt #include <dev/sdmmc/sdhcreg.h>
50 1.2 matt #include <dev/sdmmc/sdhcvar.h>
51 1.2 matt
52 1.3 matt #define EDSHC_HOST_CTL_RES 0x05
53 1.3 matt
54 1.2 matt static int pq3sdhc_match(device_t, cfdata_t, void *);
55 1.2 matt static void pq3sdhc_attach(device_t, device_t, void *);
56 1.2 matt
57 1.2 matt struct pq3sdhc_softc {
58 1.2 matt struct sdhc_softc sc;
59 1.2 matt bus_space_tag_t sc_bst;
60 1.2 matt bus_space_handle_t sc_bsh;
61 1.2 matt struct sdhc_host *sc_hosts[1];
62 1.2 matt void *sc_ih; /* interrupt vectoring */
63 1.2 matt };
64 1.2 matt
65 1.2 matt CFATTACH_DECL_NEW(pq3sdhc, sizeof(struct pq3sdhc_softc),
66 1.2 matt pq3sdhc_match, pq3sdhc_attach, NULL, NULL);
67 1.2 matt
68 1.2 matt static int
69 1.2 matt pq3sdhc_match(device_t parent, cfdata_t cf, void *aux)
70 1.2 matt {
71 1.2 matt
72 1.2 matt if (!e500_cpunode_submatch(parent, cf, cf->cf_name, aux))
73 1.2 matt return 0;
74 1.2 matt
75 1.2 matt return 1;
76 1.2 matt }
77 1.2 matt
78 1.2 matt static void
79 1.2 matt pq3sdhc_attach(device_t parent, device_t self, void *aux)
80 1.2 matt {
81 1.2 matt struct cpunode_softc * const psc = device_private(parent);
82 1.2 matt struct pq3sdhc_softc * const sc = device_private(self);
83 1.2 matt struct cpunode_attach_args * const cna = aux;
84 1.2 matt struct cpunode_locators * const cnl = &cna->cna_locs;
85 1.2 matt int error;
86 1.2 matt
87 1.2 matt psc->sc_children |= cna->cna_childmask;
88 1.2 matt sc->sc.sc_dmat = cna->cna_dmat;
89 1.2 matt sc->sc.sc_dev = self;
90 1.5 matt //sc->sc.sc_flags |= SDHC_FLAG_USE_DMA;
91 1.4 matt sc->sc.sc_flags |=
92 1.4 matt SDHC_FLAG_HAVE_DVS | SDHC_FLAG_32BIT_ACCESS | SDHC_FLAG_ENHANCED;
93 1.2 matt sc->sc.sc_host = sc->sc_hosts;
94 1.3 matt sc->sc.sc_clkbase = board_info_get_number("bus-frequency") / 2000;
95 1.2 matt sc->sc_bst = cna->cna_memt;
96 1.2 matt
97 1.2 matt error = bus_space_map(sc->sc_bst, cnl->cnl_addr, cnl->cnl_size, 0,
98 1.2 matt &sc->sc_bsh);
99 1.2 matt if (error) {
100 1.2 matt aprint_error_dev(self,
101 1.2 matt "can't map registers for %s: %d\n", cnl->cnl_name, error);
102 1.2 matt return;
103 1.2 matt }
104 1.2 matt
105 1.5 matt /*
106 1.5 matt * If using DMA, enable SNOOPing.
107 1.5 matt */
108 1.5 matt if (sc->sc.sc_flags & SDHC_FLAG_USE_DMA) {
109 1.5 matt uint32_t dcr = bus_space_read_4(sc->sc_bst, sc->sc_bsh, DCR);
110 1.5 matt dcr |= DCR_SNOOP | DCR_RD_SAFE | DCR_RD_PFE;
111 1.5 matt bus_space_write_4(sc->sc_bst, sc->sc_bsh, DCR, dcr);
112 1.5 matt }
113 1.5 matt
114 1.2 matt aprint_naive(": SDHC controller\n");
115 1.5 matt aprint_normal(": SDHC controller%s\n",
116 1.5 matt (sc->sc.sc_flags & SDHC_FLAG_USE_DMA) ? " (DMA enabled)" : "");
117 1.2 matt
118 1.2 matt sc->sc_ih = intr_establish(cnl->cnl_intrs[0], IPL_VM, IST_ONCHIP,
119 1.2 matt sdhc_intr, &sc->sc);
120 1.2 matt if (sc->sc_ih == NULL) {
121 1.2 matt aprint_error_dev(self, "failed to establish interrupt %d\n",
122 1.2 matt cnl->cnl_intrs[0]);
123 1.2 matt goto fail;
124 1.2 matt }
125 1.2 matt aprint_normal_dev(self, "interrupting on irq %d\n",
126 1.2 matt cnl->cnl_intrs[0]);
127 1.2 matt
128 1.4 matt error = sdhc_host_found(&sc->sc, sc->sc_bst, sc->sc_bsh,
129 1.3 matt cnl->cnl_size);
130 1.2 matt if (error != 0) {
131 1.2 matt aprint_error_dev(self, "couldn't initialize host, error=%d\n",
132 1.2 matt error);
133 1.2 matt goto fail;
134 1.2 matt }
135 1.2 matt return;
136 1.2 matt
137 1.2 matt fail:
138 1.2 matt if (sc->sc_ih) {
139 1.2 matt intr_disestablish(sc->sc_ih);
140 1.2 matt sc->sc_ih = NULL;
141 1.2 matt }
142 1.2 matt bus_space_unmap(sc->sc_bst, sc->sc_bsh, cnl->cnl_size);
143 1.2 matt }
144