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      1 /*	$NetBSD: fpu_subr.c,v 1.9 2022/09/06 23:02:36 rin Exp $ */
      2 
      3 /*
      4  * Copyright (c) 1992, 1993
      5  *	The Regents of the University of California.  All rights reserved.
      6  *
      7  * This software was developed by the Computer Systems Engineering group
      8  * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
      9  * contributed to Berkeley.
     10  *
     11  * All advertising materials mentioning features or use of this software
     12  * must display the following acknowledgement:
     13  *	This product includes software developed by the University of
     14  *	California, Lawrence Berkeley Laboratory.
     15  *
     16  * Redistribution and use in source and binary forms, with or without
     17  * modification, are permitted provided that the following conditions
     18  * are met:
     19  * 1. Redistributions of source code must retain the above copyright
     20  *    notice, this list of conditions and the following disclaimer.
     21  * 2. Redistributions in binary form must reproduce the above copyright
     22  *    notice, this list of conditions and the following disclaimer in the
     23  *    documentation and/or other materials provided with the distribution.
     24  * 3. Neither the name of the University nor the names of its contributors
     25  *    may be used to endorse or promote products derived from this software
     26  *    without specific prior written permission.
     27  *
     28  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     29  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     30  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     31  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     32  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     33  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     34  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     35  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     36  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     37  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     38  * SUCH DAMAGE.
     39  *
     40  *	@(#)fpu_subr.c	8.1 (Berkeley) 6/11/93
     41  */
     42 
     43 /*
     44  * FPU subroutines.
     45  */
     46 
     47 #include <sys/cdefs.h>
     48 __KERNEL_RCSID(0, "$NetBSD: fpu_subr.c,v 1.9 2022/09/06 23:02:36 rin Exp $");
     49 
     50 #include <sys/types.h>
     51 #include <sys/systm.h>
     52 
     53 #include <powerpc/instr.h>
     54 #include <machine/fpu.h>
     55 #include <machine/reg.h>
     56 
     57 #include <powerpc/fpu/fpu_arith.h>
     58 #include <powerpc/fpu/fpu_emu.h>
     59 #include <powerpc/fpu/fpu_extern.h>
     60 
     61 /*
     62  * Shift the given number right rsh bits.  Any bits that `fall off' will get
     63  * shoved into the sticky field; we return the resulting sticky.  Note that
     64  * shifting NaNs is legal (this will never shift all bits out); a NaN's
     65  * sticky field is ignored anyway.
     66  */
     67 int
     68 fpu_shr(struct fpn *fp, int rsh)
     69 {
     70 	u_int m0, m1, m2, m3, s;
     71 	int lsh;
     72 
     73 	KASSERTMSG(rsh > 0 && (fp->fp_class == FPC_NUM || ISNAN(fp)),
     74 	    "rsh %d, class %d\n", rsh, fp->fp_class);
     75 
     76 	m0 = fp->fp_mant[0];
     77 	m1 = fp->fp_mant[1];
     78 	m2 = fp->fp_mant[2];
     79 	m3 = fp->fp_mant[3];
     80 
     81 	/* If shifting all the bits out, take a shortcut. */
     82 	if (rsh >= FP_NMANT) {
     83 		KASSERT((m0 | m1 | m2 | m3) != 0);
     84 		fp->fp_mant[0] = 0;
     85 		fp->fp_mant[1] = 0;
     86 		fp->fp_mant[2] = 0;
     87 		fp->fp_mant[3] = 0;
     88 #ifdef notdef
     89 		if ((m0 | m1 | m2 | m3) == 0)
     90 			fp->fp_class = FPC_ZERO;
     91 		else
     92 #endif
     93 			fp->fp_sticky = 1;
     94 		return (1);
     95 	}
     96 
     97 	/* Squish out full words. */
     98 	s = fp->fp_sticky;
     99 	if (rsh >= 32 * 3) {
    100 		s |= m3 | m2 | m1;
    101 		m3 = m0, m2 = 0, m1 = 0, m0 = 0;
    102 	} else if (rsh >= 32 * 2) {
    103 		s |= m3 | m2;
    104 		m3 = m1, m2 = m0, m1 = 0, m0 = 0;
    105 	} else if (rsh >= 32) {
    106 		s |= m3;
    107 		m3 = m2, m2 = m1, m1 = m0, m0 = 0;
    108 	}
    109 
    110 	/* Handle any remaining partial word. */
    111 	if ((rsh &= 31) != 0) {
    112 		lsh = 32 - rsh;
    113 		s |= m3 << lsh;
    114 		m3 = (m3 >> rsh) | (m2 << lsh);
    115 		m2 = (m2 >> rsh) | (m1 << lsh);
    116 		m1 = (m1 >> rsh) | (m0 << lsh);
    117 		m0 >>= rsh;
    118 	}
    119 	fp->fp_mant[0] = m0;
    120 	fp->fp_mant[1] = m1;
    121 	fp->fp_mant[2] = m2;
    122 	fp->fp_mant[3] = m3;
    123 	fp->fp_sticky = s;
    124 	return (s);
    125 }
    126 
    127 /*
    128  * Force a number to be normal, i.e., make its fraction have all zero
    129  * bits before FP_1, then FP_1, then all 1 bits.  This is used for denorms
    130  * and (sometimes) for intermediate results.
    131  *
    132  * Internally, this may use a `supernormal' -- a number whose fp_mant
    133  * is greater than or equal to 2.0 -- so as a side effect you can hand it
    134  * a supernormal and it will fix it (provided fp->fp_mant[3] == 0).
    135  */
    136 void
    137 fpu_norm(struct fpn *fp)
    138 {
    139 	u_int m0, m1, m2, m3, top, sup, nrm;
    140 	int lsh, rsh, exp;
    141 
    142 	exp = fp->fp_exp;
    143 	m0 = fp->fp_mant[0];
    144 	m1 = fp->fp_mant[1];
    145 	m2 = fp->fp_mant[2];
    146 	m3 = fp->fp_mant[3];
    147 
    148 	/* Handle severe subnormals with 32-bit moves. */
    149 	if (m0 == 0) {
    150 		if (m1)
    151 			m0 = m1, m1 = m2, m2 = m3, m3 = 0, exp -= 32;
    152 		else if (m2)
    153 			m0 = m2, m1 = m3, m2 = 0, m3 = 0, exp -= 2 * 32;
    154 		else if (m3)
    155 			m0 = m3, m1 = 0, m2 = 0, m3 = 0, exp -= 3 * 32;
    156 		else {
    157 			fp->fp_class = FPC_ZERO;
    158 			return;
    159 		}
    160 	}
    161 
    162 	/* Now fix any supernormal or remaining subnormal. */
    163 	nrm = FP_1;
    164 	sup = nrm << 1;
    165 	if (m0 >= sup) {
    166 		/*
    167 		 * We have a supernormal number.  We need to shift it right.
    168 		 * We may assume m3==0.
    169 		 */
    170 		for (rsh = 1, top = m0 >> 1; top >= sup; rsh++)	/* XXX slow */
    171 			top >>= 1;
    172 		exp += rsh;
    173 		lsh = 32 - rsh;
    174 		m3 = m2 << lsh;
    175 		m2 = (m2 >> rsh) | (m1 << lsh);
    176 		m1 = (m1 >> rsh) | (m0 << lsh);
    177 		m0 = top;
    178 	} else if (m0 < nrm) {
    179 		/*
    180 		 * We have a regular denorm (a subnormal number), and need
    181 		 * to shift it left.
    182 		 */
    183 		for (lsh = 1, top = m0 << 1; top < nrm; lsh++)	/* XXX slow */
    184 			top <<= 1;
    185 		exp -= lsh;
    186 		rsh = 32 - lsh;
    187 		m0 = top | (m1 >> rsh);
    188 		m1 = (m1 << lsh) | (m2 >> rsh);
    189 		m2 = (m2 << lsh) | (m3 >> rsh);
    190 		m3 <<= lsh;
    191 	}
    192 
    193 	fp->fp_exp = exp;
    194 	fp->fp_mant[0] = m0;
    195 	fp->fp_mant[1] = m1;
    196 	fp->fp_mant[2] = m2;
    197 	fp->fp_mant[3] = m3;
    198 }
    199 
    200 /*
    201  * Concoct a `fresh' Quiet NaN per Appendix N.
    202  * As a side effect, we set NV (invalid) for the current exceptions.
    203  */
    204 struct fpn *
    205 fpu_newnan(struct fpemu *fe)
    206 {
    207 	struct fpn *fp;
    208 
    209 	fp = &fe->fe_f3;
    210 	fp->fp_class = FPC_QNAN;
    211 	fp->fp_sign = 0;
    212 	fp->fp_mant[0] = FP_QUIETBIT;
    213 	fp->fp_mant[1] = fp->fp_mant[2] = fp->fp_mant[3] = 0;
    214 	DUMPFPN(FPE_REG, fp);
    215 	return (fp);
    216 }
    217