4xx_trap_subr.S revision 1.3.2.3
1 1.3.2.3 skrll /* $NetBSD: 4xx_trap_subr.S,v 1.3.2.3 2004/09/21 13:20:34 skrll Exp $ */ 2 1.1 simonb 3 1.1 simonb /* 4 1.1 simonb * Copyright 2001 Wasabi Systems, Inc. 5 1.1 simonb * All rights reserved. 6 1.1 simonb * 7 1.1 simonb * Written by Eduardo Horvath and Simon Burge for Wasabi Systems, Inc. 8 1.1 simonb * 9 1.1 simonb * Redistribution and use in source and binary forms, with or without 10 1.1 simonb * modification, are permitted provided that the following conditions 11 1.1 simonb * are met: 12 1.1 simonb * 1. Redistributions of source code must retain the above copyright 13 1.1 simonb * notice, this list of conditions and the following disclaimer. 14 1.1 simonb * 2. Redistributions in binary form must reproduce the above copyright 15 1.1 simonb * notice, this list of conditions and the following disclaimer in the 16 1.1 simonb * documentation and/or other materials provided with the distribution. 17 1.1 simonb * 3. All advertising materials mentioning features or use of this software 18 1.1 simonb * must display the following acknowledgement: 19 1.1 simonb * This product includes software developed for the NetBSD Project by 20 1.1 simonb * Wasabi Systems, Inc. 21 1.1 simonb * 4. The name of Wasabi Systems, Inc. may not be used to endorse 22 1.1 simonb * or promote products derived from this software without specific prior 23 1.1 simonb * written permission. 24 1.1 simonb * 25 1.1 simonb * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 26 1.1 simonb * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 27 1.1 simonb * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 28 1.1 simonb * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 29 1.1 simonb * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 30 1.1 simonb * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 31 1.1 simonb * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 32 1.1 simonb * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 33 1.1 simonb * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 34 1.1 simonb * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 35 1.1 simonb * POSSIBILITY OF SUCH DAMAGE. 36 1.1 simonb */ 37 1.1 simonb 38 1.2 simonb /* This file provides necessary handlers for 405GP CPU 39 1.1 simonb * It should be included in locore.S after powerpc/powerpc/trap_subr.S 40 1.1 simonb */ 41 1.1 simonb 42 1.1 simonb .text 43 1.1 simonb .globl _C_LABEL(pitfitwdog),_C_LABEL(pitfitwdogsize) 44 1.1 simonb 45 1.1 simonb .align 4 46 1.1 simonb _C_LABEL(pitfitwdog): 47 1.1 simonb sync 48 1.1 simonb ba pitint 49 1.1 simonb .align 4 50 1.1 simonb sync 51 1.1 simonb ba fitint 52 1.1 simonb .align 4 53 1.1 simonb sync 54 1.1 simonb ba wdoghandler 55 1.1 simonb _C_LABEL(pitfitwdogsize) = .-_C_LABEL(pitfitwdog) 56 1.1 simonb 57 1.1 simonb pithandler: 58 1.1 simonb rfi 59 1.1 simonb ba . /* Protect against prefetch */ 60 1.2 simonb 61 1.1 simonb wdoghandler: 62 1.1 simonb rfi 63 1.1 simonb ba . /* Protect against prefetch */ 64 1.1 simonb 65 1.1 simonb #define tlbstacksize 0x1000 66 1.1 simonb #define tlbsave 0x3000 67 1.1 simonb #define tlbstack tlbsave+tlbstacksize 68 1.1 simonb 69 1.2 simonb /* If an unaligned excception (0x600) and DTLB miss exception (0x1100) 70 1.2 simonb occur at the same time, the interrupt vector offsets of the two 71 1.1 simonb exceptions are logically OR'ed together to produce 0x1700. 72 1.1 simonb See PPC405GP Rev D/E Errata item 51 */ 73 1.2 simonb 74 1.1 simonb .globl _C_LABEL(errata51handler),_C_LABEL(errata51size) 75 1.1 simonb _C_LABEL(errata51handler): 76 1.1 simonb ba 0x1100 77 1.2 simonb _C_LABEL(errata51size) = .-_C_LABEL(errata51handler) 78 1.1 simonb 79 1.1 simonb .globl _C_LABEL(tlbdmiss4xx),_C_LABEL(tlbdm4size) 80 1.1 simonb _C_LABEL(tlbdmiss4xx): 81 1.1 simonb STANDARD_PROLOG(tlbsave) 82 1.3.2.1 skrll mfdear %r30 /* Get fault address */ 83 1.3.2.1 skrll mfesr %r31 84 1.3.2.1 skrll stmw %r30,16+tlbsave(0) 85 1.1 simonb bla s4xx_miss 86 1.2 simonb _C_LABEL(tlbdm4size) = .-_C_LABEL(tlbdmiss4xx) 87 1.1 simonb 88 1.1 simonb .globl _C_LABEL(tlbimiss4xx),_C_LABEL(tlbim4size) 89 1.2 simonb _C_LABEL(tlbimiss4xx): 90 1.1 simonb STANDARD_PROLOG(tlbsave) 91 1.3.2.1 skrll mfsrr0 %r30 /* XXX Get fault address */ 92 1.3.2.1 skrll mfesr %r31 93 1.3.2.1 skrll stmw %r30,16+tlbsave(0) 94 1.1 simonb bla s4xx_miss 95 1.3 hannken _C_LABEL(tlbim4size) = .-_C_LABEL(tlbimiss4xx) 96 1.1 simonb 97 1.1 simonb s4xx_miss: 98 1.1 simonb .globl _C_LABEL(pmap_tlbmiss) 99 1.1 simonb 100 1.1 simonb /* If the kernel stack would fault, don't use it. */ 101 1.3.2.1 skrll mfpid %r30 102 1.3.2.1 skrll li %r31,KERNEL_PID 103 1.3.2.1 skrll mtpid %r31 104 1.3.2.1 skrll li %r31,-FRAMELEN 105 1.3.2.1 skrll tlbsx. %r31,%r31,%r1 106 1.3.2.1 skrll mtpid %r30 107 1.1 simonb beq 1f 108 1.1 simonb 109 1.2 simonb /* 110 1.1 simonb * The kernel we want to switch to is not in the TLB. 111 1.1 simonb * To solve this problem, we will simulate a kernel 112 1.1 simonb * fault on the kernel stack and let the miss handler 113 1.1 simonb * bring it in, and return from the trap handler. The 114 1.1 simonb * processor will immediately take the original fault, 115 1.1 simonb * which we should be able to handle with the now-valid 116 1.1 simonb * kernel stack. 117 1.1 simonb */ 118 1.1 simonb 119 1.1 simonb /* Switch to tlbstack */ 120 1.3.2.1 skrll addi %r30,%r1,-FRAMELEN 121 1.3.2.1 skrll lis %r1,tlbstack@ha 122 1.3.2.1 skrll addi %r1,%r1,tlbstack@l 123 1.3.2.1 skrll stw %r30,4(1) 124 1.2 simonb 125 1.1 simonb FRAME_SETUP(tlbsave) 126 1.1 simonb 127 1.1 simonb /* Take an explicit fault at (kernelstack,pid) */ 128 1.3.2.1 skrll lwz %r3, tlbstack+4(0) 129 1.3.2.1 skrll li %r4,KERNEL_PID 130 1.1 simonb bl _C_LABEL(pmap_tlbmiss) 131 1.2 simonb /* 132 1.1 simonb * We can retry the old fault or switch stacks and 133 1.1 simonb * take it now. It's easier to retry. 134 1.1 simonb */ 135 1.3.2.1 skrll mr. %r3,%r3 136 1.1 simonb beq 2f 137 1.1 simonb 138 1.1 simonb /* kernel stack not in the pmap? we should panic */ 139 1.1 simonb trap 140 1.1 simonb ba trapagain 141 1.2 simonb 1: 142 1.1 simonb FRAME_SETUP(tlbsave) 143 1.3.2.1 skrll lwz %r3,FRAME_DEAR+8(1) 144 1.3.2.1 skrll lwz %r4,FRAME_PID+8(1) 145 1.1 simonb bl _C_LABEL(pmap_tlbmiss) 146 1.3.2.1 skrll mr. %r3,%r3 147 1.1 simonb beq 2f 148 1.1 simonb 149 1.1 simonb /* XXX DEBUG -- make sure we're not on tlbstack */ 150 1.3.2.1 skrll addi %r7,%r1,-tlbsave 151 1.3.2.1 skrll twllei %r7,(tlbstacksize) 152 1.2 simonb 153 1.2 simonb /* PTE not found, time to cause a fault */ 154 1.1 simonb ba trapagain 155 1.2 simonb 2: 156 1.1 simonb FRAME_LEAVE(tlbsave) 157 1.1 simonb rfi 158 1.1 simonb ba . /* Protect against prefetch */ 159
Indexes created Wed Oct 01 15:09:59 GMT 2025