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4xx_trap_subr.S revision 1.2 
      1 /*	$NetBSD: 4xx_trap_subr.S,v 1.2 2002/07/11 01:38:48 simonb Exp $	*/
      2 
      3 /*
      4  * Copyright 2001 Wasabi Systems, Inc.
      5  * All rights reserved.
      6  *
      7  * Written by Eduardo Horvath and Simon Burge for Wasabi Systems, Inc.
      8  *
      9  * Redistribution and use in source and binary forms, with or without
     10  * modification, are permitted provided that the following conditions
     11  * are met:
     12  * 1. Redistributions of source code must retain the above copyright
     13  *    notice, this list of conditions and the following disclaimer.
     14  * 2. Redistributions in binary form must reproduce the above copyright
     15  *    notice, this list of conditions and the following disclaimer in the
     16  *    documentation and/or other materials provided with the distribution.
     17  * 3. All advertising materials mentioning features or use of this software
     18  *    must display the following acknowledgement:
     19  *      This product includes software developed for the NetBSD Project by
     20  *      Wasabi Systems, Inc.
     21  * 4. The name of Wasabi Systems, Inc. may not be used to endorse
     22  *    or promote products derived from this software without specific prior
     23  *    written permission.
     24  *
     25  * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
     26  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     27  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     28  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
     29  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     30  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     31  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     32  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     33  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     34  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     35  * POSSIBILITY OF SUCH DAMAGE.
     36  */
     37 
     38 /* This file provides necessary handlers for 405GP CPU
     39  * It should be included in locore.S after powerpc/powerpc/trap_subr.S
     40  */
     41 
     42 	.text
     43 	.globl	_C_LABEL(pitfitwdog),_C_LABEL(pitfitwdogsize)
     44 
     45 	.align 4
     46 _C_LABEL(pitfitwdog):
     47 	sync
     48 	ba	pitint
     49 	.align 4
     50 	sync
     51 	ba	fitint
     52 	.align 4
     53 	sync
     54 	ba	wdoghandler
     55 _C_LABEL(pitfitwdogsize) = .-_C_LABEL(pitfitwdog)
     56 
     57 pithandler:
     58 	rfi
     59 	ba	.	/* Protect against prefetch */
     60 
     61 wdoghandler:
     62 	rfi
     63 	ba	.	/* Protect against prefetch */
     64 
     65 #define	tlbstacksize	0x1000
     66 #define	tlbsave		0x3000
     67 #define tlbstack	tlbsave+tlbstacksize
     68 
     69 /* If an unaligned excception (0x600) and DTLB miss exception (0x1100)
     70    occur at the same time, the interrupt vector offsets of the two
     71    exceptions are logically OR'ed together to produce 0x1700.
     72    See PPC405GP Rev D/E Errata item 51 */
     73 
     74 	.globl _C_LABEL(errata51handler),_C_LABEL(errata51size)
     75 _C_LABEL(errata51handler):
     76 	ba	0x1100
     77 _C_LABEL(errata51size) = .-_C_LABEL(errata51handler)
     78 
     79 	.globl _C_LABEL(tlbdmiss4xx),_C_LABEL(tlbdm4size)
     80 _C_LABEL(tlbdmiss4xx):
     81 	STANDARD_PROLOG(tlbsave)
     82 	mfdear	r30		/* Get fault address */
     83 	mfesr	r31
     84 	stmw	r30,16+tlbsave(0)
     85 	bla	s4xx_miss
     86 _C_LABEL(tlbdm4size) = .-_C_LABEL(tlbdmiss4xx)
     87 
     88 	.globl _C_LABEL(tlbimiss4xx),_C_LABEL(tlbim4size)
     89 _C_LABEL(tlbimiss4xx):
     90 	STANDARD_PROLOG(tlbsave)
     91 	mfsrr0	r30		/* XXX Get fault address */
     92 	mfesr	r31
     93 	stmw	r30,16+tlbsave(0)
     94 	bla	s4xx_miss
     95 _C_LABEL(tlbim4size) = .-_C_LABEL(tlbdmiss4xx)
     96 
     97 s4xx_miss:
     98 	.globl	_C_LABEL(pmap_tlbmiss)
     99 
    100 	/* If the kernel stack would fault, don't use it. */
    101 	mfpid	r30
    102 	li	r31,KERNEL_PID
    103 	mtpid	r31
    104 	li	r31,-FRAMELEN
    105 	tlbsx.	r31,r31,r1
    106 	mtpid	r30
    107 	beq	1f
    108 
    109 	/*
    110 	 * The kernel we want to switch to is not in the TLB.
    111 	 * To solve this problem, we will simulate a kernel
    112 	 * fault on the kernel stack and let the miss handler
    113 	 * bring it in, and return from the trap handler.  The
    114 	 * processor will immediately take the original fault,
    115 	 * which we should be able to handle with the now-valid
    116 	 * kernel stack.
    117 	 */
    118 
    119 	/* Switch to tlbstack */
    120 	addi	r30,r1,-FRAMELEN
    121 	lis	r1,tlbstack@ha
    122 	addi	r1,r1,tlbstack@l
    123 	stw	r30,4(1)
    124 
    125 	FRAME_SETUP(tlbsave)
    126 
    127 	/* Take an explicit fault at (kernelstack,pid) */
    128 	lwz	r3, tlbstack+4(0)
    129 	li	r4,KERNEL_PID
    130 	bl	_C_LABEL(pmap_tlbmiss)
    131 	/*
    132 	 * We can retry the old fault or switch stacks and
    133 	 * take it now.  It's easier to retry.
    134 	 */
    135 	mr.	r3,r3
    136 	beq	2f
    137 
    138 	/* kernel stack not in the pmap? we should panic */
    139 	trap
    140 	ba	trapagain
    141 1:
    142 	FRAME_SETUP(tlbsave)
    143 	lwz	r3,FRAME_DEAR+8(1)
    144 	lwz	r4,FRAME_PID+8(1)
    145 	bl	_C_LABEL(pmap_tlbmiss)
    146 	mr.	r3,r3
    147 	beq	2f
    148 
    149 	/* XXX DEBUG -- make sure we're not on tlbstack */
    150 	addi	r7,r1,-tlbsave
    151 	twllei	r7,(tlbstacksize)
    152 
    153 	/* PTE not found, time to cause a fault */
    154 	ba	trapagain
    155 2:
    156 	FRAME_LEAVE(tlbsave)
    157 	rfi
    158 	ba	.	/* Protect against prefetch */
    159