intr.h revision 1.1.4.2 1 1.1.4.2 rmind /* $NetBSD: intr.h,v 1.1.4.2 2010/05/30 05:17:03 rmind Exp $ */
2 1.1.4.2 rmind
3 1.1.4.2 rmind /*-
4 1.1.4.2 rmind * Copyright (c) 1998, 2007 The NetBSD Foundation, Inc.
5 1.1.4.2 rmind * All rights reserved.
6 1.1.4.2 rmind *
7 1.1.4.2 rmind * This code is derived from software contributed to The NetBSD Foundation
8 1.1.4.2 rmind * by Charles M. Hannum.
9 1.1.4.2 rmind *
10 1.1.4.2 rmind * Redistribution and use in source and binary forms, with or without
11 1.1.4.2 rmind * modification, are permitted provided that the following conditions
12 1.1.4.2 rmind * are met:
13 1.1.4.2 rmind * 1. Redistributions of source code must retain the above copyright
14 1.1.4.2 rmind * notice, this list of conditions and the following disclaimer.
15 1.1.4.2 rmind * 2. Redistributions in binary form must reproduce the above copyright
16 1.1.4.2 rmind * notice, this list of conditions and the following disclaimer in the
17 1.1.4.2 rmind * documentation and/or other materials provided with the distribution.
18 1.1.4.2 rmind *
19 1.1.4.2 rmind * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 1.1.4.2 rmind * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 1.1.4.2 rmind * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 1.1.4.2 rmind * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 1.1.4.2 rmind * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 1.1.4.2 rmind * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 1.1.4.2 rmind * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 1.1.4.2 rmind * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 1.1.4.2 rmind * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 1.1.4.2 rmind * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 1.1.4.2 rmind * POSSIBILITY OF SUCH DAMAGE.
30 1.1.4.2 rmind */
31 1.1.4.2 rmind
32 1.1.4.2 rmind #ifndef _BOOKE_INTR_H_
33 1.1.4.2 rmind #define _BOOKE_INTR_H_
34 1.1.4.2 rmind
35 1.1.4.2 rmind /* Interrupt priority `levels'. */
36 1.1.4.2 rmind #define IPL_NONE 0 /* nothing */
37 1.1.4.2 rmind #define IPL_SOFTCLOCK 1 /* software clock interrupt */
38 1.1.4.2 rmind #define IPL_SOFTBIO 2 /* software block i/o interrupt */
39 1.1.4.2 rmind #define IPL_SOFTNET 3 /* software network interrupt */
40 1.1.4.2 rmind #define IPL_SOFTSERIAL 4 /* software serial interrupt */
41 1.1.4.2 rmind #define IPL_VM 5 /* memory allocation */
42 1.1.4.2 rmind #define IPL_SCHED 6 /* clock */
43 1.1.4.2 rmind #define IPL_HIGH 7 /* everything */
44 1.1.4.2 rmind #define NIPL 8
45 1.1.4.2 rmind
46 1.1.4.2 rmind /* Interrupt sharing types. */
47 1.1.4.2 rmind #define IST_NONE 0 /* none */
48 1.1.4.2 rmind #define IST_EDGE 1 /* edge-triggered */
49 1.1.4.2 rmind #define IST_LEVEL 2 /* level-triggered active-low */
50 1.1.4.2 rmind #define IST_LEVEL_LOW IST_LEVEL
51 1.1.4.2 rmind #define IST_LEVEL_HIGH 3 /* level-triggered active-high */
52 1.1.4.2 rmind #define IST_MSI 4 /* message signaling interrupt (PCI) */
53 1.1.4.2 rmind #define IST_ONCHIP 5 /* on-chip device */
54 1.1.4.2 rmind #ifdef __INTR_PRIVATE
55 1.1.4.2 rmind #define IST_MSIGROUP 6 /* openpic msi groups */
56 1.1.4.2 rmind #define IST_TIMER 7 /* openpic timers */
57 1.1.4.2 rmind #define IST_IPI 8 /* openpic ipi */
58 1.1.4.2 rmind #define IST_MI 9 /* openpic message */
59 1.1.4.2 rmind #endif
60 1.1.4.2 rmind
61 1.1.4.2 rmind #ifndef _LOCORE
62 1.1.4.2 rmind
63 1.1.4.2 rmind void *intr_establish(int, int, int, int (*)(void *), void *);
64 1.1.4.2 rmind void intr_disestablish(void *);
65 1.1.4.2 rmind int spl0(void);
66 1.1.4.2 rmind int splraise(int);
67 1.1.4.2 rmind void splx(int);
68 1.1.4.2 rmind
69 1.1.4.2 rmind typedef int ipl_t;
70 1.1.4.2 rmind typedef struct {
71 1.1.4.2 rmind ipl_t _ipl;
72 1.1.4.2 rmind } ipl_cookie_t;
73 1.1.4.2 rmind
74 1.1.4.2 rmind #ifdef __INTR_PRIVATE
75 1.1.4.2 rmind #include <sys/lwp.h>
76 1.1.4.2 rmind
77 1.1.4.2 rmind struct intrsw {
78 1.1.4.2 rmind void *(*intrsw_establish)(int, int, int, int (*)(void *), void *);
79 1.1.4.2 rmind void (*intrsw_disestablish)(void *);
80 1.1.4.2 rmind void (*intrsw_cpu_init)(struct cpu_info *);
81 1.1.4.2 rmind void (*intrsw_init)(void);
82 1.1.4.2 rmind void (*intrsw_critintr)(struct trapframe *);
83 1.1.4.2 rmind void (*intrsw_decrintr)(struct trapframe *);
84 1.1.4.2 rmind void (*intrsw_extintr)(struct trapframe *);
85 1.1.4.2 rmind void (*intrsw_fitintr)(struct trapframe *);
86 1.1.4.2 rmind void (*intrsw_wdogintr)(struct trapframe *);
87 1.1.4.2 rmind int (*intrsw_splraise)(int);
88 1.1.4.2 rmind int (*intrsw_spl0)(void);
89 1.1.4.2 rmind void (*intrsw_splx)(int);
90 1.1.4.2 rmind #ifdef __HAVE_FAST_SOFTINTS
91 1.1.4.2 rmind void (*intrsw_softint_init_md)(lwp_t *, u_int, uintptr_t *);
92 1.1.4.2 rmind void (*intrsw_softint_trigger)(uintptr_t);
93 1.1.4.2 rmind #endif
94 1.1.4.2 rmind };
95 1.1.4.2 rmind
96 1.1.4.2 rmind extern struct intrsw powerpc_intrsw;
97 1.1.4.2 rmind #endif /* __INTR_PRIVATE */
98 1.1.4.2 rmind
99 1.1.4.2 rmind static inline int
100 1.1.4.2 rmind splhigh(void)
101 1.1.4.2 rmind {
102 1.1.4.2 rmind
103 1.1.4.2 rmind return splraise(IPL_HIGH);
104 1.1.4.2 rmind }
105 1.1.4.2 rmind
106 1.1.4.2 rmind static inline int
107 1.1.4.2 rmind splsched(void)
108 1.1.4.2 rmind {
109 1.1.4.2 rmind
110 1.1.4.2 rmind return splraise(IPL_SCHED);
111 1.1.4.2 rmind }
112 1.1.4.2 rmind
113 1.1.4.2 rmind static inline int
114 1.1.4.2 rmind splvm(void)
115 1.1.4.2 rmind {
116 1.1.4.2 rmind
117 1.1.4.2 rmind return splraise(IPL_VM);
118 1.1.4.2 rmind }
119 1.1.4.2 rmind
120 1.1.4.2 rmind static inline int
121 1.1.4.2 rmind splsoftserial(void)
122 1.1.4.2 rmind {
123 1.1.4.2 rmind
124 1.1.4.2 rmind return splraise(IPL_SOFTSERIAL);
125 1.1.4.2 rmind }
126 1.1.4.2 rmind
127 1.1.4.2 rmind static inline int
128 1.1.4.2 rmind splsoftnet(void)
129 1.1.4.2 rmind {
130 1.1.4.2 rmind
131 1.1.4.2 rmind return splraise(IPL_SOFTNET);
132 1.1.4.2 rmind }
133 1.1.4.2 rmind
134 1.1.4.2 rmind static inline int
135 1.1.4.2 rmind splsoftbio(void)
136 1.1.4.2 rmind {
137 1.1.4.2 rmind
138 1.1.4.2 rmind return splraise(IPL_SOFTBIO);
139 1.1.4.2 rmind }
140 1.1.4.2 rmind
141 1.1.4.2 rmind static inline int
142 1.1.4.2 rmind splsoftclock(void)
143 1.1.4.2 rmind {
144 1.1.4.2 rmind
145 1.1.4.2 rmind return splraise(IPL_SOFTCLOCK);
146 1.1.4.2 rmind }
147 1.1.4.2 rmind
148 1.1.4.2 rmind static inline int
149 1.1.4.2 rmind splraiseipl(ipl_cookie_t icookie)
150 1.1.4.2 rmind {
151 1.1.4.2 rmind
152 1.1.4.2 rmind return splraise(icookie._ipl);
153 1.1.4.2 rmind }
154 1.1.4.2 rmind
155 1.1.4.2 rmind static inline ipl_cookie_t
156 1.1.4.2 rmind makeiplcookie(ipl_t ipl)
157 1.1.4.2 rmind {
158 1.1.4.2 rmind
159 1.1.4.2 rmind return (ipl_cookie_t){._ipl = ipl};
160 1.1.4.2 rmind }
161 1.1.4.2 rmind
162 1.1.4.2 rmind #endif /* !_LOCORE */
163 1.1.4.2 rmind #endif /* !_BOOKE_INTR_H_ */
164