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intr.h revision 1.1.4.2 
      1 /*	$NetBSD: intr.h,v 1.1.4.2 2010/05/30 05:17:03 rmind Exp $	*/
      2 
      3 /*-
      4  * Copyright (c) 1998, 2007 The NetBSD Foundation, Inc.
      5  * All rights reserved.
      6  *
      7  * This code is derived from software contributed to The NetBSD Foundation
      8  * by Charles M. Hannum.
      9  *
     10  * Redistribution and use in source and binary forms, with or without
     11  * modification, are permitted provided that the following conditions
     12  * are met:
     13  * 1. Redistributions of source code must retain the above copyright
     14  *    notice, this list of conditions and the following disclaimer.
     15  * 2. Redistributions in binary form must reproduce the above copyright
     16  *    notice, this list of conditions and the following disclaimer in the
     17  *    documentation and/or other materials provided with the distribution.
     18  *
     19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     29  * POSSIBILITY OF SUCH DAMAGE.
     30  */
     31 
     32 #ifndef _BOOKE_INTR_H_
     33 #define _BOOKE_INTR_H_
     34 
     35 /* Interrupt priority `levels'. */
     36 #define	IPL_NONE	0	/* nothing */
     37 #define	IPL_SOFTCLOCK	1	/* software clock interrupt */
     38 #define	IPL_SOFTBIO	2	/* software block i/o interrupt */
     39 #define	IPL_SOFTNET	3	/* software network interrupt */
     40 #define	IPL_SOFTSERIAL	4	/* software serial interrupt */
     41 #define	IPL_VM		5	/* memory allocation */
     42 #define	IPL_SCHED	6	/* clock */
     43 #define	IPL_HIGH	7	/* everything */
     44 #define	NIPL		8
     45 
     46 /* Interrupt sharing types. */
     47 #define	IST_NONE	0	/* none */
     48 #define	IST_EDGE	1	/* edge-triggered */
     49 #define	IST_LEVEL	2	/* level-triggered active-low */
     50 #define	IST_LEVEL_LOW	IST_LEVEL
     51 #define	IST_LEVEL_HIGH	3	/* level-triggered active-high */
     52 #define	IST_MSI		4	/* message signaling interrupt (PCI) */
     53 #define	IST_ONCHIP	5	/* on-chip device */
     54 #ifdef __INTR_PRIVATE
     55 #define	IST_MSIGROUP	6	/* openpic msi groups */
     56 #define	IST_TIMER	7	/* openpic timers */
     57 #define	IST_IPI		8	/* openpic ipi */
     58 #define	IST_MI		9	/* openpic message */
     59 #endif
     60 
     61 #ifndef _LOCORE
     62 
     63 void 	*intr_establish(int, int, int, int (*)(void *), void *);
     64 void 	intr_disestablish(void *);
     65 int	spl0(void);
     66 int 	splraise(int);
     67 void 	splx(int);
     68 
     69 typedef int ipl_t;
     70 typedef struct {
     71 	ipl_t _ipl;
     72 } ipl_cookie_t;
     73 
     74 #ifdef __INTR_PRIVATE
     75 #include <sys/lwp.h>
     76 
     77 struct intrsw {
     78 	void *(*intrsw_establish)(int, int, int, int (*)(void *), void *);
     79 	void (*intrsw_disestablish)(void *);
     80 	void (*intrsw_cpu_init)(struct cpu_info *);
     81 	void (*intrsw_init)(void);
     82 	void (*intrsw_critintr)(struct trapframe *);
     83 	void (*intrsw_decrintr)(struct trapframe *);
     84 	void (*intrsw_extintr)(struct trapframe *);
     85 	void (*intrsw_fitintr)(struct trapframe *);
     86 	void (*intrsw_wdogintr)(struct trapframe *);
     87 	int (*intrsw_splraise)(int);
     88 	int (*intrsw_spl0)(void);
     89 	void (*intrsw_splx)(int);
     90 #ifdef __HAVE_FAST_SOFTINTS
     91 	void (*intrsw_softint_init_md)(lwp_t *, u_int, uintptr_t *);
     92 	void (*intrsw_softint_trigger)(uintptr_t);
     93 #endif
     94 };
     95 
     96 extern struct intrsw powerpc_intrsw;
     97 #endif /* __INTR_PRIVATE */
     98 
     99 static inline int
    100 splhigh(void)
    101 {
    102 
    103 	return splraise(IPL_HIGH);
    104 }
    105 
    106 static inline int
    107 splsched(void)
    108 {
    109 
    110 	return splraise(IPL_SCHED);
    111 }
    112 
    113 static inline int
    114 splvm(void)
    115 {
    116 
    117 	return splraise(IPL_VM);
    118 }
    119 
    120 static inline int
    121 splsoftserial(void)
    122 {
    123 
    124 	return splraise(IPL_SOFTSERIAL);
    125 }
    126 
    127 static inline int
    128 splsoftnet(void)
    129 {
    130 
    131 	return splraise(IPL_SOFTNET);
    132 }
    133 
    134 static inline int
    135 splsoftbio(void)
    136 {
    137 
    138 	return splraise(IPL_SOFTBIO);
    139 }
    140 
    141 static inline int
    142 splsoftclock(void)
    143 {
    144 
    145 	return splraise(IPL_SOFTCLOCK);
    146 }
    147 
    148 static inline int
    149 splraiseipl(ipl_cookie_t icookie)
    150 {
    151 
    152 	return splraise(icookie._ipl);
    153 }
    154 
    155 static inline ipl_cookie_t
    156 makeiplcookie(ipl_t ipl)
    157 {
    158 
    159 	return (ipl_cookie_t){._ipl = ipl};
    160 }
    161 
    162 #endif /* !_LOCORE */
    163 #endif /* !_BOOKE_INTR_H_ */
    164