intr.h revision 1.2
1 /* $NetBSD: intr.h,v 1.2 2011/01/18 01:02:54 matt Exp $ */ 2 /*- 3 * Copyright (c) 2010, 2011 The NetBSD Foundation, Inc. 4 * All rights reserved. 5 * 6 * This code is derived from software contributed to The NetBSD Foundation 7 * by Raytheon BBN Technologies Corp and Defense Advanced Research Projects 8 * Agency and which was developed by Matt Thomas of 3am Software Foundry. 9 * 10 * This material is based upon work supported by the Defense Advanced Research 11 * Projects Agency and Space and Naval Warfare Systems Center, Pacific, under 12 * Contract No. N66001-09-C-2073. 13 * Approved for Public Release, Distribution Unlimited 14 * 15 * Redistribution and use in source and binary forms, with or without 16 * modification, are permitted provided that the following conditions 17 * are met: 18 * 1. Redistributions of source code must retain the above copyright 19 * notice, this list of conditions and the following disclaimer. 20 * 2. Redistributions in binary form must reproduce the above copyright 21 * notice, this list of conditions and the following disclaimer in the 22 * documentation and/or other materials provided with the distribution. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 25 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 26 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 27 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 28 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 34 * POSSIBILITY OF SUCH DAMAGE. 35 */ 36 37 #ifndef _BOOKE_INTR_H_ 38 #define _BOOKE_INTR_H_ 39 40 /* Interrupt priority `levels'. */ 41 #define IPL_NONE 0 /* nothing */ 42 #define IPL_SOFTCLOCK 1 /* software clock interrupt */ 43 #define IPL_SOFTBIO 2 /* software block i/o interrupt */ 44 #define IPL_SOFTNET 3 /* software network interrupt */ 45 #define IPL_SOFTSERIAL 4 /* software serial interrupt */ 46 #define IPL_VM 5 /* memory allocation */ 47 #define IPL_SCHED 6 /* clock */ 48 #define IPL_HIGH 7 /* everything */ 49 #define NIPL 8 50 51 /* Interrupt sharing types. */ 52 #define IST_NONE (NIPL+0) /* none */ 53 #define IST_EDGE (NIPL+1) /* edge-triggered */ 54 #define IST_LEVEL (NIPL+2) /* level-triggered active-low */ 55 #define IST_LEVEL_LOW IST_LEVEL 56 #define IST_LEVEL_HIGH (NIPL+3) /* level-triggered active-high */ 57 #define IST_MSI (NIPL+4) /* message signaling interrupt (PCI) */ 58 #define IST_ONCHIP (NIPL+5) /* on-chip device */ 59 #ifdef __INTR_PRIVATE 60 #define IST_MSIGROUP (NIPL+6) /* openpic msi groups */ 61 #define IST_TIMER (NIPL+7) /* openpic timers */ 62 #define IST_IPI (NIPL+8) /* openpic ipi */ 63 #define IST_MI (NIPL+9) /* openpic message */ 64 #define IST_MAX (NIPL+10) 65 #endif 66 67 #define __HAVE_FAST_SOFTINTS 1 68 69 #ifndef _LOCORE 70 71 void *intr_establish(int, int, int, int (*)(void *), void *); 72 void intr_disestablish(void *); 73 void intr_cpu_init(struct cpu_info *); 74 void intr_init(void); 75 const char * 76 intr_string(int, int); 77 78 void spl0(void); 79 int splraise(int); 80 void splx(int); 81 #ifdef __INTR_NOINLINE 82 int splhigh(void); 83 int splsched(void); 84 int splvm(void); 85 int splsoftserial(void); 86 int splsoftnet(void); 87 int splsoftbio(void); 88 int splsoftclock(void); 89 #endif 90 91 typedef int ipl_t; 92 typedef struct { 93 ipl_t _ipl; 94 } ipl_cookie_t; 95 96 #ifdef __INTR_PRIVATE 97 98 struct intrsw { 99 void *(*intrsw_establish)(int, int, int, int (*)(void *), void *); 100 void (*intrsw_disestablish)(void *); 101 void (*intrsw_cpu_init)(struct cpu_info *); 102 void (*intrsw_init)(void); 103 void (*intrsw_critintr)(struct trapframe *); 104 void (*intrsw_decrintr)(struct trapframe *); 105 void (*intrsw_extintr)(struct trapframe *); 106 void (*intrsw_fitintr)(struct trapframe *); 107 void (*intrsw_wdogintr)(struct trapframe *); 108 int (*intrsw_splraise)(int); 109 void (*intrsw_spl0)(void); 110 void (*intrsw_splx)(int); 111 const char *(*intrsw_string)(int, int); 112 #ifdef __HAVE_FAST_SOFTINTS 113 void (*intrsw_softint_init_md)(struct lwp *, u_int, uintptr_t *); 114 void (*intrsw_softint_trigger)(uintptr_t); 115 #endif 116 }; 117 118 extern const struct intrsw *powerpc_intrsw; 119 void softint_fast_dispatch(struct lwp *, int); 120 #endif /* __INTR_PRIVATE */ 121 122 #ifndef __INTR_NOINLINE 123 static inline int 124 splhigh(void) 125 { 126 127 return splraise(IPL_HIGH); 128 } 129 130 static inline int 131 splsched(void) 132 { 133 134 return splraise(IPL_SCHED); 135 } 136 137 static inline int 138 splvm(void) 139 { 140 141 return splraise(IPL_VM); 142 } 143 144 static inline int 145 splsoftserial(void) 146 { 147 148 return splraise(IPL_SOFTSERIAL); 149 } 150 151 static inline int 152 splsoftnet(void) 153 { 154 155 return splraise(IPL_SOFTNET); 156 } 157 158 static inline int 159 splsoftbio(void) 160 { 161 162 return splraise(IPL_SOFTBIO); 163 } 164 165 static inline int 166 splsoftclock(void) 167 { 168 169 return splraise(IPL_SOFTCLOCK); 170 } 171 172 static inline int 173 splraiseipl(ipl_cookie_t icookie) 174 { 175 176 return splraise(icookie._ipl); 177 } 178 179 static inline ipl_cookie_t 180 makeiplcookie(ipl_t ipl) 181 { 182 183 return (ipl_cookie_t){._ipl = ipl}; 184 } 185 #endif /* !__INTR_NOINLINE */ 186 187 #endif /* !_LOCORE */ 188 #endif /* !_BOOKE_INTR_H_ */ 189
Indexes created Sat Sep 27 14:09:57 GMT 2025