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cpu.h revision 1.10
      1  1.10    matt /*	$NetBSD: cpu.h,v 1.10 2001/08/28 03:03:43 matt Exp $	*/
      2   1.1      ws 
      3   1.1      ws /*
      4   1.5      ws  * Copyright (C) 1999 Wolfgang Solfrank.
      5   1.5      ws  * Copyright (C) 1999 TooLs GmbH.
      6   1.9    matt  * Copyright (C) 1995-1997 Wolfgang Solfrank.
      7   1.9    matt  * Copyright (C) 1995-1997 TooLs GmbH.
      8   1.1      ws  * All rights reserved.
      9   1.1      ws  *
     10   1.1      ws  * Redistribution and use in source and binary forms, with or without
     11   1.1      ws  * modification, are permitted provided that the following conditions
     12   1.1      ws  * are met:
     13   1.1      ws  * 1. Redistributions of source code must retain the above copyright
     14   1.1      ws  *    notice, this list of conditions and the following disclaimer.
     15   1.1      ws  * 2. Redistributions in binary form must reproduce the above copyright
     16   1.1      ws  *    notice, this list of conditions and the following disclaimer in the
     17   1.1      ws  *    documentation and/or other materials provided with the distribution.
     18   1.1      ws  * 3. All advertising materials mentioning features or use of this software
     19   1.1      ws  *    must display the following acknowledgement:
     20   1.1      ws  *	This product includes software developed by TooLs GmbH.
     21   1.1      ws  * 4. The name of TooLs GmbH may not be used to endorse or promote products
     22   1.1      ws  *    derived from this software without specific prior written permission.
     23   1.1      ws  *
     24   1.1      ws  * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
     25   1.1      ws  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     26   1.1      ws  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     27   1.1      ws  * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
     28   1.1      ws  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
     29   1.1      ws  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
     30   1.1      ws  * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
     31   1.1      ws  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
     32   1.1      ws  * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
     33   1.1      ws  * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     34   1.1      ws  */
     35   1.5      ws #ifndef	_POWERPC_CPU_H_
     36   1.5      ws #define	_POWERPC_CPU_H_
     37   1.1      ws 
     38   1.9    matt #if defined(_KERNEL_OPT)
     39   1.9    matt #include "opt_lockdebug.h"
     40   1.9    matt #include "opt_multiprocessor.h"
     41   1.9    matt #endif
     42   1.9    matt 
     43   1.9    matt #include <sys/device.h>
     44   1.9    matt #include <machine/frame.h>
     45   1.9    matt #include <machine/psl.h>
     46   1.9    matt #include <machine/intr.h>
     47   1.9    matt 
     48   1.9    matt #ifdef _KERNEL
     49   1.9    matt #include <sys/sched.h>
     50   1.9    matt struct cpu_info {
     51   1.9    matt 	struct schedstate_percpu ci_schedstate; /* scheduler state */
     52   1.9    matt #if defined(DIAGNOSTIC) || defined(LOCKDEBUG)
     53   1.9    matt 	u_long ci_spin_locks;		/* # of spin locks held */
     54   1.9    matt 	u_long ci_simple_locks;		/* # of simple locks held */
     55   1.9    matt #endif
     56   1.9    matt 	struct device *ci_dev;		/* device of corresponding cpu */
     57   1.9    matt 	struct proc *ci_curproc;	/* current owner of the processor */
     58   1.9    matt 
     59   1.9    matt 	struct pcb *ci_curpcb;
     60   1.9    matt 	struct pmap *ci_curpm;
     61   1.9    matt 	struct proc *ci_fpuproc;
     62   1.9    matt 	struct pcb *ci_idle_pcb;	/* PA of our idle pcb */
     63   1.9    matt 	int ci_cpuid;
     64   1.9    matt 
     65   1.9    matt 	int ci_astpending;
     66   1.9    matt 	int ci_want_resched;
     67   1.9    matt 	u_long ci_lasttb;
     68   1.9    matt 	int ci_tickspending;
     69   1.9    matt 	int ci_cpl;
     70   1.9    matt 	int ci_ipending;
     71   1.9    matt 	int ci_intrdepth;
     72   1.9    matt 	char *ci_intstk;
     73   1.9    matt 	char *ci_spillstk;
     74   1.9    matt 	int ci_tempsave[8];
     75   1.9    matt 	int ci_ddbsave[8];
     76   1.9    matt 	int ci_ipkdbsave[8];
     77   1.9    matt 	int ci_disisave[4];
     78   1.9    matt 	struct evcnt ci_ev_traps;	/* calls to trap() */
     79   1.9    matt 	struct evcnt ci_ev_kdsi;	/* kernel DSI traps */
     80   1.9    matt 	struct evcnt ci_ev_udsi;	/* user DSI traps */
     81   1.9    matt 	struct evcnt ci_ev_udsi_fatal;	/* user DSI trap failures */
     82   1.9    matt 	struct evcnt ci_ev_isi;		/* user ISI traps */
     83   1.9    matt 	struct evcnt ci_ev_isi_fatal;	/* user ISI trap failures */
     84   1.9    matt 	struct evcnt ci_ev_pgm;		/* user PGM traps */
     85   1.9    matt 	struct evcnt ci_ev_fpu;		/* FPU traps */
     86   1.9    matt 	struct evcnt ci_ev_fpusw;	/* FPU context switch */
     87   1.9    matt 	struct evcnt ci_ev_ali;		/* Alignment traps */
     88   1.9    matt 	struct evcnt ci_ev_ali_fatal;	/* Alignment fatal trap */
     89   1.9    matt 	struct evcnt ci_ev_scalls;	/* system call traps */
     90   1.9    matt 	struct evcnt ci_ev_vec;		/* Altivec traps */
     91   1.9    matt 	struct evcnt ci_ev_vecsw;	/* Altivec context switches */
     92   1.9    matt };
     93   1.9    matt 
     94   1.9    matt #ifdef MULTIPROCESSOR
     95   1.9    matt static __inline int
     96   1.9    matt cpu_number()
     97   1.9    matt {
     98   1.9    matt 	int pir;
     99   1.9    matt 
    100   1.9    matt 	asm ("mfspr %0,1023" : "=r"(pir));
    101   1.9    matt 	return pir;
    102   1.9    matt }
    103   1.9    matt 
    104   1.9    matt static __inline struct cpu_info *
    105   1.9    matt curcpu()
    106   1.9    matt {
    107   1.9    matt 	struct cpu_info *ci;
    108   1.9    matt 
    109   1.9    matt 	asm volatile ("mfsprg %0,0" : "=r"(ci));
    110   1.9    matt 	return ci;
    111   1.9    matt }
    112   1.9    matt 
    113   1.9    matt extern struct cpu_info cpu_info[];
    114   1.9    matt 
    115   1.9    matt #define CPU_IS_PRIMARY(ci)	((ci)->ci_cpuid == 0)
    116   1.9    matt #define curproc			curcpu()->ci_curproc
    117   1.9    matt #define fpuproc			curcpu()->ci_fpuproc
    118   1.9    matt #define curpcb			curcpu()->ci_curpcb
    119   1.9    matt #define curpm			curcpu()->ci_curpm
    120   1.9    matt #define want_resched		curcpu()->ci_want_resched
    121   1.9    matt #define astpending		curcpu()->ci_astpending
    122   1.9    matt #define	intr_depth		curcpu()->ci_intrdepth
    123   1.9    matt 
    124   1.9    matt #else
    125   1.9    matt extern struct cpu_info cpu_info_store;
    126   1.9    matt extern volatile int want_resched;
    127   1.9    matt extern volatile int astpending;
    128   1.9    matt extern volatile int intr_depth;
    129   1.9    matt 
    130   1.9    matt #define curcpu()		(&cpu_info_store)
    131   1.9    matt #define cpu_number()		0
    132   1.9    matt 
    133   1.9    matt #endif /* MULTIPROCESSOR */
    134   1.9    matt 
    135   1.9    matt #define	CLKF_USERMODE(frame)	(((frame)->srr1 & PSL_PR) != 0)
    136   1.9    matt #define	CLKF_BASEPRI(frame)	((frame)->pri == 0)
    137   1.9    matt #define	CLKF_PC(frame)		((frame)->srr0)
    138   1.9    matt #define	CLKF_INTR(frame)	((frame)->depth > 0)
    139   1.9    matt 
    140   1.9    matt #define	PROC_PC(p)		(trapframe(p)->srr0)
    141   1.9    matt 
    142   1.9    matt #define	cpu_swapout(p)
    143   1.9    matt #define cpu_wait(p)
    144   1.9    matt 
    145   1.9    matt extern int powersave;
    146   1.9    matt extern int cpu_timebase;
    147   1.9    matt extern int cpu_printfataltraps;
    148   1.9    matt 
    149   1.9    matt extern struct cpu_info *cpu_attach_common(struct device *, int);
    150   1.9    matt extern void cpu_identify(char *, size_t);
    151   1.9    matt extern void delay (unsigned int);
    152   1.9    matt #define	DELAY(n)		delay(n)
    153   1.9    matt 
    154   1.9    matt #define	need_resched(ci)	(want_resched = 1, astpending = 1)
    155   1.9    matt #define	need_proftick(p)	((p)->p_flag |= P_OWEUPC, astpending = 1)
    156   1.9    matt #define	signotify(p)		(astpending = 1)
    157   1.9    matt 
    158   1.9    matt #endif /* _KERNEL */
    159   1.9    matt 
    160   1.9    matt #if defined(_KERNEL) || defined(_STANDALONE)
    161   1.9    matt #if !defined(CACHELINESIZE)
    162   1.9    matt #define	CACHELINESIZE	32
    163   1.9    matt #endif
    164  1.10    matt #endif
    165  1.10    matt 
    166   1.8  simonb void __syncicache(void *, int);
    167   1.1      ws 
    168   1.5      ws /*
    169   1.5      ws  * CTL_MACHDEP definitions.
    170   1.5      ws  */
    171   1.9    matt #define	CPU_CACHELINE		1
    172   1.9    matt #define	CPU_TIMEBASE		2
    173   1.9    matt #define	CPU_CPUTEMP		3
    174   1.9    matt #define	CPU_PRINTFATALTRAPS	4
    175   1.9    matt #define	CPU_MAXID		5
    176   1.1      ws 
    177   1.5      ws #define	CTL_MACHDEP_NAMES { \
    178   1.5      ws 	{ 0, 0 }, \
    179   1.5      ws 	{ "cachelinesize", CTLTYPE_INT }, \
    180   1.7    matt 	{ "timebase", CTLTYPE_INT }, \
    181   1.7    matt 	{ "cputempature", CTLTYPE_INT }, \
    182   1.9    matt 	{ "printfataltraps", CTLTYPE_INT }, \
    183   1.1      ws }
    184   1.1      ws 
    185   1.5      ws #endif	/* _POWERPC_CPU_H_ */
    186