| History log of /src/sys/arch/powerpc/include/cpu.h |
| Revision | | Date | Author | Comments |
| 1.125 |
| 20-Sep-2025 |
mrg | add a "struct trapframe;" forward decl before a prototype that wants
a pointer to it. GCC 14 didn't like this.
|
| 1.124 |
| 26-Jul-2023 |
skrll | Trailing whitespace
|
| 1.123 |
| 15-Nov-2022 |
macallan | remove workaround for old clang - it's not needed anymore and caused problems
elsewhere
|
| 1.122 |
| 30-May-2022 |
rin | Export CPU capability of unaligned memory access to userland
as machdep.no_unaligned sysctl(7) variable.
This will be used for ld.so.conf in order to provide strictly-
aligned versions of libc routines.
|
| 1.121 |
| 30-May-2022 |
rin | Introduce PPC_NO_UNALIGNED flag to indicate that CPU cannot handle
unaligned memory access, and emulation should be provided to userland.
|
| 1.120 |
| 02-Nov-2021 |
ryo | In order to prevent _mcount() from being recursively called when built with COPTS=-O0,
sprinkle `__always_inline' to make _mcount() be generated as a single function.
|
| 1.119 |
| 14-Aug-2021 |
ryo | Improved the performance of kernel profiling on MULTIPROCESSOR, and possible to get profiling data for each CPU.
In the current implementation, locks are acquired at the entrance of the mcount
internal function, so the higher the number of cores, the more lock conflict
occurs, making profiling performance in a MULTIPROCESSOR environment unusable
and slow. Profiling buffers has been changed to be reserved for each CPU,
improving profiling performance in MP by several to several dozen times.
- Eliminated cpu_simple_lock in mcount internal function, using per-CPU buffers.
- Add ci_gmon member to struct cpu_info of each MP arch.
- Add kern.profiling.percpu node in sysctl tree.
- Add new -c <cpuid> option to kgmon(8) to specify the cpuid, like openbsd.
For compatibility, if the -c option is not specified, the entire system can be
operated as before, and the -p option will get the total profiling data for
all CPUs.
|
| 1.118 |
| 07-Mar-2021 |
rin | For LP64, remove members of struct cpu_info that exist just for
compatible with booke or ibm4xx. Even if MODULAR || _MODULE,
these members are useless for powerpc64.
|
| 1.117 |
| 24-Feb-2021 |
thorpej | Add a provision for a per-cpu battable. Each CPU starts with the global
one, but this allows CPUs to temporarily switch to an alternate battable
if needed.
|
| 1.116 |
| 03-Feb-2021 |
rin | Pull out constant definitions inside struct declaration.
Enable CTASSERT(9) for CPUSAVE_SIZE.
|
| 1.115 |
| 15-Jul-2020 |
rin | branches: 1.115.2;
Factor out emulation code for m[ft]msr in user mode from oea, and
adjust it for systems without FPU.
Now, it can be used from booke and ibm4xx in order to support fenv(3).
|
| 1.114 |
| 07-Jul-2020 |
rin | Part of PR port-powerpc/55425
openssl fails on FPU emulation for powerpc
Provide machdep.fpu_present sysctl variable like other ports.
Userland can get informed that FPU is absent and emulated in software
(and calculation results may not be correct in bit-to-bit precision).
This variable should be useful even if we could fix FPU emulation;
it is much faster to skip FPU arithmetic in general, rather than
relying upon emulation by kernel via illegal instruction handler.
|
| 1.113 |
| 06-Jul-2020 |
rin | Use (CI_SAVEMAX*CPUSAVE_LEN) as CPUSAVE_SIZE for MODULAR || _MODULE,
since it exceeds 128 (256 for now).
XXX
We should use CTASSERT here, but it conflicts with genassym...
|
| 1.112 |
| 06-Jul-2020 |
rin | Drop unused opt_lockdebug.h.
|
| 1.111 |
| 27-Jun-2020 |
macallan | apply __HIDE_DELAY so zfs and friends at least compile
|
| 1.110 |
| 01-Dec-2019 |
ad | Fix false sharing problems with cpu_info. Identified with tprof(8).
This was a very nice win in my tests on a 48 CPU box.
- Reorganise cpu_data slightly according to usage.
- Put cpu_onproc into struct cpu_info alongside ci_curlwp (now is ci_onproc).
- On x86, put some items in their own cache lines according to usage, like
the IPI bitmask and ci_want_resched.
|
| 1.109 |
| 23-Nov-2019 |
ad | cpu_need_resched():
- Remove all code that should be MI, leaving the bare minimum under arch/.
- Make the required actions very explicit.
- Pass in LWP pointer for convenience.
- When a trap is required on another CPU, have the IPI set it locally.
- Expunge cpu_did_resched().
|
| 1.108 |
| 22-Aug-2018 |
msaitoh | - Cleanup for dynamic sysctl:
- Remove unused *_NAMES macros for sysctl.
- Remove unused *_MAXID for sysctls.
- Move CTL_MACHDEP sysctl definitions for m68k into m68k/include/cpu.h and
use them on all m68k machines.
|
| 1.107 |
| 15-Jul-2018 |
maxv | Retire ipkdb entirely. The option was removed from the config files
yesterday.
ok kamil christos
|
| 1.106 |
| 25-May-2018 |
macallan | branches: 1.106.2;
copy HID1 from the boot CPU to secondary CPUs as well on 64bit CPUs
now the 2nd CPU on my G5s runs at full speed
|
| 1.105 |
| 04-May-2018 |
macallan | save & restore HID4 and HID5, zero SPR_HIOR on 970
|
| 1.104 |
| 22-Mar-2018 |
macallan | first step towards G5 SMP:
- only save/restore BATs on CPUs that have them
- treat HID0 as 64bit on 64bit CPUs
|
| 1.103 |
| 17-Dec-2017 |
chs | branches: 1.103.2;
apply the same change for powerpc as mrg did for arm and mips:
CPU_INFO_FOREACH() must always iterate at least the boot cpu.
document this in sys/cpu.h and fix the arm and mips versions
to check ncpu is non zero before using it as an iterator max.
this should fix the new assert in init_main.c.
|
| 1.102 |
| 19-Oct-2016 |
nonaka | branches: 1.102.8;
Added MSI/MSI-X and interrupt_distribute(9) support for powerpc.
|
| 1.101 |
| 23-Jan-2015 |
nonaka | branches: 1.101.2;
ddb MP support
|
| 1.100 |
| 24-Mar-2014 |
christos | branches: 1.100.6;
use cpu_{g,s}etmodel
|
| 1.99 |
| 03-Mar-2014 |
macallan | support ppc601
from scole_mail, ok matt@
|
| 1.98 |
| 08-Nov-2013 |
nisimura | resort the sys/cpu.h way for unused cii iterator in !MULTIPROCESSOR case.
|
| 1.97 |
| 17-Jul-2013 |
matt | kcpuset_t changes for the pmap and removal of __cpuset_t
|
| 1.96 |
| 25-Apr-2013 |
macallan | branches: 1.96.4; 1.96.6;
we can read the timebase register as a 64bit chunk when _ARCH_PPC64 is defined,
not necessarily LP64
|
| 1.95 |
| 27-Nov-2012 |
matt | Make the 85xx get closer to spinning up the secondary CPUs.
Don't assume TLB1[0] has the mapping for VA/PA 0.
Make sure the TLB1 entries that map physical memory have the M (memory
coherent) bit set.
|
| 1.94 |
| 20-Oct-2012 |
kiyohara | Support Cache Protocol 'MEI' with MULTIPROCESSOR.
|
| 1.93 |
| 28-Jul-2012 |
matt | branches: 1.93.2;
Fix -fno-common fallout.
|
| 1.92 |
| 09-Jul-2012 |
matt | More cleanup. Use a union (pmap_segtab) and a typedef (pmap_segtab_t). Add
more functionality from the mips pmap and try to make it more common to ease
the transition for mips in the future.
|
| 1.91 |
| 10-Apr-2012 |
matt | Don't use global asm for __clang__
|
| 1.90 |
| 16-Mar-2012 |
matt | Add CPU_EXECPROT sysctl so that atf can enable exec permission tests for
PPC Booke.
|
| 1.89 |
| 13-Dec-2011 |
kiyohara | branches: 1.89.2;
Remove white-spaces.
|
| 1.88 |
| 30-Jun-2011 |
matt | branches: 1.88.2; 1.88.6;
Modify mapiodev to take a third argument indicating whether the space
should be prefetchable (true) or not (false).
|
| 1.87 |
| 29-Jun-2011 |
matt | Cleanup hatch names.
Add cpuset_info.
|
| 1.86 |
| 21-Jun-2011 |
matt | Add a common cpu_ast(l, ci) routine.
Add a ci_pmap_asid_cur for BOOKE debugging.
|
| 1.85 |
| 21-Jun-2011 |
matt | Reap the ci_ev_soft* evcnts since every variant implements __HAVE_FAST_SOFTINTS
|
| 1.84 |
| 20-Jun-2011 |
matt | Make struct cpu_info the same size if building MODULAR
kernels or compiling a module.
|
| 1.83 |
| 20-Jun-2011 |
matt | Make more module friendly (part 1).
Don't export frame.h and psl.h to all of the kernel.
add lwp_pc and clkf accessor functions.
whitespace cleanup.
|
| 1.82 |
| 17-Jun-2011 |
matt | struct device * -> device_t
|
| 1.81 |
| 15-Jun-2011 |
matt | Move booke_fixup_stubs() to fixup.c and rename it to cpu_fixup_stubs().
This makes it easier for other PPC variants to use it.
|
| 1.80 |
| 14-Jun-2011 |
matt | Take the fast softint support in e500_intr.c and make generic so that it can
be used to provide fast softint for other interrupt implementations.
|
| 1.79 |
| 13-Jun-2011 |
matt | Add __HAVE_CPU_UAREA_ROUTINES support so that uareas will be direct-mapped.
(This avoids the nasty tlb recursion problem on ibm4xx as well on mpc85xx).
|
| 1.78 |
| 12-Jun-2011 |
matt | Use mfsprg0 instead of mfsprg r,0
|
| 1.77 |
| 05-Jun-2011 |
matt | Remove <machine/atomic.h>; use <sys/atomic.h> instead.
Add <powerpc/cpuset.h> (for mpc85xx pmap).
Add some initial MP code for mpc85xx
Rework ipi code to be common across all ppcs
Change PPC to keep curlwp in %r13 while in the kernel.
Move astpending from cpu_info to mdlwp
Improve cpu_need_resched to be more MP friendly.
|
| 1.76 |
| 04-May-2011 |
macallan | branches: 1.76.2;
add access functions for the Instruction Cache Throttling Control register
found in 750 and newer CPUs
|
| 1.75 |
| 16-Feb-2011 |
matt | Fix CLKF_INTR
Add debug evcnt.
|
| 1.74 |
| 18-Jan-2011 |
matt | branches: 1.74.2;
Add support for BookE Freescale MPC85xx (e500 core) processors.
Add fast softint support for PowerPC (though only booke uses it).
Redo FPU/VEC support and add e500 SPE support.
Rework trap/intrs to use a common trapframe format.
Support SOFTFLOAT (no hardfloat or fpu emulation) for BookE.
|
| 1.73 |
| 21-Dec-2010 |
phx | branches: 1.73.2;
All ports have to expose 'struct cpu_info' when _KMEMUSER is defined.
We will just expose cpu_info.ci_data for the moment, which is needed for
vmstat(1) to compile. Doing so with the whole cpu_info structure is
problematic, because of imask_t.
|
| 1.72 |
| 13-Nov-2010 |
uebayasi | Include sys/device_if.h instead of sys/device.h. machine/cpu.h is
one of the lower-most definitions. Relying on the huge sys/device.h
is not a good idea.
|
| 1.71 |
| 20-Oct-2010 |
phx | Support sysctl machdep.cpu_speed for 7447A and 7448 based Macs. On those
machines the CPU's DFS (Dynamic Frequency Switching) feature is used instead
of a GPIO to control the speed.
Two new functions in powerpc/oea/cpu_subr.c were introduced to support
reading and writing of DFS: cpu_get_dfs() and cpu_set_dfs(). Also works
for multiple CPUs, but not before interrupts are enabled.
|
| 1.70 |
| 24-Apr-2010 |
kiyohara | Support 64-bit imask for powerpc/pic.
|
| 1.69 |
| 18-Mar-2010 |
kiyohara | Support PowerPC 405EX/EXr.
1. Add some new source and header files.
(MAL(split) and RGMII(new) relations for EMAC)
2. Create dcr4xx.h. Its moved from dcr405gp.h. Also remove dcr405xx.h.
3. intr.c supports MULTIUIC with virtual-irq. likes to oea.
support 32-virq/128-hwirq.
4. multiple emac support.
5. WALNUT and VIRTEX_* includes arch/powerpc/conf/files.ibm4xx.
6. WALNUT pci uses arch/powerpc/ibm4xx/pci/.
|
| 1.68 |
| 09-Mar-2010 |
matt | branches: 1.68.2;
Add BookE modifications to cpu_info
|
| 1.67 |
| 24-Oct-2009 |
rmind | branches: 1.67.2;
Provide cpu_lwp_free* stubs in vax and powerpc.
Reported by <he>.
|
| 1.66 |
| 21-Oct-2009 |
rmind | Remove uarea swap-out functionality:
- Addresses the issue described in PR/38828.
- Some simplification in threading and sleepq subsystems.
- Eliminates pmap_collect() and, as a side note, allows pmap optimisations.
- Eliminates XS_CTL_DATA_ONSTACK in scsipi code.
- Avoids few scans on LWP list and thus potentially long holds of proc_lock.
- Cuts ~1.5k lines of code. Reduces amd64 kernel size by ~4k.
- Removes __SWAP_BROKEN cases.
Tested on x86, mips, acorn32 (thanks <mpumford>) and partly tested on
acorn26 (thanks to <bjh21>).
Discussed on <tech-kern>, reviewed by <ad>.
|
| 1.65 |
| 30-Apr-2008 |
macallan | branches: 1.65.22;
add dummy argument to cpu_did_resched() so kern_synch.c is happy again
|
| 1.64 |
| 08-Apr-2008 |
garbled | branches: 1.64.2; 1.64.4;
SMP support for ofppc. (finally) Much thanks to Matt Thomas for help in
figuring out all the crazy nuances of getting this working, and to
Michael Lorenz for testing/fixing my changes on macppc. Tested with a
quad-proc 7044-270.
Summary of changes:
Bumped CPU_MAXNUM to 16 on ofppc.
Added md_* routines to ofppc/cpu.c, to sync the timebase, and awaken the CPUs.
Fixed a bug in the test for a 64bit bridge cpu early in locore.S
Added code to set the interrupt priority for all CPUs with an openpic.
Change rtas to probe before cpus, to allow use of the rtas freeze/thaw
timebase code routines.
Fix CPU_INFO_FOREACH macro to iterate through detected cpus, not CPU_MAXNUM.
Change most uses of ci_cpuid to ci_index, to deal with CPUs that do not allow
writing to SPR_PIR. Don't write SPR_PIR unless the secondary cpu identifies
itself as 0.
Change the hatchstack/interrupt stack allocations to allocate a 8192byte
interrupt stack, and a 4096 byte hatch stack, align them to 16 bytes, and
allocate them no lower than 0x10000. Allocate them separately to prevent the
hatch stack corrupting the interrupt stack later on.
If the CPU is a 64bit cpu, copy SPR_ASR in cpu_hatch()
Set the idle stack to ci->ci_data.cpu_idlelwp->l_addr->u_pcb.pcb_sp.
Add OF_start_cpu(). Add a routine to ofwoea_initppc to spin up secondary
procs early, and place them into a spinloop waiting for the hatch routines
to be ready.
Modify the ipi routines to deal with openpics that reverse byte order on read
from an ipi register. (such as on the 7044)
Change the rtas setup to allocate the rtas physical base address above
the kernel, to avoid mucking up the hatch/interrupt stacks.
|
| 1.63 |
| 27-Feb-2008 |
xtraeme | Remove CTL_MACHDEP_NAMES, it's not used anywhere.
Ok by martin@.
|
| 1.62 |
| 05-Feb-2008 |
garbled | branches: 1.62.2; 1.62.6;
Replace as much of the hardcoded CACHELINESIZE with
curcpu()->ci_ci.dcache_line_size as I can. With this change, an ofppc kernel
compiled with both PPC_OEA and PPC_OEA64_BRIDGE defined, boots.
|
| 1.61 |
| 05-Feb-2008 |
garbled | Rewrite a big chunk of the pmap and locore code for powerpc to better
deal with the 64bit bridge mode. pmap changes by Matt Thomas, rest by myself.
Change pmap.c to work similar to exec_elf.c to allow us to compile in
multiple pmaps to a single kernel. This allows the pmap for bridge64 to
co-exist with the 32bit pmap.
Yank __HAVE_PMAP_PHYSSEG from all the oea code.
Add a new global, "oeacpufeat", which is used early in locore to determine
certain cpu features. This allows us to conditionalize code early in the boot
for certain CPUs that have special needs.
Yank most of the ifdef PPC_OEA_BRIDGE64 code from almost every file it was
found in. Some of it seemed incorrect, and my 7044 booted just fine
without it. It would appear that the bridge cpus treat BAT instructions
as nops, so they seem to be safe.
In ofppc, check the oeacpufeat, and if we are on a 64bit proc, clear
MSR[SF], and ASR[V].
With all of these changes, a kernel with both PPC_OEA and PPC_OEA_BRIDGE64
will boot on the POWERIII-2 cpu. However, it will not yet boot on a 32bit
cpu, because of CACHELINESIZE. Work remains to be done there to fix that.
|
| 1.60 |
| 03-Dec-2007 |
ad | Interrupt handling changes, in discussion since February:
- Reduce available SPL levels for hardware devices to none, vm, sched, high.
- Acquire kernel_lock only for interrupts at IPL_VM.
- Implement threaded soft interrupts.
|
| 1.59 |
| 17-Oct-2007 |
garbled | branches: 1.59.2;
Merge the ppcoea-renovation branch to HEAD.
This branch was a major cleanup and rototill of many of the various OEA
cpu based PPC ports that focused on sharing as much code as possible
between the various ports to eliminate near-identical copies of files in
every tree. Additionally there is a new PIC system that unifies the
interface to interrupt code for all different OEA ppc arches. The work
for this branch was done by a variety of people, too long to list here.
TODO:
bebox still needs work to complete the transition to -renovation.
ofppc still needs a bunch of work, which I will be looking at.
ev64260 still needs to be renovated
amigappc was not attempted.
NOTES:
pmppc was removed as an arch, and moved to a evbppc target.
|
| 1.58 |
| 01-Jun-2007 |
nisimura | branches: 1.58.8; 1.58.10; 1.58.12; 1.58.14;
- add booted_device and booted_kernel sysctl nodes to let userland know
about runtime environment.
|
| 1.57 |
| 18-May-2007 |
rjs | Fix for yamt-idlelwp merge.
|
| 1.56 |
| 17-May-2007 |
yamt | merge yamt-idlelwp branch. asked by core@. some ports still needs work.
from doc/BRANCHES:
idle lwp, and some changes depending on it.
1. separate context switching and thread scheduling.
(cf. gmcgarry_ctxsw)
2. implement idle lwp.
3. clean up related MD/MI interfaces.
4. make scheduler(s) modular.
|
| 1.55 |
| 04-Mar-2007 |
christos | branches: 1.55.2; 1.55.4; 1.55.10;
Kill caddr_t; there will be some MI fallout, but it will be fixed shortly.
|
| 1.54 |
| 16-Feb-2007 |
ad | branches: 1.54.2;
Remove spllowersoftclock() and CLKF_BASEPRI(), and always dispatch callouts
via a soft interrupt. In the near future, softclock will be run from process
context.
|
| 1.53 |
| 09-Feb-2007 |
ad | Merge newlock2 to head.
|
| 1.52 |
| 31-Aug-2006 |
matt | branches: 1.52.2;
Add unmapiodev.
|
| 1.51 |
| 05-Aug-2006 |
sanjayl | 1st cut of Powermac G5 support (uses bridge mode).
|
| 1.50 |
| 30-Jun-2006 |
freza | Bring ibm4xx interrupt code up to date:
- generic soft interrupts (ie. use powerpc/softintr.c)
- interrupt event counters (using the ones from powerpc/cpu.h:cpu_info
where appropriate)
- cleanup ibm4xx_intr.h, move implementation details to intr.c
Convert all affected evbppc platforms.
OK by simonb@, some points discussed with matt@
|
| 1.49 |
| 13-Jun-2006 |
freza | branches: 1.49.2;
Merge multiple definitions of cntlzw() ("count leading zeros")
instruction-wrapper to <powerpc/cpu.h>.
OK by briggs@
|
| 1.48 |
| 30-May-2006 |
freza | Remove duplicate definitions of mfdcr()/mtdcr() in favor of a single one
in cpu.h
OK Matt Thomas
|
| 1.47 |
| 16-Feb-2006 |
perry | branches: 1.47.2; 1.47.8;
Change "inline" back to "__inline" in .h files -- C99 is still too
new, and some apps compile things in C89 mode. C89 keywords stay.
As per core@.
|
| 1.46 |
| 24-Dec-2005 |
perry | branches: 1.46.2; 1.46.4; 1.46.6;
Remove leading __ from __(const|inline|signed|volatile) -- it is obsolete.
|
| 1.45 |
| 11-Dec-2005 |
christos | merge ktrace-lwp.
|
| 1.44 |
| 03-Feb-2005 |
briggs | branches: 1.44.6;
Keep track of the CPU's current speed (in kHz) in the cpu info structure,
if we can get it. May want to expand this in the future to include min
and max speeds for systems where we can adjust the speed.
|
| 1.43 |
| 19-Jan-2005 |
matt | branches: 1.43.2;
Split the hw-dependent powermanglement into its own function and make
Idle call that. Add a ci_idlespin function pointer to cpu_info.
Update INIT_CPUINFO to initialize it to a naked 'blr' instruction.
In oea/cpu_subr.c, add cpu_idlespin and make ci_idlespin point to it.
|
| 1.42 |
| 22-Sep-2004 |
yamt | branches: 1.42.4;
move some per-cpu data definitions to MI place so that they can be modified
without touching all ports. discussed on tech-kern@.
|
| 1.41 |
| 06-Jun-2004 |
kleink | Mark cr0 as clobbered in mfrtc().
|
| 1.40 |
| 17-Feb-2004 |
matt | Don't waste space on likely unused sysmon structure.
Instead malloc them as needed.
|
| 1.39 |
| 04-Jan-2004 |
jdolecek | Rearrange process exit path to avoid need to free resources from different
process context ('reaper').
From within the exiting process context:
* deactivate pmap and free vmspace while we can still block
* introduce MD cpu_lwp_free() - this cleans all MD-specific context (such
as FPU state), and is the last potentially blocking operation;
all of cpu_wait(), and most of cpu_exit(), is now folded into cpu_lwp_free()
* process is now immediatelly marked as zombie and made available for pickup
by parent; the remaining last lwp continues the exit as fully detached
* MI (rather than MD) code bumps uvmexp.swtch, cpu_exit() is now same
for both 'process' and 'lwp' exit
uvm_lwp_exit() is modified to never block; the u-area memory is now
always just linked to the list of available u-areas. Introduce (blocking)
uvm_uarea_drain(), which is called to release the excessive u-area memory;
this is called by parent within wait4(), or by pagedaemon on memory shortage.
uvm_uarea_free() is now private function within uvm_glue.c.
MD process/lwp exit code now always calls lwp_exit2() immediatelly after
switching away from the exiting lwp.
g/c now unneeded routines and variables, including the reaper kernel thread
|
| 1.38 |
| 21-Nov-2003 |
matt | Restore ci_curpm since it re-enables 603 to working state.
|
| 1.37 |
| 03-Sep-2003 |
matt | Move CLKF_BASEPRI to machine specific <intr.h> file since it depends on
the encoding of the spl for the port.
|
| 1.36 |
| 18-Aug-2003 |
matt | Not all PPC ports (e.g. macppc) equate IPL_NONE with 0.
|
| 1.35 |
| 12-Aug-2003 |
matt | Nuke ci_curpm and curpm. Nuke pcb_pmreal. Those were use for spill stacks
and those no longer exist. for few uses that need CURPM, use CURPCB/PCB_PM
|
| 1.34 |
| 08-Aug-2003 |
matt | Nuke ci_spillstk/CI_SPILLSTK. No longer needed.
|
| 1.33 |
| 04-Aug-2003 |
matt | Make that OEA based kernels can properly deal with kernel ISI faults. Now
that LKMs are supported, it is possible for a LKM page to be "outspilled"
resulting in a possible ISI fault. Try to spill the page back in.
|
| 1.32 |
| 02-Aug-2003 |
matt | Add symbolic offsets for what's in cpu save locations.
Add a PPC64 variant of mftb
|
| 1.31 |
| 25-Jul-2003 |
scw | Switch ibm4xx over to using the more flexible powerpc bus_space/bus_dma code.
|
| 1.30 |
| 13-Mar-2003 |
matt | branches: 1.30.2;
Use __asm & __volatile to make lint(1) happy.
|
| 1.29 |
| 11-Mar-2003 |
hannken | Add support for the IBM 403GCX cpu. Enabled with "options PPC_IBM403".
- different set of device control registers.
- non-standard access to the time base.
- 16 byte cache lines.
Approved by: Eduardo Horvath <eeh@netbsd.org>
|
| 1.28 |
| 04-Mar-2003 |
matt | Add some missing volatiles.
|
| 1.27 |
| 10-Feb-2003 |
matt | Only include kernel headers if _KERNEL is defined.
|
| 1.26 |
| 03-Feb-2003 |
matt | Rename PPC_MPC6XX to PPC_OEA (and any mpc6xx reference to oea).
|
| 1.25 |
| 02-Feb-2003 |
matt | Perform a rototill of the powerpc code. Mandate use of SPRG0 to store
a pointer to current cpu's cpu_info structure. Use cpu_info for
intstk,intr_depth,still_stk,idle_pcb,curpcb,curlwp,etal even on
non-MULTIPROCESSOR machines. Add common macros GET_CPUINFO and
INIT_CPUINFO to get and initialize the cpu_info struct on startup. Make
ibm4xx use the standard <powerpc/frame.h>. Use IFRAME_xx in ibm4xx
trap_subr.S instead of explicit magic offsets. Move INTSTK and SPILLSTK
to std.<platform>. Change faultbuf to a struct instead of an array.
On MPC6XX cpus, stop using the vector page for temporary space and use
reserved space in cpu_info.
|
| 1.24 |
| 22-Jan-2003 |
kleink | Add mfrtcl() and mfrtc(), similar to mftbl() and mftb().
|
| 1.23 |
| 18-Jan-2003 |
thorpej | Merge the nathanw_sa branch.
|
| 1.22 |
| 25-Nov-2002 |
thorpej | No newlines in string constants.
|
| 1.21 |
| 26-Sep-2002 |
matt | In mftb(), make sure we say we are clobbering cr0.
|
| 1.20 |
| 14-Aug-2002 |
matt | Prepare for PPC64. Use register_t for mtmsr/mfmsr since the msr on PPC64
is 64bits wide. Define proper types for PPC64 if _LP64 is defined.
|
| 1.19 |
| 06-Aug-2002 |
chs | move more inlines to cpu.h: mftb(), mftbl() and mfpvr().
(the mftb() in pmap.c only wanted the lower 32 bits, so that's now mftbl()).
|
| 1.18 |
| 28-Jul-2002 |
chs | define CPU_INFO iterators so that the CPU-states sysctl works for MP.
|
| 1.17 |
| 16-Jul-2002 |
matt | Add machdep.powerpc sysctl. Change the default value of powersave to -1
(< 0 mean no powersave available). Enable powersave by default for
750/7400/7410 but leave if off for 7450/7455.
|
| 1.16 |
| 05-Jul-2002 |
matt | Peform a rototill over the powerpc-based ports.
Move the trap/vector initialization for MPC6xx ports to mpc6xx_machdep.c
Also move softnet, install_extintr, mapiodev, kvtop. Add common BAT
initialization code.
Add user Altivec support.
Fix calls to OF_call_method in macppc/macppc/machdep.c.
Use ci_fpuproc in cpu_info instead of separate fpuproc.
Add separate syscall.c and defined __HAVE_SYSCALL_INTERN.
|
| 1.15 |
| 26-Mar-2002 |
matt | branches: 1.15.2;
Use size_t in prototype (so this will be LP64 clean for PPC64 someday).
Calculate len separately for icache & dcache in case each has different
cacheline widths. Make the code for both loops the same except for the
dcbst/icbi. Deal with sizes >=2GB properly (like that'll happen but ...)
|
| 1.14 |
| 13-Mar-2002 |
eeh | Add cache_info to cpu_info which provides details about D$ and I$
sizes and line sizes. This is needed for cache flusing, clearing
memory, and several other operations. This information is accessible
from userland through a new CPU_CACHEINFO sysctl.
|
| 1.13 |
| 06-Mar-2002 |
nathanw | Move #include <dev/sysmon/sysmonvar.h> inside #ifdef _KERNEL.
|
| 1.12 |
| 03-Mar-2002 |
nathanw | Add sysmon data structures to struct cpu_info.
|
| 1.11 |
| 05-Dec-2001 |
chs | fix macppc MULTIPROCESSOR compilation.
|
| 1.10 |
| 28-Aug-2001 |
matt | branches: 1.10.6;
__syncicache needs to be exports to userspace as well as the kernel.
|
| 1.9 |
| 26-Aug-2001 |
matt | Make all powerpc ports use a common Makefile.powerpc (except walnut)
Enforce -Wmissing-prototypes -Wstrict-prototypes for all ppc ports.
Split out macppc cpu support and make common to mpc6xx ports. Make
other mpc6xx ports use it. Add evcnts for mpc6xx traps.
|
| 1.8 |
| 13-Jun-2001 |
simonb | branches: 1.8.2;
Add a port to IBM's PPC405GP Reference Board (the "walnut")
by Eduardo Horvath and Simon Burge of Wasabi Systems.
IBM 4xx series CPU features:
- New pmap and revised trap handler.
- Support on-chip timers, PCI controller, UARTs
- Framework for on-chip ethernet and watchdog timer.
General PowerPC features:
- Add in-kernel PPC floating point emulation
- New in{,4}_cksum that is between 1.5 and 5 times faster than the
old version depending on CPU type.
General changes:
- Kernel support for generic dbsym-style symbols.
|
| 1.7 |
| 06-Jun-2001 |
matt | Introduce a new & faster pmap for the MPC6xx (60x, 7xx, 7xxx) PPC CPUs.
Move MPC6xx dependent header files to powerpc/include/mpc6xx/
|
| 1.6 |
| 05-May-1999 |
tsubai | branches: 1.6.2; 1.6.16;
Add missing CPU_MAXID definition.
|
| 1.5 |
| 17-Apr-1999 |
ws | Modify syncicache on PowerPC from an inline to a real function.
Support different cache line sizes with the same object code in userland.
While here, move the function to implementation name space.
|
| 1.4 |
| 28-May-1998 |
sakamoto | Rename NetBSD/powerpc to NetBSD/ofppc.
New sys/arch/powerpc with PowerPC-generic stuff.
|
| 1.3 |
| 05-Nov-1997 |
thorpej | asm -> __asm__, volatile -> __volatile
|
| 1.2 |
| 16-Apr-1997 |
thorpej | branches: 1.2.8;
Definitions for machine_vec interface, from Wolfgang Solfrank.
|
| 1.1 |
| 30-Sep-1996 |
ws | PowerPC port
|
| 1.2.8.1 |
| 05-Nov-1997 |
thorpej | Update from trunk: asm -> __asm__, volatile -> __volatile
|
| 1.6.16.1 |
| 21-Jun-2001 |
nathanw | Catch up to -current.
|
| 1.6.2.1 |
| 21-Jun-1999 |
thorpej | Sync w/ -current.
|
| 1.8.2.6 |
| 10-Oct-2002 |
jdolecek | sync kqueue with -current; this includes merge of gehenna-devsw branch,
merge of i386 MP branch, and part of autoconf rototil work
|
| 1.8.2.5 |
| 06-Sep-2002 |
jdolecek | sync kqueue branch with HEAD
|
| 1.8.2.4 |
| 23-Jun-2002 |
jdolecek | catch up with -current on kqueue branch
|
| 1.8.2.3 |
| 16-Mar-2002 |
jdolecek | Catch up with -current.
|
| 1.8.2.2 |
| 10-Jan-2002 |
thorpej | Sync kqueue branch with -current.
|
| 1.8.2.1 |
| 13-Sep-2001 |
thorpej | Update the kqueue branch to HEAD.
|
| 1.10.6.13 |
| 11-Dec-2002 |
thorpej | Sync with HEAD.
|
| 1.10.6.12 |
| 18-Oct-2002 |
nathanw | Catch up to -current.
|
| 1.10.6.11 |
| 27-Aug-2002 |
nathanw | Catch up to -current.
|
| 1.10.6.10 |
| 06-Aug-2002 |
nathanw | Catch up with powerpc rototilling.
|
| 1.10.6.9 |
| 01-Aug-2002 |
nathanw | LWPify.
|
| 1.10.6.8 |
| 01-Aug-2002 |
nathanw | Catch up to -current.
|
| 1.10.6.7 |
| 24-Jun-2002 |
nathanw | Curproc->curlwp renaming.
Change uses of "curproc->l_proc" back to "curproc", which is more like the
original use. Bare uses of "curproc" are now "curlwp".
"curproc" is now #defined in proc.h as ((curlwp) ? (curlwp)->l_proc) : NULL)
so that it is always safe to reference curproc (*de*referencing curproc
is another story, but that's always been true).
|
| 1.10.6.6 |
| 01-Apr-2002 |
nathanw | Catch up to -current.
(CVS: It's not just a program. It's an adventure!)
|
| 1.10.6.5 |
| 08-Jan-2002 |
nathanw | Catch up to -current.
|
| 1.10.6.4 |
| 08-Dec-2001 |
thorpej | Add a cpu_proc_fork(), called from uvm_proc_fork(), which takes care
of machine-dependent handling a fork() time (this is different from
forking the actual context in an LWP world). #define it away on
platforms which do not need it.
Problem noted by Gregory McGarry.
|
| 1.10.6.3 |
| 15-Nov-2001 |
briggs | PROC_PC -> LWP_PC. (thanks, thorpej)
|
| 1.10.6.2 |
| 05-Nov-2001 |
briggs | Initial SA support for ppc. Test-booted on sandpoint, macppc, & walnut.
mcontext and cpu_getmcontext()/cpu_setmcontext() from Klaus Klein
<kleink@netbsd.org>.
|
| 1.10.6.1 |
| 28-Aug-2001 |
briggs | file cpu.h was added on branch nathanw_sa on 2001-11-05 19:46:16 +0000
|
| 1.15.2.3 |
| 31-Aug-2002 |
gehenna | catch up with -current.
|
| 1.15.2.2 |
| 21-Jul-2002 |
gehenna | catch up with -current.
|
| 1.15.2.1 |
| 16-Jul-2002 |
gehenna | catch up with -current.
|
| 1.30.2.6 |
| 04-Feb-2005 |
skrll | Sync with HEAD.
|
| 1.30.2.5 |
| 24-Jan-2005 |
skrll | Sync with HEAD.
|
| 1.30.2.4 |
| 24-Sep-2004 |
skrll | Sync with HEAD.
|
| 1.30.2.3 |
| 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
| 1.30.2.2 |
| 18-Sep-2004 |
skrll | Sync with HEAD.
|
| 1.30.2.1 |
| 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.42.4.1 |
| 29-Apr-2005 |
kent | sync with -current
|
| 1.43.2.1 |
| 12-Feb-2005 |
yamt | sync with head.
|
| 1.44.6.8 |
| 17-Mar-2008 |
yamt | sync with head.
|
| 1.44.6.7 |
| 11-Feb-2008 |
yamt | sync with head.
|
| 1.44.6.6 |
| 07-Dec-2007 |
yamt | sync with head
|
| 1.44.6.5 |
| 27-Oct-2007 |
yamt | sync with head.
|
| 1.44.6.4 |
| 03-Sep-2007 |
yamt | sync with head.
|
| 1.44.6.3 |
| 26-Feb-2007 |
yamt | sync with head.
|
| 1.44.6.2 |
| 30-Dec-2006 |
yamt | sync with head.
|
| 1.44.6.1 |
| 21-Jun-2006 |
yamt | sync with head.
|
| 1.46.6.2 |
| 01-Jun-2006 |
kardel | Sync with head.
|
| 1.46.6.1 |
| 22-Apr-2006 |
simonb | Sync with head.
|
| 1.46.4.1 |
| 09-Sep-2006 |
rpaulo | sync with head
|
| 1.46.2.1 |
| 18-Feb-2006 |
yamt | sync with head.
|
| 1.47.8.1 |
| 19-Jun-2006 |
chap | Sync with head.
|
| 1.47.2.3 |
| 03-Sep-2006 |
yamt | sync with head.
|
| 1.47.2.2 |
| 11-Aug-2006 |
yamt | sync with head
|
| 1.47.2.1 |
| 26-Jun-2006 |
yamt | sync with head.
|
| 1.49.2.1 |
| 13-Jul-2006 |
gdamore | Merge from HEAD.
|
| 1.52.2.1 |
| 28-Jan-2007 |
ad | powerpc changes.
|
| 1.54.2.3 |
| 07-Apr-2007 |
matt | Add cpu_did_resched()
|
| 1.54.2.2 |
| 03-Apr-2007 |
matt | Adapt powerpc to yamt-idlelwp. Nuke cpu_setfunc.
Don't define _HAVE_BITENDIAN_BITOPS. Misc cleanups.
|
| 1.54.2.1 |
| 12-Mar-2007 |
rmind | Sync with HEAD.
|
| 1.55.10.5 |
| 11-Oct-2007 |
garbled | Move a bunch of the macppc SMP code out of macppc, and down into the
generic OEA code. Add a set of md callbacks into these shared routines,
that any oeappc SMP machine needs to provide. This allows for generally
shared SMP startup code, but still allows for machine-specific
differences in the setup and kicking of the new CPU.
Convert macppc to this new layout. Tested by Macallan.
Add an initial attempt at SMP to prep. Tested on UP machine only,
untested on SMP yet.
|
| 1.55.10.4 |
| 04-Oct-2007 |
macallan | add event counters for IPIs received on each CPU
|
| 1.55.10.3 |
| 02-Aug-2007 |
macallan | sync with HEAD
|
| 1.55.10.2 |
| 26-Jun-2007 |
garbled | Sync with HEAD.
|
| 1.55.10.1 |
| 22-May-2007 |
matt | Update to HEAD.
|
| 1.55.4.1 |
| 11-Jul-2007 |
mjf | Sync with head.
|
| 1.55.2.4 |
| 03-Dec-2007 |
ad | Sync with HEAD.
|
| 1.55.2.3 |
| 23-Oct-2007 |
ad | Sync with head.
|
| 1.55.2.2 |
| 09-Jun-2007 |
ad | Sync with head.
|
| 1.55.2.1 |
| 27-May-2007 |
ad | Sync with head.
|
| 1.58.14.1 |
| 25-Oct-2007 |
bouyer | Sync with HEAD.
|
| 1.58.12.1 |
| 18-Oct-2007 |
yamt | sync with head.
|
| 1.58.10.3 |
| 23-Mar-2008 |
matt | sync with HEAD
|
| 1.58.10.2 |
| 09-Jan-2008 |
matt | sync with HEAD
|
| 1.58.10.1 |
| 06-Nov-2007 |
matt | sync with HEAD
|
| 1.58.8.2 |
| 09-Dec-2007 |
jmcneill | Sync with HEAD.
|
| 1.58.8.1 |
| 26-Oct-2007 |
joerg | Sync with HEAD.
Follow the merge of pmap.c on i386 and amd64 and move
pmap_init_tmp_pgtbl into arch/x86/x86/pmap.c. Modify the ACPI wakeup
code to restore CR4 before jumping back into kernel space as the large
page option might cover that.
|
| 1.59.2.2 |
| 18-Feb-2008 |
mjf | Sync with HEAD.
|
| 1.59.2.1 |
| 08-Dec-2007 |
mjf | Sync with HEAD.
|
| 1.62.6.2 |
| 02-Jun-2008 |
mjf | Sync with HEAD.
|
| 1.62.6.1 |
| 03-Apr-2008 |
mjf | Sync with HEAD.
|
| 1.62.2.1 |
| 24-Mar-2008 |
keiichi | sync with head.
|
| 1.64.4.3 |
| 11-Aug-2010 |
yamt | sync with head.
|
| 1.64.4.2 |
| 11-Mar-2010 |
yamt | sync with head
|
| 1.64.4.1 |
| 16-May-2008 |
yamt | sync with head.
|
| 1.64.2.1 |
| 18-May-2008 |
yamt | sync with head.
|
| 1.65.22.3 |
| 14-Oct-2011 |
matt | Sync with current pulling P2020 and other newer processor support.
|
| 1.65.22.2 |
| 17-Jan-2011 |
matt | Add SPE (signal processing engine) support for mpc85xx/booke. Think of it
as AltiVec-lite (really lite). Genercize AltiVec support so that it could
the same interface could support SPE as well. Rework the FPU support along
the same lines. Move the __asm() to their own XXX_subr.S (altivec, fpu, spe).
|
| 1.65.22.1 |
| 07-Jan-2011 |
matt | Add booke support.
|
| 1.67.2.2 |
| 22-Oct-2010 |
uebayasi | Sync with HEAD (-D20101022).
|
| 1.67.2.1 |
| 30-Apr-2010 |
uebayasi | Sync with HEAD.
|
| 1.68.2.4 |
| 12-Jun-2011 |
rmind | sync with head
|
| 1.68.2.3 |
| 31-May-2011 |
rmind | sync with head
|
| 1.68.2.2 |
| 05-Mar-2011 |
rmind | sync with head
|
| 1.68.2.1 |
| 30-May-2010 |
rmind | sync with head
|
| 1.73.2.1 |
| 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.74.2.1 |
| 17-Feb-2011 |
bouyer | Sync with HEAD
|
| 1.76.2.1 |
| 23-Jun-2011 |
cherry | Catchup with rmind-uvmplock merge.
|
| 1.88.6.3 |
| 29-Apr-2012 |
mrg | sync to latest -current.
|
| 1.88.6.2 |
| 05-Apr-2012 |
mrg | sync to latest -current.
|
| 1.88.6.1 |
| 18-Feb-2012 |
mrg | merge to -current.
|
| 1.88.2.4 |
| 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.88.2.3 |
| 16-Jan-2013 |
yamt | sync with (a bit old) head
|
| 1.88.2.2 |
| 30-Oct-2012 |
yamt | sync with head
|
| 1.88.2.1 |
| 17-Apr-2012 |
yamt | sync with head
|
| 1.89.2.2 |
| 17-May-2012 |
riz | Pull up following revision(s) (requested by matt in ticket #251):
sys/arch/powerpc/powerpc/powerpc_machdep.c: revision 1.64
sys/arch/powerpc/include/cpu.h: revision 1.90
Add CPU_EXECPROT sysctl so that atf can enable exec permission tests for
PPC Booke.
|
| 1.89.2.1 |
| 09-May-2012 |
riz | Pull up following revision(s) (requested by matt in ticket #242):
sys/arch/powerpc/include/cpu.h: revision 1.91
Don't use global asm for __clang__
|
| 1.93.2.5 |
| 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.93.2.4 |
| 20-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.93.2.3 |
| 23-Jun-2013 |
tls | resync from head
|
| 1.93.2.2 |
| 25-Feb-2013 |
tls | resync with head
|
| 1.93.2.1 |
| 20-Nov-2012 |
tls | Resync to 2012-11-19 00:00:00 UTC
|
| 1.96.6.1 |
| 23-Jul-2013 |
riastradh | sync with HEAD
|
| 1.96.4.2 |
| 18-May-2014 |
rmind | sync with head
|
| 1.96.4.1 |
| 28-Aug-2013 |
rmind | sync with head
|
| 1.100.6.2 |
| 05-Dec-2016 |
skrll | Sync with HEAD
|
| 1.100.6.1 |
| 06-Apr-2015 |
skrll | Sync with HEAD
|
| 1.101.2.1 |
| 04-Nov-2016 |
pgoyette | Sync with HEAD
|
| 1.102.8.1 |
| 26-Feb-2018 |
snj | Pull up following revision(s) (requested by skrll in ticket #566):
sys/arch/arm/include/cpu.h: 1.94
sys/arch/mips/include/cpu.h: 1.122
sys/arch/powerpc/include/cpu.h: 1.103
sys/sys/cpu.h: 1.42
CPU_INFO_FOREACH() must always iterate at least the boot cpu.
document this in sys/cpu.h and fix the arm and mips versions
to check ncpu is non zero before using it as an iterator max.
this should fix the new assert in init_main.c.
--
apply the same change for powerpc as mrg did for arm and mips:
CPU_INFO_FOREACH() must always iterate at least the boot cpu.
document this in sys/cpu.h and fix the arm and mips versions
to check ncpu is non zero before using it as an iterator max.
this should fix the new assert in init_main.c.
|
| 1.103.2.5 |
| 06-Sep-2018 |
pgoyette | Sync with HEAD
Resolve a couple of conflicts (result of the uimin/uimax changes)
|
| 1.103.2.4 |
| 28-Jul-2018 |
pgoyette | Sync with HEAD
|
| 1.103.2.3 |
| 25-Jun-2018 |
pgoyette | Sync with HEAD
|
| 1.103.2.2 |
| 21-May-2018 |
pgoyette | Sync with HEAD
|
| 1.103.2.1 |
| 30-Mar-2018 |
pgoyette | Resolve conflicts between branch and HEAD
|
| 1.106.2.2 |
| 08-Apr-2020 |
martin | Merge changes from current as of 20200406
|
| 1.106.2.1 |
| 10-Jun-2019 |
christos | Sync with HEAD
|
| 1.115.2.1 |
| 03-Apr-2021 |
thorpej | Sync with HEAD.
|
