cpu.h revision 1.13 1 1.13 nathanw /* $NetBSD: cpu.h,v 1.13 2002/03/06 06:37:17 nathanw Exp $ */
2 1.1 ws
3 1.1 ws /*
4 1.5 ws * Copyright (C) 1999 Wolfgang Solfrank.
5 1.5 ws * Copyright (C) 1999 TooLs GmbH.
6 1.9 matt * Copyright (C) 1995-1997 Wolfgang Solfrank.
7 1.9 matt * Copyright (C) 1995-1997 TooLs GmbH.
8 1.1 ws * All rights reserved.
9 1.1 ws *
10 1.1 ws * Redistribution and use in source and binary forms, with or without
11 1.1 ws * modification, are permitted provided that the following conditions
12 1.1 ws * are met:
13 1.1 ws * 1. Redistributions of source code must retain the above copyright
14 1.1 ws * notice, this list of conditions and the following disclaimer.
15 1.1 ws * 2. Redistributions in binary form must reproduce the above copyright
16 1.1 ws * notice, this list of conditions and the following disclaimer in the
17 1.1 ws * documentation and/or other materials provided with the distribution.
18 1.1 ws * 3. All advertising materials mentioning features or use of this software
19 1.1 ws * must display the following acknowledgement:
20 1.1 ws * This product includes software developed by TooLs GmbH.
21 1.1 ws * 4. The name of TooLs GmbH may not be used to endorse or promote products
22 1.1 ws * derived from this software without specific prior written permission.
23 1.1 ws *
24 1.1 ws * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
25 1.1 ws * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
26 1.1 ws * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
27 1.1 ws * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
28 1.1 ws * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
29 1.1 ws * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
30 1.1 ws * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
31 1.1 ws * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
32 1.1 ws * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
33 1.1 ws * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 1.1 ws */
35 1.5 ws #ifndef _POWERPC_CPU_H_
36 1.5 ws #define _POWERPC_CPU_H_
37 1.1 ws
38 1.9 matt #if defined(_KERNEL_OPT)
39 1.9 matt #include "opt_lockdebug.h"
40 1.9 matt #include "opt_multiprocessor.h"
41 1.9 matt #endif
42 1.9 matt
43 1.9 matt #include <sys/device.h>
44 1.9 matt #include <machine/frame.h>
45 1.9 matt #include <machine/psl.h>
46 1.9 matt #include <machine/intr.h>
47 1.9 matt
48 1.9 matt #ifdef _KERNEL
49 1.9 matt #include <sys/sched.h>
50 1.13 nathanw #include <dev/sysmon/sysmonvar.h>
51 1.9 matt struct cpu_info {
52 1.9 matt struct schedstate_percpu ci_schedstate; /* scheduler state */
53 1.9 matt #if defined(DIAGNOSTIC) || defined(LOCKDEBUG)
54 1.9 matt u_long ci_spin_locks; /* # of spin locks held */
55 1.9 matt u_long ci_simple_locks; /* # of simple locks held */
56 1.9 matt #endif
57 1.9 matt struct device *ci_dev; /* device of corresponding cpu */
58 1.9 matt struct proc *ci_curproc; /* current owner of the processor */
59 1.9 matt
60 1.9 matt struct pcb *ci_curpcb;
61 1.9 matt struct pmap *ci_curpm;
62 1.9 matt struct proc *ci_fpuproc;
63 1.9 matt struct pcb *ci_idle_pcb; /* PA of our idle pcb */
64 1.9 matt int ci_cpuid;
65 1.9 matt
66 1.9 matt int ci_astpending;
67 1.9 matt int ci_want_resched;
68 1.9 matt u_long ci_lasttb;
69 1.9 matt int ci_tickspending;
70 1.9 matt int ci_cpl;
71 1.9 matt int ci_ipending;
72 1.9 matt int ci_intrdepth;
73 1.9 matt char *ci_intstk;
74 1.9 matt char *ci_spillstk;
75 1.9 matt int ci_tempsave[8];
76 1.9 matt int ci_ddbsave[8];
77 1.9 matt int ci_ipkdbsave[8];
78 1.9 matt int ci_disisave[4];
79 1.12 nathanw struct sysmon_envsys ci_sysmon;
80 1.12 nathanw struct envsys_tre_data ci_tau_info;
81 1.9 matt struct evcnt ci_ev_traps; /* calls to trap() */
82 1.9 matt struct evcnt ci_ev_kdsi; /* kernel DSI traps */
83 1.9 matt struct evcnt ci_ev_udsi; /* user DSI traps */
84 1.9 matt struct evcnt ci_ev_udsi_fatal; /* user DSI trap failures */
85 1.9 matt struct evcnt ci_ev_isi; /* user ISI traps */
86 1.9 matt struct evcnt ci_ev_isi_fatal; /* user ISI trap failures */
87 1.9 matt struct evcnt ci_ev_pgm; /* user PGM traps */
88 1.9 matt struct evcnt ci_ev_fpu; /* FPU traps */
89 1.9 matt struct evcnt ci_ev_fpusw; /* FPU context switch */
90 1.9 matt struct evcnt ci_ev_ali; /* Alignment traps */
91 1.9 matt struct evcnt ci_ev_ali_fatal; /* Alignment fatal trap */
92 1.9 matt struct evcnt ci_ev_scalls; /* system call traps */
93 1.9 matt struct evcnt ci_ev_vec; /* Altivec traps */
94 1.9 matt struct evcnt ci_ev_vecsw; /* Altivec context switches */
95 1.9 matt };
96 1.9 matt
97 1.9 matt #ifdef MULTIPROCESSOR
98 1.9 matt static __inline int
99 1.11 chs cpu_number(void)
100 1.9 matt {
101 1.9 matt int pir;
102 1.9 matt
103 1.9 matt asm ("mfspr %0,1023" : "=r"(pir));
104 1.9 matt return pir;
105 1.9 matt }
106 1.9 matt
107 1.9 matt static __inline struct cpu_info *
108 1.11 chs curcpu(void)
109 1.9 matt {
110 1.9 matt struct cpu_info *ci;
111 1.9 matt
112 1.9 matt asm volatile ("mfsprg %0,0" : "=r"(ci));
113 1.9 matt return ci;
114 1.9 matt }
115 1.11 chs
116 1.11 chs void cpu_boot_secondary_processors(void);
117 1.9 matt
118 1.9 matt extern struct cpu_info cpu_info[];
119 1.9 matt
120 1.9 matt #define CPU_IS_PRIMARY(ci) ((ci)->ci_cpuid == 0)
121 1.9 matt #define curproc curcpu()->ci_curproc
122 1.9 matt #define fpuproc curcpu()->ci_fpuproc
123 1.9 matt #define curpcb curcpu()->ci_curpcb
124 1.9 matt #define curpm curcpu()->ci_curpm
125 1.9 matt #define want_resched curcpu()->ci_want_resched
126 1.9 matt #define astpending curcpu()->ci_astpending
127 1.9 matt #define intr_depth curcpu()->ci_intrdepth
128 1.9 matt
129 1.9 matt #else
130 1.9 matt extern struct cpu_info cpu_info_store;
131 1.9 matt extern volatile int want_resched;
132 1.9 matt extern volatile int astpending;
133 1.9 matt extern volatile int intr_depth;
134 1.9 matt
135 1.9 matt #define curcpu() (&cpu_info_store)
136 1.9 matt #define cpu_number() 0
137 1.9 matt
138 1.9 matt #endif /* MULTIPROCESSOR */
139 1.9 matt
140 1.9 matt #define CLKF_USERMODE(frame) (((frame)->srr1 & PSL_PR) != 0)
141 1.9 matt #define CLKF_BASEPRI(frame) ((frame)->pri == 0)
142 1.9 matt #define CLKF_PC(frame) ((frame)->srr0)
143 1.9 matt #define CLKF_INTR(frame) ((frame)->depth > 0)
144 1.9 matt
145 1.9 matt #define PROC_PC(p) (trapframe(p)->srr0)
146 1.9 matt
147 1.9 matt #define cpu_swapout(p)
148 1.9 matt #define cpu_wait(p)
149 1.9 matt
150 1.9 matt extern int powersave;
151 1.9 matt extern int cpu_timebase;
152 1.9 matt extern int cpu_printfataltraps;
153 1.9 matt
154 1.9 matt extern struct cpu_info *cpu_attach_common(struct device *, int);
155 1.9 matt extern void cpu_identify(char *, size_t);
156 1.9 matt extern void delay (unsigned int);
157 1.9 matt #define DELAY(n) delay(n)
158 1.9 matt
159 1.9 matt #define need_resched(ci) (want_resched = 1, astpending = 1)
160 1.9 matt #define need_proftick(p) ((p)->p_flag |= P_OWEUPC, astpending = 1)
161 1.9 matt #define signotify(p) (astpending = 1)
162 1.9 matt
163 1.9 matt #endif /* _KERNEL */
164 1.9 matt
165 1.9 matt #if defined(_KERNEL) || defined(_STANDALONE)
166 1.9 matt #if !defined(CACHELINESIZE)
167 1.9 matt #define CACHELINESIZE 32
168 1.9 matt #endif
169 1.10 matt #endif
170 1.10 matt
171 1.8 simonb void __syncicache(void *, int);
172 1.1 ws
173 1.5 ws /*
174 1.5 ws * CTL_MACHDEP definitions.
175 1.5 ws */
176 1.9 matt #define CPU_CACHELINE 1
177 1.9 matt #define CPU_TIMEBASE 2
178 1.9 matt #define CPU_CPUTEMP 3
179 1.9 matt #define CPU_PRINTFATALTRAPS 4
180 1.9 matt #define CPU_MAXID 5
181 1.1 ws
182 1.5 ws #define CTL_MACHDEP_NAMES { \
183 1.5 ws { 0, 0 }, \
184 1.5 ws { "cachelinesize", CTLTYPE_INT }, \
185 1.7 matt { "timebase", CTLTYPE_INT }, \
186 1.7 matt { "cputempature", CTLTYPE_INT }, \
187 1.9 matt { "printfataltraps", CTLTYPE_INT }, \
188 1.1 ws }
189 1.1 ws
190 1.5 ws #endif /* _POWERPC_CPU_H_ */
191