cpu.h revision 1.12
1 /* $NetBSD: cpu.h,v 1.12 2002/03/03 07:09:09 nathanw Exp $ */ 2 3 /* 4 * Copyright (C) 1999 Wolfgang Solfrank. 5 * Copyright (C) 1999 TooLs GmbH. 6 * Copyright (C) 1995-1997 Wolfgang Solfrank. 7 * Copyright (C) 1995-1997 TooLs GmbH. 8 * All rights reserved. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by TooLs GmbH. 21 * 4. The name of TooLs GmbH may not be used to endorse or promote products 22 * derived from this software without specific prior written permission. 23 * 24 * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR 25 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 26 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 27 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 28 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 29 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 30 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 31 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 32 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 33 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 34 */ 35 #ifndef _POWERPC_CPU_H_ 36 #define _POWERPC_CPU_H_ 37 38 #if defined(_KERNEL_OPT) 39 #include "opt_lockdebug.h" 40 #include "opt_multiprocessor.h" 41 #endif 42 43 #include <sys/device.h> 44 #include <machine/frame.h> 45 #include <machine/psl.h> 46 #include <machine/intr.h> 47 48 #include <dev/sysmon/sysmonvar.h> 49 50 #ifdef _KERNEL 51 #include <sys/sched.h> 52 struct cpu_info { 53 struct schedstate_percpu ci_schedstate; /* scheduler state */ 54 #if defined(DIAGNOSTIC) || defined(LOCKDEBUG) 55 u_long ci_spin_locks; /* # of spin locks held */ 56 u_long ci_simple_locks; /* # of simple locks held */ 57 #endif 58 struct device *ci_dev; /* device of corresponding cpu */ 59 struct proc *ci_curproc; /* current owner of the processor */ 60 61 struct pcb *ci_curpcb; 62 struct pmap *ci_curpm; 63 struct proc *ci_fpuproc; 64 struct pcb *ci_idle_pcb; /* PA of our idle pcb */ 65 int ci_cpuid; 66 67 int ci_astpending; 68 int ci_want_resched; 69 u_long ci_lasttb; 70 int ci_tickspending; 71 int ci_cpl; 72 int ci_ipending; 73 int ci_intrdepth; 74 char *ci_intstk; 75 char *ci_spillstk; 76 int ci_tempsave[8]; 77 int ci_ddbsave[8]; 78 int ci_ipkdbsave[8]; 79 int ci_disisave[4]; 80 struct sysmon_envsys ci_sysmon; 81 struct envsys_tre_data ci_tau_info; 82 struct evcnt ci_ev_traps; /* calls to trap() */ 83 struct evcnt ci_ev_kdsi; /* kernel DSI traps */ 84 struct evcnt ci_ev_udsi; /* user DSI traps */ 85 struct evcnt ci_ev_udsi_fatal; /* user DSI trap failures */ 86 struct evcnt ci_ev_isi; /* user ISI traps */ 87 struct evcnt ci_ev_isi_fatal; /* user ISI trap failures */ 88 struct evcnt ci_ev_pgm; /* user PGM traps */ 89 struct evcnt ci_ev_fpu; /* FPU traps */ 90 struct evcnt ci_ev_fpusw; /* FPU context switch */ 91 struct evcnt ci_ev_ali; /* Alignment traps */ 92 struct evcnt ci_ev_ali_fatal; /* Alignment fatal trap */ 93 struct evcnt ci_ev_scalls; /* system call traps */ 94 struct evcnt ci_ev_vec; /* Altivec traps */ 95 struct evcnt ci_ev_vecsw; /* Altivec context switches */ 96 }; 97 98 #ifdef MULTIPROCESSOR 99 static __inline int 100 cpu_number(void) 101 { 102 int pir; 103 104 asm ("mfspr %0,1023" : "=r"(pir)); 105 return pir; 106 } 107 108 static __inline struct cpu_info * 109 curcpu(void) 110 { 111 struct cpu_info *ci; 112 113 asm volatile ("mfsprg %0,0" : "=r"(ci)); 114 return ci; 115 } 116 117 void cpu_boot_secondary_processors(void); 118 119 extern struct cpu_info cpu_info[]; 120 121 #define CPU_IS_PRIMARY(ci) ((ci)->ci_cpuid == 0) 122 #define curproc curcpu()->ci_curproc 123 #define fpuproc curcpu()->ci_fpuproc 124 #define curpcb curcpu()->ci_curpcb 125 #define curpm curcpu()->ci_curpm 126 #define want_resched curcpu()->ci_want_resched 127 #define astpending curcpu()->ci_astpending 128 #define intr_depth curcpu()->ci_intrdepth 129 130 #else 131 extern struct cpu_info cpu_info_store; 132 extern volatile int want_resched; 133 extern volatile int astpending; 134 extern volatile int intr_depth; 135 136 #define curcpu() (&cpu_info_store) 137 #define cpu_number() 0 138 139 #endif /* MULTIPROCESSOR */ 140 141 #define CLKF_USERMODE(frame) (((frame)->srr1 & PSL_PR) != 0) 142 #define CLKF_BASEPRI(frame) ((frame)->pri == 0) 143 #define CLKF_PC(frame) ((frame)->srr0) 144 #define CLKF_INTR(frame) ((frame)->depth > 0) 145 146 #define PROC_PC(p) (trapframe(p)->srr0) 147 148 #define cpu_swapout(p) 149 #define cpu_wait(p) 150 151 extern int powersave; 152 extern int cpu_timebase; 153 extern int cpu_printfataltraps; 154 155 extern struct cpu_info *cpu_attach_common(struct device *, int); 156 extern void cpu_identify(char *, size_t); 157 extern void delay (unsigned int); 158 #define DELAY(n) delay(n) 159 160 #define need_resched(ci) (want_resched = 1, astpending = 1) 161 #define need_proftick(p) ((p)->p_flag |= P_OWEUPC, astpending = 1) 162 #define signotify(p) (astpending = 1) 163 164 #endif /* _KERNEL */ 165 166 #if defined(_KERNEL) || defined(_STANDALONE) 167 #if !defined(CACHELINESIZE) 168 #define CACHELINESIZE 32 169 #endif 170 #endif 171 172 void __syncicache(void *, int); 173 174 /* 175 * CTL_MACHDEP definitions. 176 */ 177 #define CPU_CACHELINE 1 178 #define CPU_TIMEBASE 2 179 #define CPU_CPUTEMP 3 180 #define CPU_PRINTFATALTRAPS 4 181 #define CPU_MAXID 5 182 183 #define CTL_MACHDEP_NAMES { \ 184 { 0, 0 }, \ 185 { "cachelinesize", CTLTYPE_INT }, \ 186 { "timebase", CTLTYPE_INT }, \ 187 { "cputempature", CTLTYPE_INT }, \ 188 { "printfataltraps", CTLTYPE_INT }, \ 189 } 190 191 #endif /* _POWERPC_CPU_H_ */ 192
Indexes created Mon Sep 22 10:09:38 GMT 2025