1 /* $NetBSD: pio.h,v 1.10 2022/02/16 23:49:26 riastradh Exp $ */ 2 /* $OpenBSD: pio.h,v 1.1 1997/10/13 10:53:47 pefo Exp $ */ 3 4 /* 5 * Copyright (c) 1997 Per Fogelstrom, Opsycon AB and RTMX Inc, USA. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. All advertising materials mentioning features or use of this software 16 * must display the following acknowledgement: 17 * This product includes software developed under OpenBSD by 18 * Per Fogelstrom Opsycon AB for RTMX Inc, North Carolina, USA. 19 * 4. The name of the author may not be used to endorse or promote products 20 * derived from this software without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS 23 * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 24 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY 26 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 * 34 */ 35 36 #ifndef _POWERPC_PIO_H_ 37 #define _POWERPC_PIO_H_ 38 39 #ifdef _KERNEL_OPT 40 #include "opt_ppcarch.h" 41 #endif 42 43 /* 44 * I/O macros. 45 */ 46 47 #if defined(PPC_IBM4XX) && !defined(PPC_IBM440) 48 /* eieio is implemented as sync */ 49 #define IO_BARRIER() __asm volatile("sync" ::: "memory") 50 #else 51 #define IO_BARRIER() __asm volatile("eieio; sync" ::: "memory") 52 #endif 53 54 static __inline void __outb(volatile uint8_t *a, uint8_t v); 55 static __inline void __outw(volatile uint16_t *a, uint16_t v); 56 static __inline void __outl(volatile uint32_t *a, uint32_t v); 57 static __inline void __outwrb(volatile uint16_t *a, uint16_t v); 58 static __inline void __outlrb(volatile uint32_t *a, uint32_t v); 59 static __inline uint8_t __inb(volatile uint8_t *a); 60 static __inline uint16_t __inw(volatile uint16_t *a); 61 static __inline uint32_t __inl(volatile uint32_t *a); 62 static __inline uint16_t __inwrb(volatile uint16_t *a); 63 static __inline uint32_t __inlrb(volatile uint32_t *a); 64 static __inline void __outsb(volatile uint8_t *, const uint8_t *, size_t); 65 static __inline void __outsw(volatile uint16_t *, const uint16_t *, size_t); 66 static __inline void __outsl(volatile uint32_t *, const uint32_t *, size_t); 67 static __inline void __outswrb(volatile uint16_t *, const uint16_t *, size_t); 68 static __inline void __outslrb(volatile uint32_t *, const uint32_t *, size_t); 69 static __inline void __insb(volatile uint8_t *, uint8_t *, size_t); 70 static __inline void __insw(volatile uint16_t *, uint16_t *, size_t); 71 static __inline void __insl(volatile uint32_t *, uint32_t *, size_t); 72 static __inline void __inswrb(volatile uint16_t *, uint16_t *, size_t); 73 static __inline void __inslrb(volatile uint32_t *, uint32_t *, size_t); 74 75 static __inline void 76 __outb(volatile uint8_t *a, uint8_t v) 77 { 78 *a = v; 79 IO_BARRIER(); 80 } 81 82 static __inline void 83 __outw(volatile uint16_t *a, uint16_t v) 84 { 85 *a = v; 86 IO_BARRIER(); 87 } 88 89 static __inline void 90 __outl(volatile uint32_t *a, uint32_t v) 91 { 92 *a = v; 93 IO_BARRIER(); 94 } 95 96 static __inline void 97 __outwrb(volatile uint16_t *a, uint16_t v) 98 { 99 __asm volatile("sthbrx %0, 0, %1" :: "r"(v), "r"(a)); 100 IO_BARRIER(); 101 } 102 103 static __inline void 104 __outlrb(volatile uint32_t *a, uint32_t v) 105 { 106 __asm volatile("stwbrx %0, 0, %1" :: "r"(v), "r"(a)); 107 IO_BARRIER(); 108 } 109 110 static __inline uint8_t 111 __inb(volatile uint8_t *a) 112 { 113 uint8_t _v_; 114 115 _v_ = *a; 116 IO_BARRIER(); 117 return _v_; 118 } 119 120 static __inline uint16_t 121 __inw(volatile uint16_t *a) 122 { 123 uint16_t _v_; 124 125 _v_ = *a; 126 IO_BARRIER(); 127 return _v_; 128 } 129 130 static __inline uint32_t 131 __inl(volatile uint32_t *a) 132 { 133 uint32_t _v_; 134 135 _v_ = *a; 136 IO_BARRIER(); 137 return _v_; 138 } 139 140 static __inline uint16_t 141 __inwrb(volatile uint16_t *a) 142 { 143 uint16_t _v_; 144 145 __asm volatile("lhbrx %0, 0, %1" : "=r"(_v_) : "r"(a)); 146 IO_BARRIER(); 147 return _v_; 148 } 149 150 static __inline uint32_t 151 __inlrb(volatile uint32_t *a) 152 { 153 uint32_t _v_; 154 155 __asm volatile("lwbrx %0, 0, %1" : "=r"(_v_) : "r"(a)); 156 IO_BARRIER(); 157 return _v_; 158 } 159 160 #define outb(a,v) (__outb((volatile uint8_t *)(a), v)) 161 #define out8(a,v) outb(a,v) 162 #define outw(a,v) (__outw((volatile uint16_t *)(a), v)) 163 #define out16(a,v) outw(a,v) 164 #define outl(a,v) (__outl((volatile uint32_t *)(a), v)) 165 #define out32(a,v) outl(a,v) 166 #define inb(a) (__inb((volatile uint8_t *)(a))) 167 #define in8(a) inb(a) 168 #define inw(a) (__inw((volatile uint16_t *)(a))) 169 #define in16(a) inw(a) 170 #define inl(a) (__inl((volatile uint32_t *)(a))) 171 #define in32(a) inl(a) 172 173 #define out8rb(a,v) outb(a,v) 174 #define outwrb(a,v) (__outwrb((volatile uint16_t *)(a), v)) 175 #define out16rb(a,v) outwrb(a,v) 176 #define outlrb(a,v) (__outlrb((volatile uint32_t *)(a), v)) 177 #define out32rb(a,v) outlrb(a,v) 178 #define in8rb(a) inb(a) 179 #define inwrb(a) (__inwrb((volatile uint16_t *)(a))) 180 #define in16rb(a) inwrb(a) 181 #define inlrb(a) (__inlrb((volatile uint32_t *)(a))) 182 #define in32rb(a) inlrb(a) 183 184 185 static __inline void 186 __outsb(volatile uint8_t *a, const uint8_t *s, size_t c) 187 { 188 while (c--) 189 *a = *s++; 190 IO_BARRIER(); 191 } 192 193 static __inline void 194 __outsw(volatile uint16_t *a, const uint16_t *s, size_t c) 195 { 196 while (c--) 197 *a = *s++; 198 IO_BARRIER(); 199 } 200 201 static __inline void 202 __outsl(volatile uint32_t *a, const uint32_t *s, size_t c) 203 { 204 while (c--) 205 *a = *s++; 206 IO_BARRIER(); 207 } 208 209 static __inline void 210 __outswrb(volatile uint16_t *a, const uint16_t *s, size_t c) 211 { 212 while (c--) 213 __asm volatile("sthbrx %0, 0, %1" :: "r"(*s++), "r"(a)); 214 IO_BARRIER(); 215 } 216 217 static __inline void 218 __outslrb(volatile uint32_t *a, const uint32_t *s, size_t c) 219 { 220 while (c--) 221 __asm volatile("stwbrx %0, 0, %1" :: "r"(*s++), "r"(a)); 222 IO_BARRIER(); 223 } 224 225 static __inline void 226 __insb(volatile uint8_t *a, uint8_t *d, size_t c) 227 { 228 while (c--) 229 *d++ = *a; 230 IO_BARRIER(); 231 } 232 233 static __inline void 234 __insw(volatile uint16_t *a, uint16_t *d, size_t c) 235 { 236 while (c--) 237 *d++ = *a; 238 IO_BARRIER(); 239 } 240 241 static __inline void 242 __insl(volatile uint32_t *a, uint32_t *d, size_t c) 243 { 244 while (c--) 245 *d++ = *a; 246 IO_BARRIER(); 247 } 248 249 static __inline void 250 __inswrb(volatile uint16_t *a, uint16_t *d, size_t c) 251 { 252 while (c--) 253 __asm volatile("lhbrx %0, 0, %1" : "=r"(*d++) : "r"(a)); 254 IO_BARRIER(); 255 } 256 257 static __inline void 258 __inslrb(volatile uint32_t *a, uint32_t *d, size_t c) 259 { 260 while (c--) 261 __asm volatile("lwbrx %0, 0, %1" : "=r"(*d++) : "r"(a)); 262 IO_BARRIER(); 263 } 264 265 #define outsb(a,s,c) (__outsb((volatile uint8_t *)(a), s, c)) 266 #define outs8(a,s,c) outsb(a,s,c) 267 #define outsw(a,s,c) (__outsw((volatile uint16_t *)(a), s, c)) 268 #define outs16(a,s,c) outsw(a,s,c) 269 #define outsl(a,s,c) (__outsl((volatile uint32_t *)(a), s, c)) 270 #define outs32(a,s,c) outsl(a,s,c) 271 #define insb(a,d,c) (__insb((volatile uint8_t *)(a), d, c)) 272 #define ins8(a,d,c) insb(a,d,c) 273 #define insw(a,d,c) (__insw((volatile uint16_t *)(a), d, c)) 274 #define ins16(a,d,c) insw(a,d,c) 275 #define insl(a,d,c) (__insl((volatile uint32_t *)(a), d, c)) 276 #define ins32(a,d,c) insl(a,d,c) 277 278 #define outs8rb(a,s,c) outsb(a,s,c) 279 #define outswrb(a,s,c) (__outswrb((volatile uint16_t *)(a), s, c)) 280 #define outs16rb(a,s,c) outswrb(a,s,c) 281 #define outslrb(a,s,c) (__outslrb((volatile uint32_t *)(a), s, c)) 282 #define outs32rb(a,s,c) outslrb(a,s,c) 283 #define ins8rb(a,d,c) insb(a,d,c) 284 #define inswrb(a,d,c) (__inswrb((volatile uint16_t *)(a), d, c)) 285 #define ins16rb(a,d,c) inswrb(a,d,c) 286 #define inslrb(a,d,c) (__inslrb((volatile uint32_t *)(a), d, c)) 287 #define ins32rb(a,d,c) inslrb(a,d,c) 288 289 #undef IO_BARRIER 290 291 #endif /*_POWERPC_PIO_H_*/ 292
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