pio.h revision 1.7 1 1.7 matt /* $NetBSD: pio.h,v 1.7 2012/01/30 23:34:58 matt Exp $ */
2 1.1 briggs /* $OpenBSD: pio.h,v 1.1 1997/10/13 10:53:47 pefo Exp $ */
3 1.1 briggs
4 1.1 briggs /*
5 1.1 briggs * Copyright (c) 1997 Per Fogelstrom, Opsycon AB and RTMX Inc, USA.
6 1.1 briggs *
7 1.1 briggs * Redistribution and use in source and binary forms, with or without
8 1.1 briggs * modification, are permitted provided that the following conditions
9 1.1 briggs * are met:
10 1.1 briggs * 1. Redistributions of source code must retain the above copyright
11 1.1 briggs * notice, this list of conditions and the following disclaimer.
12 1.1 briggs * 2. Redistributions in binary form must reproduce the above copyright
13 1.1 briggs * notice, this list of conditions and the following disclaimer in the
14 1.1 briggs * documentation and/or other materials provided with the distribution.
15 1.1 briggs * 3. All advertising materials mentioning features or use of this software
16 1.1 briggs * must display the following acknowledgement:
17 1.1 briggs * This product includes software developed under OpenBSD by
18 1.1 briggs * Per Fogelstrom Opsycon AB for RTMX Inc, North Carolina, USA.
19 1.1 briggs * 4. The name of the author may not be used to endorse or promote products
20 1.1 briggs * derived from this software without specific prior written permission.
21 1.1 briggs *
22 1.1 briggs * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
23 1.1 briggs * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
24 1.1 briggs * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25 1.1 briggs * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
26 1.1 briggs * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27 1.1 briggs * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
28 1.1 briggs * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
29 1.1 briggs * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
30 1.1 briggs * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
31 1.1 briggs * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32 1.1 briggs * SUCH DAMAGE.
33 1.1 briggs *
34 1.1 briggs */
35 1.1 briggs
36 1.2 matt #ifndef _POWERPC_PIO_H_
37 1.2 matt #define _POWERPC_PIO_H_
38 1.1 briggs /*
39 1.1 briggs * I/O macros.
40 1.1 briggs */
41 1.1 briggs
42 1.7 matt static __inline void __outb(volatile uint8_t *a, uint8_t v);
43 1.7 matt static __inline void __outw(volatile uint16_t *a, uint16_t v);
44 1.7 matt static __inline void __outl(volatile uint32_t *a, uint32_t v);
45 1.7 matt static __inline void __outwrb(volatile uint16_t *a, uint16_t v);
46 1.7 matt static __inline void __outlrb(volatile uint32_t *a, uint32_t v);
47 1.7 matt static __inline uint8_t __inb(volatile uint8_t *a);
48 1.7 matt static __inline uint16_t __inw(volatile uint16_t *a);
49 1.7 matt static __inline uint32_t __inl(volatile uint32_t *a);
50 1.7 matt static __inline uint16_t __inwrb(volatile uint16_t *a);
51 1.7 matt static __inline uint32_t __inlrb(volatile uint32_t *a);
52 1.7 matt static __inline void __outsb(volatile uint8_t *, const uint8_t *, size_t);
53 1.7 matt static __inline void __outsw(volatile uint16_t *, const uint16_t *, size_t);
54 1.7 matt static __inline void __outsl(volatile uint32_t *, const uint32_t *, size_t);
55 1.7 matt static __inline void __outswrb(volatile uint16_t *, const uint16_t *, size_t);
56 1.7 matt static __inline void __outslrb(volatile uint32_t *, const uint32_t *, size_t);
57 1.7 matt static __inline void __insb(volatile uint8_t *, uint8_t *, size_t);
58 1.7 matt static __inline void __insw(volatile uint16_t *, uint16_t *, size_t);
59 1.7 matt static __inline void __insl(volatile uint32_t *, uint32_t *, size_t);
60 1.7 matt static __inline void __inswrb(volatile uint16_t *, uint16_t *, size_t);
61 1.7 matt static __inline void __inslrb(volatile uint32_t *, uint32_t *, size_t);
62 1.7 matt
63 1.7 matt static __inline void
64 1.7 matt __outb(volatile uint8_t *a, uint8_t v)
65 1.1 briggs {
66 1.1 briggs *a = v;
67 1.4 perry __asm volatile("eieio; sync");
68 1.1 briggs }
69 1.1 briggs
70 1.5 perry static __inline void
71 1.7 matt __outw(volatile uint16_t *a, uint16_t v)
72 1.1 briggs {
73 1.1 briggs *a = v;
74 1.4 perry __asm volatile("eieio; sync");
75 1.1 briggs }
76 1.1 briggs
77 1.5 perry static __inline void
78 1.7 matt __outl(volatile uint32_t *a, uint32_t v)
79 1.1 briggs {
80 1.1 briggs *a = v;
81 1.4 perry __asm volatile("eieio; sync");
82 1.1 briggs }
83 1.1 briggs
84 1.5 perry static __inline void
85 1.7 matt __outwrb(volatile uint16_t *a, uint16_t v)
86 1.1 briggs {
87 1.4 perry __asm volatile("sthbrx %0, 0, %1" :: "r"(v), "r"(a));
88 1.4 perry __asm volatile("eieio; sync");
89 1.1 briggs }
90 1.1 briggs
91 1.5 perry static __inline void
92 1.7 matt __outlrb(volatile uint32_t *a, uint32_t v)
93 1.1 briggs {
94 1.4 perry __asm volatile("stwbrx %0, 0, %1" :: "r"(v), "r"(a));
95 1.4 perry __asm volatile("eieio; sync");
96 1.1 briggs }
97 1.1 briggs
98 1.7 matt static __inline uint8_t
99 1.7 matt __inb(volatile uint8_t *a)
100 1.1 briggs {
101 1.7 matt uint8_t _v_;
102 1.1 briggs
103 1.1 briggs _v_ = *a;
104 1.4 perry __asm volatile("eieio; sync");
105 1.1 briggs return _v_;
106 1.1 briggs }
107 1.1 briggs
108 1.7 matt static __inline uint16_t
109 1.7 matt __inw(volatile uint16_t *a)
110 1.1 briggs {
111 1.7 matt uint16_t _v_;
112 1.1 briggs
113 1.1 briggs _v_ = *a;
114 1.4 perry __asm volatile("eieio; sync");
115 1.1 briggs return _v_;
116 1.1 briggs }
117 1.1 briggs
118 1.7 matt static __inline uint32_t
119 1.7 matt __inl(volatile uint32_t *a)
120 1.1 briggs {
121 1.7 matt uint32_t _v_;
122 1.1 briggs
123 1.1 briggs _v_ = *a;
124 1.4 perry __asm volatile("eieio; sync");
125 1.1 briggs return _v_;
126 1.1 briggs }
127 1.1 briggs
128 1.7 matt static __inline uint16_t
129 1.7 matt __inwrb(volatile uint16_t *a)
130 1.1 briggs {
131 1.7 matt uint16_t _v_;
132 1.1 briggs
133 1.4 perry __asm volatile("lhbrx %0, 0, %1" : "=r"(_v_) : "r"(a));
134 1.4 perry __asm volatile("eieio; sync");
135 1.1 briggs return _v_;
136 1.1 briggs }
137 1.1 briggs
138 1.7 matt static __inline uint32_t
139 1.7 matt __inlrb(volatile uint32_t *a)
140 1.1 briggs {
141 1.7 matt uint32_t _v_;
142 1.1 briggs
143 1.4 perry __asm volatile("lwbrx %0, 0, %1" : "=r"(_v_) : "r"(a));
144 1.4 perry __asm volatile("eieio; sync");
145 1.1 briggs return _v_;
146 1.1 briggs }
147 1.1 briggs
148 1.7 matt #define outb(a,v) (__outb((volatile uint8_t *)(a), v))
149 1.1 briggs #define out8(a,v) outb(a,v)
150 1.7 matt #define outw(a,v) (__outw((volatile uint16_t *)(a), v))
151 1.1 briggs #define out16(a,v) outw(a,v)
152 1.7 matt #define outl(a,v) (__outl((volatile uint32_t *)(a), v))
153 1.1 briggs #define out32(a,v) outl(a,v)
154 1.7 matt #define inb(a) (__inb((volatile uint8_t *)(a)))
155 1.1 briggs #define in8(a) inb(a)
156 1.7 matt #define inw(a) (__inw((volatile uint16_t *)(a)))
157 1.1 briggs #define in16(a) inw(a)
158 1.7 matt #define inl(a) (__inl((volatile uint32_t *)(a)))
159 1.1 briggs #define in32(a) inl(a)
160 1.1 briggs
161 1.1 briggs #define out8rb(a,v) outb(a,v)
162 1.7 matt #define outwrb(a,v) (__outwrb((volatile uint16_t *)(a), v))
163 1.1 briggs #define out16rb(a,v) outwrb(a,v)
164 1.7 matt #define outlrb(a,v) (__outlrb((volatile uint32_t *)(a), v))
165 1.1 briggs #define out32rb(a,v) outlrb(a,v)
166 1.1 briggs #define in8rb(a) inb(a)
167 1.7 matt #define inwrb(a) (__inwrb((volatile uint16_t *)(a)))
168 1.1 briggs #define in16rb(a) inwrb(a)
169 1.7 matt #define inlrb(a) (__inlrb((volatile uint32_t *)(a)))
170 1.1 briggs #define in32rb(a) inlrb(a)
171 1.1 briggs
172 1.1 briggs
173 1.5 perry static __inline void
174 1.7 matt __outsb(volatile uint8_t *a, const uint8_t *s, size_t c)
175 1.1 briggs {
176 1.1 briggs while (c--)
177 1.1 briggs *a = *s++;
178 1.4 perry __asm volatile("eieio; sync");
179 1.1 briggs }
180 1.1 briggs
181 1.5 perry static __inline void
182 1.7 matt __outsw(volatile uint16_t *a, const uint16_t *s, size_t c)
183 1.1 briggs {
184 1.1 briggs while (c--)
185 1.1 briggs *a = *s++;
186 1.4 perry __asm volatile("eieio; sync");
187 1.1 briggs }
188 1.1 briggs
189 1.5 perry static __inline void
190 1.7 matt __outsl(volatile uint32_t *a, const uint32_t *s, size_t c)
191 1.1 briggs {
192 1.1 briggs while (c--)
193 1.1 briggs *a = *s++;
194 1.4 perry __asm volatile("eieio; sync");
195 1.1 briggs }
196 1.1 briggs
197 1.5 perry static __inline void
198 1.7 matt __outswrb(volatile uint16_t *a, const uint16_t *s, size_t c)
199 1.1 briggs {
200 1.1 briggs while (c--)
201 1.4 perry __asm volatile("sthbrx %0, 0, %1" :: "r"(*s++), "r"(a));
202 1.4 perry __asm volatile("eieio; sync");
203 1.1 briggs }
204 1.1 briggs
205 1.5 perry static __inline void
206 1.7 matt __outslrb(volatile uint32_t *a, const uint32_t *s, size_t c)
207 1.1 briggs {
208 1.1 briggs while (c--)
209 1.4 perry __asm volatile("stwbrx %0, 0, %1" :: "r"(*s++), "r"(a));
210 1.4 perry __asm volatile("eieio; sync");
211 1.1 briggs }
212 1.1 briggs
213 1.5 perry static __inline void
214 1.7 matt __insb(volatile uint8_t *a, uint8_t *d, size_t c)
215 1.1 briggs {
216 1.1 briggs while (c--)
217 1.1 briggs *d++ = *a;
218 1.4 perry __asm volatile("eieio; sync");
219 1.1 briggs }
220 1.1 briggs
221 1.5 perry static __inline void
222 1.7 matt __insw(volatile uint16_t *a, uint16_t *d, size_t c)
223 1.1 briggs {
224 1.1 briggs while (c--)
225 1.1 briggs *d++ = *a;
226 1.4 perry __asm volatile("eieio; sync");
227 1.1 briggs }
228 1.1 briggs
229 1.5 perry static __inline void
230 1.7 matt __insl(volatile uint32_t *a, uint32_t *d, size_t c)
231 1.1 briggs {
232 1.1 briggs while (c--)
233 1.1 briggs *d++ = *a;
234 1.4 perry __asm volatile("eieio; sync");
235 1.1 briggs }
236 1.1 briggs
237 1.5 perry static __inline void
238 1.7 matt __inswrb(volatile uint16_t *a, uint16_t *d, size_t c)
239 1.1 briggs {
240 1.1 briggs while (c--)
241 1.4 perry __asm volatile("lhbrx %0, 0, %1" : "=r"(*d++) : "r"(a));
242 1.4 perry __asm volatile("eieio; sync");
243 1.1 briggs }
244 1.1 briggs
245 1.5 perry static __inline void
246 1.7 matt __inslrb(volatile uint32_t *a, uint32_t *d, size_t c)
247 1.1 briggs {
248 1.1 briggs while (c--)
249 1.4 perry __asm volatile("lwbrx %0, 0, %1" : "=r"(*d++) : "r"(a));
250 1.4 perry __asm volatile("eieio; sync");
251 1.1 briggs }
252 1.1 briggs
253 1.7 matt #define outsb(a,s,c) (__outsb((volatile uint8_t *)(a), s, c))
254 1.1 briggs #define outs8(a,s,c) outsb(a,s,c)
255 1.7 matt #define outsw(a,s,c) (__outsw((volatile uint16_t *)(a), s, c))
256 1.1 briggs #define outs16(a,s,c) outsw(a,s,c)
257 1.7 matt #define outsl(a,s,c) (__outsl((volatile uint32_t *)(a), s, c))
258 1.1 briggs #define outs32(a,s,c) outsl(a,s,c)
259 1.7 matt #define insb(a,d,c) (__insb((volatile uint8_t *)(a), d, c))
260 1.1 briggs #define ins8(a,d,c) insb(a,d,c)
261 1.7 matt #define insw(a,d,c) (__insw((volatile uint16_t *)(a), d, c))
262 1.1 briggs #define ins16(a,d,c) insw(a,d,c)
263 1.7 matt #define insl(a,d,c) (__insl((volatile uint32_t *)(a), d, c))
264 1.1 briggs #define ins32(a,d,c) insl(a,d,c)
265 1.1 briggs
266 1.1 briggs #define outs8rb(a,s,c) outsb(a,s,c)
267 1.7 matt #define outswrb(a,s,c) (__outswrb((volatile uint16_t *)(a), s, c))
268 1.1 briggs #define outs16rb(a,s,c) outswrb(a,s,c)
269 1.7 matt #define outslrb(a,s,c) (__outslrb((volatile uint32_t *)(a), s, c))
270 1.1 briggs #define outs32rb(a,s,c) outslrb(a,s,c)
271 1.1 briggs #define ins8rb(a,d,c) insb(a,d,c)
272 1.7 matt #define inswrb(a,d,c) (__inswrb((volatile uint16_t *)(a), d, c))
273 1.1 briggs #define ins16rb(a,d,c) inswrb(a,d,c)
274 1.7 matt #define inslrb(a,d,c) (__inslrb((volatile uint32_t *)(a), d, c))
275 1.1 briggs #define ins32rb(a,d,c) inslrb(a,d,c)
276 1.1 briggs
277 1.2 matt #endif /*_POWERPC_PIO_H_*/
278