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pio.h revision 1.9
      1  1.9     rin /*	$NetBSD: pio.h,v 1.9 2020/07/06 10:31:23 rin Exp $ */
      2  1.1  briggs /*	$OpenBSD: pio.h,v 1.1 1997/10/13 10:53:47 pefo Exp $ */
      3  1.1  briggs 
      4  1.1  briggs /*
      5  1.1  briggs  * Copyright (c) 1997 Per Fogelstrom, Opsycon AB and RTMX Inc, USA.
      6  1.1  briggs  *
      7  1.1  briggs  * Redistribution and use in source and binary forms, with or without
      8  1.1  briggs  * modification, are permitted provided that the following conditions
      9  1.1  briggs  * are met:
     10  1.1  briggs  * 1. Redistributions of source code must retain the above copyright
     11  1.1  briggs  *    notice, this list of conditions and the following disclaimer.
     12  1.1  briggs  * 2. Redistributions in binary form must reproduce the above copyright
     13  1.1  briggs  *    notice, this list of conditions and the following disclaimer in the
     14  1.1  briggs  *    documentation and/or other materials provided with the distribution.
     15  1.1  briggs  * 3. All advertising materials mentioning features or use of this software
     16  1.1  briggs  *    must display the following acknowledgement:
     17  1.1  briggs  *	This product includes software developed under OpenBSD by
     18  1.1  briggs  *	Per Fogelstrom Opsycon AB for RTMX Inc, North Carolina, USA.
     19  1.1  briggs  * 4. The name of the author may not be used to endorse or promote products
     20  1.1  briggs  *    derived from this software without specific prior written permission.
     21  1.1  briggs  *
     22  1.1  briggs  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
     23  1.1  briggs  * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
     24  1.1  briggs  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     25  1.1  briggs  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
     26  1.1  briggs  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     27  1.1  briggs  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     28  1.1  briggs  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     29  1.1  briggs  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     30  1.1  briggs  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     31  1.1  briggs  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     32  1.1  briggs  * SUCH DAMAGE.
     33  1.1  briggs  *
     34  1.1  briggs  */
     35  1.1  briggs 
     36  1.2    matt #ifndef _POWERPC_PIO_H_
     37  1.2    matt #define _POWERPC_PIO_H_
     38  1.9     rin 
     39  1.9     rin #ifdef _KERNEL_OPT
     40  1.9     rin #include "opt_ppcarch.h"
     41  1.9     rin #endif
     42  1.9     rin 
     43  1.1  briggs /*
     44  1.1  briggs  * I/O macros.
     45  1.1  briggs  */
     46  1.1  briggs 
     47  1.8     rin #if defined(PPC_IBM4XX) && !defined(PPC_IBM440)
     48  1.8     rin /* eieio is implemented as sync */
     49  1.8     rin #define IO_BARRIER() __asm volatile("sync")
     50  1.8     rin #else
     51  1.8     rin #define IO_BARRIER() __asm volatile("eieio; sync")
     52  1.8     rin #endif
     53  1.8     rin 
     54  1.7    matt static __inline void __outb(volatile uint8_t *a, uint8_t v);
     55  1.7    matt static __inline void __outw(volatile uint16_t *a, uint16_t v);
     56  1.7    matt static __inline void __outl(volatile uint32_t *a, uint32_t v);
     57  1.7    matt static __inline void __outwrb(volatile uint16_t *a, uint16_t v);
     58  1.7    matt static __inline void __outlrb(volatile uint32_t *a, uint32_t v);
     59  1.7    matt static __inline uint8_t __inb(volatile uint8_t *a);
     60  1.7    matt static __inline uint16_t __inw(volatile uint16_t *a);
     61  1.7    matt static __inline uint32_t __inl(volatile uint32_t *a);
     62  1.7    matt static __inline uint16_t __inwrb(volatile uint16_t *a);
     63  1.7    matt static __inline uint32_t __inlrb(volatile uint32_t *a);
     64  1.7    matt static __inline void __outsb(volatile uint8_t *, const uint8_t *, size_t);
     65  1.7    matt static __inline void __outsw(volatile uint16_t *, const uint16_t *, size_t);
     66  1.7    matt static __inline void __outsl(volatile uint32_t *, const uint32_t *, size_t);
     67  1.7    matt static __inline void __outswrb(volatile uint16_t *, const uint16_t *, size_t);
     68  1.7    matt static __inline void __outslrb(volatile uint32_t *, const uint32_t *, size_t);
     69  1.7    matt static __inline void __insb(volatile uint8_t *, uint8_t *, size_t);
     70  1.7    matt static __inline void __insw(volatile uint16_t *, uint16_t *, size_t);
     71  1.7    matt static __inline void __insl(volatile uint32_t *, uint32_t *, size_t);
     72  1.7    matt static __inline void __inswrb(volatile uint16_t *, uint16_t *, size_t);
     73  1.7    matt static __inline void __inslrb(volatile uint32_t *, uint32_t *, size_t);
     74  1.7    matt 
     75  1.7    matt static __inline void
     76  1.7    matt __outb(volatile uint8_t *a, uint8_t v)
     77  1.1  briggs {
     78  1.1  briggs 	*a = v;
     79  1.8     rin 	IO_BARRIER();
     80  1.1  briggs }
     81  1.1  briggs 
     82  1.5   perry static __inline void
     83  1.7    matt __outw(volatile uint16_t *a, uint16_t v)
     84  1.1  briggs {
     85  1.1  briggs 	*a = v;
     86  1.8     rin 	IO_BARRIER();
     87  1.1  briggs }
     88  1.1  briggs 
     89  1.5   perry static __inline void
     90  1.7    matt __outl(volatile uint32_t *a, uint32_t v)
     91  1.1  briggs {
     92  1.1  briggs 	*a = v;
     93  1.8     rin 	IO_BARRIER();
     94  1.1  briggs }
     95  1.1  briggs 
     96  1.5   perry static __inline void
     97  1.7    matt __outwrb(volatile uint16_t *a, uint16_t v)
     98  1.1  briggs {
     99  1.4   perry 	__asm volatile("sthbrx %0, 0, %1" :: "r"(v), "r"(a));
    100  1.8     rin 	IO_BARRIER();
    101  1.1  briggs }
    102  1.1  briggs 
    103  1.5   perry static __inline void
    104  1.7    matt __outlrb(volatile uint32_t *a, uint32_t v)
    105  1.1  briggs {
    106  1.4   perry 	__asm volatile("stwbrx %0, 0, %1" :: "r"(v), "r"(a));
    107  1.8     rin 	IO_BARRIER();
    108  1.1  briggs }
    109  1.1  briggs 
    110  1.7    matt static __inline uint8_t
    111  1.7    matt __inb(volatile uint8_t *a)
    112  1.1  briggs {
    113  1.7    matt 	uint8_t _v_;
    114  1.1  briggs 
    115  1.1  briggs 	_v_ = *a;
    116  1.8     rin 	IO_BARRIER();
    117  1.1  briggs 	return _v_;
    118  1.1  briggs }
    119  1.1  briggs 
    120  1.7    matt static __inline uint16_t
    121  1.7    matt __inw(volatile uint16_t *a)
    122  1.1  briggs {
    123  1.7    matt 	uint16_t _v_;
    124  1.1  briggs 
    125  1.1  briggs 	_v_ = *a;
    126  1.8     rin 	IO_BARRIER();
    127  1.1  briggs 	return _v_;
    128  1.1  briggs }
    129  1.1  briggs 
    130  1.7    matt static __inline uint32_t
    131  1.7    matt __inl(volatile uint32_t *a)
    132  1.1  briggs {
    133  1.7    matt 	uint32_t _v_;
    134  1.1  briggs 
    135  1.1  briggs 	_v_ = *a;
    136  1.8     rin 	IO_BARRIER();
    137  1.1  briggs 	return _v_;
    138  1.1  briggs }
    139  1.1  briggs 
    140  1.7    matt static __inline uint16_t
    141  1.7    matt __inwrb(volatile uint16_t *a)
    142  1.1  briggs {
    143  1.7    matt 	uint16_t _v_;
    144  1.1  briggs 
    145  1.4   perry 	__asm volatile("lhbrx %0, 0, %1" : "=r"(_v_) : "r"(a));
    146  1.8     rin 	IO_BARRIER();
    147  1.1  briggs 	return _v_;
    148  1.1  briggs }
    149  1.1  briggs 
    150  1.7    matt static __inline uint32_t
    151  1.7    matt __inlrb(volatile uint32_t *a)
    152  1.1  briggs {
    153  1.7    matt 	uint32_t _v_;
    154  1.1  briggs 
    155  1.4   perry 	__asm volatile("lwbrx %0, 0, %1" : "=r"(_v_) : "r"(a));
    156  1.8     rin 	IO_BARRIER();
    157  1.1  briggs 	return _v_;
    158  1.1  briggs }
    159  1.1  briggs 
    160  1.7    matt #define	outb(a,v)	(__outb((volatile uint8_t *)(a), v))
    161  1.1  briggs #define	out8(a,v)	outb(a,v)
    162  1.7    matt #define	outw(a,v)	(__outw((volatile uint16_t *)(a), v))
    163  1.1  briggs #define	out16(a,v)	outw(a,v)
    164  1.7    matt #define	outl(a,v)	(__outl((volatile uint32_t *)(a), v))
    165  1.1  briggs #define	out32(a,v)	outl(a,v)
    166  1.7    matt #define	inb(a)		(__inb((volatile uint8_t *)(a)))
    167  1.1  briggs #define	in8(a)		inb(a)
    168  1.7    matt #define	inw(a)		(__inw((volatile uint16_t *)(a)))
    169  1.1  briggs #define	in16(a)		inw(a)
    170  1.7    matt #define	inl(a)		(__inl((volatile uint32_t *)(a)))
    171  1.1  briggs #define	in32(a)		inl(a)
    172  1.1  briggs 
    173  1.1  briggs #define	out8rb(a,v)	outb(a,v)
    174  1.7    matt #define	outwrb(a,v)	(__outwrb((volatile uint16_t *)(a), v))
    175  1.1  briggs #define	out16rb(a,v)	outwrb(a,v)
    176  1.7    matt #define	outlrb(a,v)	(__outlrb((volatile uint32_t *)(a), v))
    177  1.1  briggs #define	out32rb(a,v)	outlrb(a,v)
    178  1.1  briggs #define	in8rb(a)	inb(a)
    179  1.7    matt #define	inwrb(a)	(__inwrb((volatile uint16_t *)(a)))
    180  1.1  briggs #define	in16rb(a)	inwrb(a)
    181  1.7    matt #define	inlrb(a)	(__inlrb((volatile uint32_t *)(a)))
    182  1.1  briggs #define	in32rb(a)	inlrb(a)
    183  1.1  briggs 
    184  1.1  briggs 
    185  1.5   perry static __inline void
    186  1.7    matt __outsb(volatile uint8_t *a, const uint8_t *s, size_t c)
    187  1.1  briggs {
    188  1.1  briggs 	while (c--)
    189  1.1  briggs 		*a = *s++;
    190  1.8     rin 	IO_BARRIER();
    191  1.1  briggs }
    192  1.1  briggs 
    193  1.5   perry static __inline void
    194  1.7    matt __outsw(volatile uint16_t *a, const uint16_t *s, size_t c)
    195  1.1  briggs {
    196  1.1  briggs 	while (c--)
    197  1.1  briggs 		*a = *s++;
    198  1.8     rin 	IO_BARRIER();
    199  1.1  briggs }
    200  1.1  briggs 
    201  1.5   perry static __inline void
    202  1.7    matt __outsl(volatile uint32_t *a, const uint32_t *s, size_t c)
    203  1.1  briggs {
    204  1.1  briggs 	while (c--)
    205  1.1  briggs 		*a = *s++;
    206  1.8     rin 	IO_BARRIER();
    207  1.1  briggs }
    208  1.1  briggs 
    209  1.5   perry static __inline void
    210  1.7    matt __outswrb(volatile uint16_t *a, const uint16_t *s, size_t c)
    211  1.1  briggs {
    212  1.1  briggs 	while (c--)
    213  1.4   perry 		__asm volatile("sthbrx %0, 0, %1" :: "r"(*s++), "r"(a));
    214  1.8     rin 	IO_BARRIER();
    215  1.1  briggs }
    216  1.1  briggs 
    217  1.5   perry static __inline void
    218  1.7    matt __outslrb(volatile uint32_t *a, const uint32_t *s, size_t c)
    219  1.1  briggs {
    220  1.1  briggs 	while (c--)
    221  1.4   perry 		__asm volatile("stwbrx %0, 0, %1" :: "r"(*s++), "r"(a));
    222  1.8     rin 	IO_BARRIER();
    223  1.1  briggs }
    224  1.1  briggs 
    225  1.5   perry static __inline void
    226  1.7    matt __insb(volatile uint8_t *a, uint8_t *d, size_t c)
    227  1.1  briggs {
    228  1.1  briggs 	while (c--)
    229  1.1  briggs 		*d++ = *a;
    230  1.8     rin 	IO_BARRIER();
    231  1.1  briggs }
    232  1.1  briggs 
    233  1.5   perry static __inline void
    234  1.7    matt __insw(volatile uint16_t *a, uint16_t *d, size_t c)
    235  1.1  briggs {
    236  1.1  briggs 	while (c--)
    237  1.1  briggs 		*d++ = *a;
    238  1.8     rin 	IO_BARRIER();
    239  1.1  briggs }
    240  1.1  briggs 
    241  1.5   perry static __inline void
    242  1.7    matt __insl(volatile uint32_t *a, uint32_t *d, size_t c)
    243  1.1  briggs {
    244  1.1  briggs 	while (c--)
    245  1.1  briggs 		*d++ = *a;
    246  1.8     rin 	IO_BARRIER();
    247  1.1  briggs }
    248  1.1  briggs 
    249  1.5   perry static __inline void
    250  1.7    matt __inswrb(volatile uint16_t *a, uint16_t *d, size_t c)
    251  1.1  briggs {
    252  1.1  briggs 	while (c--)
    253  1.4   perry 		__asm volatile("lhbrx %0, 0, %1" : "=r"(*d++) : "r"(a));
    254  1.8     rin 	IO_BARRIER();
    255  1.1  briggs }
    256  1.1  briggs 
    257  1.5   perry static __inline void
    258  1.7    matt __inslrb(volatile uint32_t *a, uint32_t *d, size_t c)
    259  1.1  briggs {
    260  1.1  briggs 	while (c--)
    261  1.4   perry 		__asm volatile("lwbrx %0, 0, %1" : "=r"(*d++) : "r"(a));
    262  1.8     rin 	IO_BARRIER();
    263  1.1  briggs }
    264  1.1  briggs 
    265  1.7    matt #define	outsb(a,s,c)	(__outsb((volatile uint8_t *)(a), s, c))
    266  1.1  briggs #define	outs8(a,s,c)	outsb(a,s,c)
    267  1.7    matt #define	outsw(a,s,c)	(__outsw((volatile uint16_t *)(a), s, c))
    268  1.1  briggs #define	outs16(a,s,c)	outsw(a,s,c)
    269  1.7    matt #define	outsl(a,s,c)	(__outsl((volatile uint32_t *)(a), s, c))
    270  1.1  briggs #define	outs32(a,s,c)	outsl(a,s,c)
    271  1.7    matt #define	insb(a,d,c)	(__insb((volatile uint8_t *)(a), d, c))
    272  1.1  briggs #define	ins8(a,d,c)	insb(a,d,c)
    273  1.7    matt #define	insw(a,d,c)	(__insw((volatile uint16_t *)(a), d, c))
    274  1.1  briggs #define	ins16(a,d,c)	insw(a,d,c)
    275  1.7    matt #define	insl(a,d,c)	(__insl((volatile uint32_t *)(a), d, c))
    276  1.1  briggs #define	ins32(a,d,c)	insl(a,d,c)
    277  1.1  briggs 
    278  1.1  briggs #define	outs8rb(a,s,c)	outsb(a,s,c)
    279  1.7    matt #define	outswrb(a,s,c)	(__outswrb((volatile uint16_t *)(a), s, c))
    280  1.1  briggs #define	outs16rb(a,s,c)	outswrb(a,s,c)
    281  1.7    matt #define	outslrb(a,s,c)	(__outslrb((volatile uint32_t *)(a), s, c))
    282  1.1  briggs #define	outs32rb(a,s,c)	outslrb(a,s,c)
    283  1.1  briggs #define	ins8rb(a,d,c)	insb(a,d,c)
    284  1.7    matt #define	inswrb(a,d,c)	(__inswrb((volatile uint16_t *)(a), d, c))
    285  1.1  briggs #define	ins16rb(a,d,c)	inswrb(a,d,c)
    286  1.7    matt #define	inslrb(a,d,c)	(__inslrb((volatile uint32_t *)(a), d, c))
    287  1.1  briggs #define	ins32rb(a,d,c)	inslrb(a,d,c)
    288  1.1  briggs 
    289  1.8     rin #undef IO_BARRIER
    290  1.8     rin 
    291  1.2    matt #endif /*_POWERPC_PIO_H_*/
    292