pio.h revision 1.8
1 /* $NetBSD: pio.h,v 1.8 2020/02/20 05:10:01 rin Exp $ */ 2 /* $OpenBSD: pio.h,v 1.1 1997/10/13 10:53:47 pefo Exp $ */ 3 4 /* 5 * Copyright (c) 1997 Per Fogelstrom, Opsycon AB and RTMX Inc, USA. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. All advertising materials mentioning features or use of this software 16 * must display the following acknowledgement: 17 * This product includes software developed under OpenBSD by 18 * Per Fogelstrom Opsycon AB for RTMX Inc, North Carolina, USA. 19 * 4. The name of the author may not be used to endorse or promote products 20 * derived from this software without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS 23 * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 24 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY 26 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 * 34 */ 35 36 #ifndef _POWERPC_PIO_H_ 37 #define _POWERPC_PIO_H_ 38 /* 39 * I/O macros. 40 */ 41 42 #if defined(PPC_IBM4XX) && !defined(PPC_IBM440) 43 /* eieio is implemented as sync */ 44 #define IO_BARRIER() __asm volatile("sync") 45 #else 46 #define IO_BARRIER() __asm volatile("eieio; sync") 47 #endif 48 49 static __inline void __outb(volatile uint8_t *a, uint8_t v); 50 static __inline void __outw(volatile uint16_t *a, uint16_t v); 51 static __inline void __outl(volatile uint32_t *a, uint32_t v); 52 static __inline void __outwrb(volatile uint16_t *a, uint16_t v); 53 static __inline void __outlrb(volatile uint32_t *a, uint32_t v); 54 static __inline uint8_t __inb(volatile uint8_t *a); 55 static __inline uint16_t __inw(volatile uint16_t *a); 56 static __inline uint32_t __inl(volatile uint32_t *a); 57 static __inline uint16_t __inwrb(volatile uint16_t *a); 58 static __inline uint32_t __inlrb(volatile uint32_t *a); 59 static __inline void __outsb(volatile uint8_t *, const uint8_t *, size_t); 60 static __inline void __outsw(volatile uint16_t *, const uint16_t *, size_t); 61 static __inline void __outsl(volatile uint32_t *, const uint32_t *, size_t); 62 static __inline void __outswrb(volatile uint16_t *, const uint16_t *, size_t); 63 static __inline void __outslrb(volatile uint32_t *, const uint32_t *, size_t); 64 static __inline void __insb(volatile uint8_t *, uint8_t *, size_t); 65 static __inline void __insw(volatile uint16_t *, uint16_t *, size_t); 66 static __inline void __insl(volatile uint32_t *, uint32_t *, size_t); 67 static __inline void __inswrb(volatile uint16_t *, uint16_t *, size_t); 68 static __inline void __inslrb(volatile uint32_t *, uint32_t *, size_t); 69 70 static __inline void 71 __outb(volatile uint8_t *a, uint8_t v) 72 { 73 *a = v; 74 IO_BARRIER(); 75 } 76 77 static __inline void 78 __outw(volatile uint16_t *a, uint16_t v) 79 { 80 *a = v; 81 IO_BARRIER(); 82 } 83 84 static __inline void 85 __outl(volatile uint32_t *a, uint32_t v) 86 { 87 *a = v; 88 IO_BARRIER(); 89 } 90 91 static __inline void 92 __outwrb(volatile uint16_t *a, uint16_t v) 93 { 94 __asm volatile("sthbrx %0, 0, %1" :: "r"(v), "r"(a)); 95 IO_BARRIER(); 96 } 97 98 static __inline void 99 __outlrb(volatile uint32_t *a, uint32_t v) 100 { 101 __asm volatile("stwbrx %0, 0, %1" :: "r"(v), "r"(a)); 102 IO_BARRIER(); 103 } 104 105 static __inline uint8_t 106 __inb(volatile uint8_t *a) 107 { 108 uint8_t _v_; 109 110 _v_ = *a; 111 IO_BARRIER(); 112 return _v_; 113 } 114 115 static __inline uint16_t 116 __inw(volatile uint16_t *a) 117 { 118 uint16_t _v_; 119 120 _v_ = *a; 121 IO_BARRIER(); 122 return _v_; 123 } 124 125 static __inline uint32_t 126 __inl(volatile uint32_t *a) 127 { 128 uint32_t _v_; 129 130 _v_ = *a; 131 IO_BARRIER(); 132 return _v_; 133 } 134 135 static __inline uint16_t 136 __inwrb(volatile uint16_t *a) 137 { 138 uint16_t _v_; 139 140 __asm volatile("lhbrx %0, 0, %1" : "=r"(_v_) : "r"(a)); 141 IO_BARRIER(); 142 return _v_; 143 } 144 145 static __inline uint32_t 146 __inlrb(volatile uint32_t *a) 147 { 148 uint32_t _v_; 149 150 __asm volatile("lwbrx %0, 0, %1" : "=r"(_v_) : "r"(a)); 151 IO_BARRIER(); 152 return _v_; 153 } 154 155 #define outb(a,v) (__outb((volatile uint8_t *)(a), v)) 156 #define out8(a,v) outb(a,v) 157 #define outw(a,v) (__outw((volatile uint16_t *)(a), v)) 158 #define out16(a,v) outw(a,v) 159 #define outl(a,v) (__outl((volatile uint32_t *)(a), v)) 160 #define out32(a,v) outl(a,v) 161 #define inb(a) (__inb((volatile uint8_t *)(a))) 162 #define in8(a) inb(a) 163 #define inw(a) (__inw((volatile uint16_t *)(a))) 164 #define in16(a) inw(a) 165 #define inl(a) (__inl((volatile uint32_t *)(a))) 166 #define in32(a) inl(a) 167 168 #define out8rb(a,v) outb(a,v) 169 #define outwrb(a,v) (__outwrb((volatile uint16_t *)(a), v)) 170 #define out16rb(a,v) outwrb(a,v) 171 #define outlrb(a,v) (__outlrb((volatile uint32_t *)(a), v)) 172 #define out32rb(a,v) outlrb(a,v) 173 #define in8rb(a) inb(a) 174 #define inwrb(a) (__inwrb((volatile uint16_t *)(a))) 175 #define in16rb(a) inwrb(a) 176 #define inlrb(a) (__inlrb((volatile uint32_t *)(a))) 177 #define in32rb(a) inlrb(a) 178 179 180 static __inline void 181 __outsb(volatile uint8_t *a, const uint8_t *s, size_t c) 182 { 183 while (c--) 184 *a = *s++; 185 IO_BARRIER(); 186 } 187 188 static __inline void 189 __outsw(volatile uint16_t *a, const uint16_t *s, size_t c) 190 { 191 while (c--) 192 *a = *s++; 193 IO_BARRIER(); 194 } 195 196 static __inline void 197 __outsl(volatile uint32_t *a, const uint32_t *s, size_t c) 198 { 199 while (c--) 200 *a = *s++; 201 IO_BARRIER(); 202 } 203 204 static __inline void 205 __outswrb(volatile uint16_t *a, const uint16_t *s, size_t c) 206 { 207 while (c--) 208 __asm volatile("sthbrx %0, 0, %1" :: "r"(*s++), "r"(a)); 209 IO_BARRIER(); 210 } 211 212 static __inline void 213 __outslrb(volatile uint32_t *a, const uint32_t *s, size_t c) 214 { 215 while (c--) 216 __asm volatile("stwbrx %0, 0, %1" :: "r"(*s++), "r"(a)); 217 IO_BARRIER(); 218 } 219 220 static __inline void 221 __insb(volatile uint8_t *a, uint8_t *d, size_t c) 222 { 223 while (c--) 224 *d++ = *a; 225 IO_BARRIER(); 226 } 227 228 static __inline void 229 __insw(volatile uint16_t *a, uint16_t *d, size_t c) 230 { 231 while (c--) 232 *d++ = *a; 233 IO_BARRIER(); 234 } 235 236 static __inline void 237 __insl(volatile uint32_t *a, uint32_t *d, size_t c) 238 { 239 while (c--) 240 *d++ = *a; 241 IO_BARRIER(); 242 } 243 244 static __inline void 245 __inswrb(volatile uint16_t *a, uint16_t *d, size_t c) 246 { 247 while (c--) 248 __asm volatile("lhbrx %0, 0, %1" : "=r"(*d++) : "r"(a)); 249 IO_BARRIER(); 250 } 251 252 static __inline void 253 __inslrb(volatile uint32_t *a, uint32_t *d, size_t c) 254 { 255 while (c--) 256 __asm volatile("lwbrx %0, 0, %1" : "=r"(*d++) : "r"(a)); 257 IO_BARRIER(); 258 } 259 260 #define outsb(a,s,c) (__outsb((volatile uint8_t *)(a), s, c)) 261 #define outs8(a,s,c) outsb(a,s,c) 262 #define outsw(a,s,c) (__outsw((volatile uint16_t *)(a), s, c)) 263 #define outs16(a,s,c) outsw(a,s,c) 264 #define outsl(a,s,c) (__outsl((volatile uint32_t *)(a), s, c)) 265 #define outs32(a,s,c) outsl(a,s,c) 266 #define insb(a,d,c) (__insb((volatile uint8_t *)(a), d, c)) 267 #define ins8(a,d,c) insb(a,d,c) 268 #define insw(a,d,c) (__insw((volatile uint16_t *)(a), d, c)) 269 #define ins16(a,d,c) insw(a,d,c) 270 #define insl(a,d,c) (__insl((volatile uint32_t *)(a), d, c)) 271 #define ins32(a,d,c) insl(a,d,c) 272 273 #define outs8rb(a,s,c) outsb(a,s,c) 274 #define outswrb(a,s,c) (__outswrb((volatile uint16_t *)(a), s, c)) 275 #define outs16rb(a,s,c) outswrb(a,s,c) 276 #define outslrb(a,s,c) (__outslrb((volatile uint32_t *)(a), s, c)) 277 #define outs32rb(a,s,c) outslrb(a,s,c) 278 #define ins8rb(a,d,c) insb(a,d,c) 279 #define inswrb(a,d,c) (__inswrb((volatile uint16_t *)(a), d, c)) 280 #define ins16rb(a,d,c) inswrb(a,d,c) 281 #define inslrb(a,d,c) (__inslrb((volatile uint32_t *)(a), d, c)) 282 #define ins32rb(a,d,c) inslrb(a,d,c) 283 284 #undef IO_BARRIER 285 286 #endif /*_POWERPC_PIO_H_*/ 287
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