1 /* 11/02/95 */ 2 /*----------------------------------------------------------------------------*/ 3 /* Plug and Play header definitions */ 4 /*----------------------------------------------------------------------------*/ 5 6 /* Structure map for PnP on PowerPC Reference Platform */ 7 /* See Plug and Play ISA Specification, Version 1.0, May 28, 1993. It */ 8 /* (or later versions) is available on Compuserve in the PLUGPLAY area. */ 9 /* This code has extensions to that specification, namely new short and */ 10 /* long tag types for platform dependent information */ 11 12 /* Warning: LE notation used throughout this file */ 13 14 /* For enum's: if given in hex then they are bit significant, i.e. */ 15 /* only one bit is on for each enum */ 16 17 #ifndef _PNP_ 18 #define _PNP_ 19 20 #ifndef __ASSEMBLY__ 21 #define MAX_MEM_REGISTERS 9 22 #define MAX_IO_PORTS 20 23 #define MAX_IRQS 7 24 /*#define MAX_DMA_CHANNELS 7*/ 25 26 /* Interrupt controllers */ 27 28 #define PNPinterrupt0 "PNP0000" /* AT Interrupt Controller */ 29 #define PNPinterrupt1 "PNP0001" /* EISA Interrupt Controller */ 30 #define PNPinterrupt2 "PNP0002" /* MCA Interrupt Controller */ 31 #define PNPinterrupt3 "PNP0003" /* APIC */ 32 #define PNPExtInt "IBM000D" /* PowerPC Extended Interrupt Controller */ 33 34 /* Timers */ 35 36 #define PNPtimer0 "PNP0100" /* AT Timer */ 37 #define PNPtimer1 "PNP0101" /* EISA Timer */ 38 #define PNPtimer2 "PNP0102" /* MCA Timer */ 39 40 /* DMA controllers */ 41 42 #define PNPdma0 "PNP0200" /* AT DMA Controller */ 43 #define PNPdma1 "PNP0201" /* EISA DMA Controller */ 44 #define PNPdma2 "PNP0202" /* MCA DMA Controller */ 45 46 /* start of August 15, 1994 additions */ 47 /* CMOS */ 48 #define PNPCMOS "IBM0009" /* CMOS */ 49 50 /* L2 Cache */ 51 #define PNPL2 "IBM0007" /* L2 Cache */ 52 53 /* NVRAM */ 54 #define PNPNVRAM "IBM0008" /* NVRAM */ 55 56 /* Power Management */ 57 #define PNPPM "IBM0005" /* Power Management */ 58 /* end of August 15, 1994 additions */ 59 60 /* Keyboards */ 61 62 #define PNPkeyboard0 "PNP0300" /* IBM PC/XT KB Cntlr (83 key, no mouse) */ 63 #define PNPkeyboard1 "PNP0301" /* Olivetti ICO (102 key) */ 64 #define PNPkeyboard2 "PNP0302" /* IBM PC/AT KB Cntlr (84 key) */ 65 #define PNPkeyboard3 "PNP0303" /* IBM Enhanced (101/2 key, PS/2 mouse) */ 66 #define PNPkeyboard4 "PNP0304" /* Nokia 1050 KB Cntlr */ 67 #define PNPkeyboard5 "PNP0305" /* Nokia 9140 KB Cntlr */ 68 #define PNPkeyboard6 "PNP0306" /* Standard Japanese KB Cntlr */ 69 #define PNPkeyboard7 "PNP0307" /* Microsoft Windows (R) KB Cntlr */ 70 71 /* Parallel port controllers */ 72 73 #define PNPparallel0 "PNP0400" /* Standard LPT Parallel Port */ 74 #define PNPparallel1 "PNP0401" /* ECP Parallel Port */ 75 #define PNPepp "IBM001C" /* EPP Parallel Port */ 76 77 /* Serial port controllers */ 78 79 #define PNPserial0 "PNP0500" /* Standard PC Serial port */ 80 #define PNPSerial1 "PNP0501" /* 16550A Compatible Serial port */ 81 82 /* Disk controllers */ 83 84 #define PNPdisk0 "PNP0600" /* Generic ESDI/IDE/ATA Compat HD Cntlr */ 85 #define PNPdisk1 "PNP0601" /* Plus Hardcard II */ 86 #define PNPdisk2 "PNP0602" /* Plus Hardcard IIXL/EZ */ 87 88 /* Diskette controllers */ 89 90 #define PNPdiskette0 "PNP0700" /* PC Standard Floppy Disk Controller */ 91 92 /* Display controllers */ 93 94 #define PNPdisplay0 "PNP0900" /* VGA Compatible */ 95 #define PNPdisplay1 "PNP0901" /* Video Seven VGA */ 96 #define PNPdisplay2 "PNP0902" /* 8514/A Compatible */ 97 #define PNPdisplay3 "PNP0903" /* Trident VGA */ 98 #define PNPdisplay4 "PNP0904" /* Cirrus Logic Laptop VGA */ 99 #define PNPdisplay5 "PNP0905" /* Cirrus Logic VGA */ 100 #define PNPdisplay6 "PNP0906" /* Tseng ET4000 or ET4000/W32 */ 101 #define PNPdisplay7 "PNP0907" /* Western Digital VGA */ 102 #define PNPdisplay8 "PNP0908" /* Western Digital Laptop VGA */ 103 #define PNPdisplay9 "PNP0909" /* S3 */ 104 #define PNPdisplayA "PNP090A" /* ATI Ultra Pro/Plus (Mach 32) */ 105 #define PNPdisplayB "PNP090B" /* ATI Ultra (Mach 8) */ 106 #define PNPdisplayC "PNP090C" /* XGA Compatible */ 107 #define PNPdisplayD "PNP090D" /* ATI VGA Wonder */ 108 #define PNPdisplayE "PNP090E" /* Weitek P9000 Graphics Adapter */ 109 #define PNPdisplayF "PNP090F" /* Oak Technology VGA */ 110 111 /* Peripheral busses */ 112 113 #define PNPbuses0 "PNP0A00" /* ISA Bus */ 114 #define PNPbuses1 "PNP0A01" /* EISA Bus */ 115 #define PNPbuses2 "PNP0A02" /* MCA Bus */ 116 #define PNPbuses3 "PNP0A03" /* PCI Bus */ 117 #define PNPbuses4 "PNP0A04" /* VESA/VL Bus */ 118 119 /* RTC, BIOS, planar devices */ 120 121 #define PNPspeaker0 "PNP0800" /* AT Style Speaker Sound */ 122 #define PNPrtc0 "PNP0B00" /* AT RTC */ 123 #define PNPpnpbios0 "PNP0C00" /* PNP BIOS (only created by root enum) */ 124 #define PNPpnpbios1 "PNP0C01" /* System Board Memory Device */ 125 #define PNPpnpbios2 "PNP0C02" /* Math Coprocessor */ 126 #define PNPpnpbios3 "PNP0C03" /* PNP BIOS Event Notification Interrupt */ 127 128 /* PCMCIA controller */ 129 130 #define PNPpcmcia0 "PNP0E00" /* Intel 82365 Compatible PCMCIA Cntlr */ 131 132 /* Mice */ 133 134 #define PNPmouse0 "PNP0F00" /* Microsoft Bus Mouse */ 135 #define PNPmouse1 "PNP0F01" /* Microsoft Serial Mouse */ 136 #define PNPmouse2 "PNP0F02" /* Microsoft Inport Mouse */ 137 #define PNPmouse3 "PNP0F03" /* Microsoft PS/2 Mouse */ 138 #define PNPmouse4 "PNP0F04" /* Mousesystems Mouse */ 139 #define PNPmouse5 "PNP0F05" /* Mousesystems 3 Button Mouse - COM2 */ 140 #define PNPmouse6 "PNP0F06" /* Genius Mouse - COM1 */ 141 #define PNPmouse7 "PNP0F07" /* Genius Mouse - COM2 */ 142 #define PNPmouse8 "PNP0F08" /* Logitech Serial Mouse */ 143 #define PNPmouse9 "PNP0F09" /* Microsoft Ballpoint Serial Mouse */ 144 #define PNPmouseA "PNP0F0A" /* Microsoft PNP Mouse */ 145 #define PNPmouseB "PNP0F0B" /* Microsoft PNP Ballpoint Mouse */ 146 147 /* Modems */ 148 149 #define PNPmodem0 "PNP9000" /* Specific IDs TBD */ 150 151 /* Network controllers */ 152 153 #define PNPnetworkC9 "PNP80C9" /* IBM Token Ring */ 154 #define PNPnetworkCA "PNP80CA" /* IBM Token Ring II */ 155 #define PNPnetworkCB "PNP80CB" /* IBM Token Ring II/Short */ 156 #define PNPnetworkCC "PNP80CC" /* IBM Token Ring 4/16Mbs */ 157 #define PNPnetwork27 "PNP8327" /* IBM Token Ring (All types) */ 158 #define PNPnetworket "IBM0010" /* IBM Ethernet used by Power PC */ 159 #define PNPneteisaet "IBM2001" /* IBM Ethernet EISA adapter */ 160 #define PNPAMD79C970 "IBM0016" /* AMD 79C970 (PCI Ethernet) */ 161 162 /* SCSI controllers */ 163 164 #define PNPscsi0 "PNPA000" /* Adaptec 154x Compatible SCSI Cntlr */ 165 #define PNPscsi1 "PNPA001" /* Adaptec 174x Compatible SCSI Cntlr */ 166 #define PNPscsi2 "PNPA002" /* Future Domain 16-700 Compat SCSI Cntlr*/ 167 #define PNPscsi3 "PNPA003" /* Panasonic CDROM Adapter (SBPro/SB16) */ 168 #define PNPscsiF "IBM000F" /* NCR 810 SCSI Controller */ 169 #define PNPscsi825 "IBM001B" /* NCR 825 SCSI Controller */ 170 #define PNPscsi875 "IBM0018" /* NCR 875 SCSI Controller */ 171 172 /* Sound/Video, Multimedia */ 173 174 #define PNPmm0 "PNPB000" /* Sound Blaster Compatible Sound Device */ 175 #define PNPmm1 "PNPB001" /* MS Windows Sound System Compat Device */ 176 #define PNPmmF "IBM000E" /* Crystal CS4231 Audio Device */ 177 #define PNPv7310 "IBM0015" /* ASCII V7310 Video Capture Device */ 178 #define PNPmm4232 "IBM0017" /* Crystal CS4232 Audio Device */ 179 #define PNPpmsyn "IBM001D" /* YMF 289B chip (Yamaha) */ 180 #define PNPgp4232 "IBM0012" /* Crystal CS4232 Game Port */ 181 #define PNPmidi4232 "IBM0013" /* Crystal CS4232 MIDI */ 182 183 /* Operator Panel */ 184 #define PNPopctl "IBM000B" /* Operator's panel */ 185 186 /* Service Processor */ 187 #define PNPsp "IBM0011" /* IBM Service Processor */ 188 #define PNPLTsp "IBM001E" /* Lightning/Terlingua Support Processor */ 189 #define PNPLTmsp "IBM001F" /* Lightning/Terlingua Mini-SP */ 190 191 /* Memory Controller */ 192 #define PNPmemctl "IBM000A" /* Memory controller */ 193 194 /* Graphics Assist */ 195 #define PNPg_assist "IBM0014" /* Graphics Assist */ 196 197 /* Miscellaneous Device Controllers */ 198 #define PNPtablet "IBM0019" /* IBM Tablet Controller */ 199 200 /* PNP Packet Handles */ 201 202 #define S1_Packet 0x0A /* Version resource */ 203 #define S2_Packet 0x15 /* Logical DEVID (without flags) */ 204 #define S2_Packet_flags 0x16 /* Logical DEVID (with flags) */ 205 #define S3_Packet 0x1C /* Compatible device ID */ 206 #define S4_Packet 0x22 /* IRQ resource (without flags) */ 207 #define S4_Packet_flags 0x23 /* IRQ resource (with flags) */ 208 #define S5_Packet 0x2A /* DMA resource */ 209 #define S6_Packet 0x30 /* Depend funct start (w/o priority) */ 210 #define S6_Packet_priority 0x31 /* Depend funct start (w/ priority) */ 211 #define S7_Packet 0x38 /* Depend funct end */ 212 #define S8_Packet 0x47 /* I/O port resource (w/o fixed loc) */ 213 #define S9_Packet_fixed 0x4B /* I/O port resource (w/ fixed loc) */ 214 #define S14_Packet 0x71 /* Vendor defined */ 215 #define S15_Packet 0x78 /* End of resource (w/o checksum) */ 216 #define S15_Packet_checksum 0x79 /* End of resource (w/ checksum) */ 217 #define L1_Packet 0x81 /* Memory range */ 218 #define L1_Shadow 0x20 /* Memory is shadowable */ 219 #define L1_32bit_mem 0x18 /* 32-bit memory only */ 220 #define L1_8_16bit_mem 0x10 /* 8- and 16-bit supported */ 221 #define L1_Decode_Hi 0x04 /* decode supports high address */ 222 #define L1_Cache 0x02 /* read cacheable, write-through */ 223 #define L1_Writable 0x01 /* Memory is writable */ 224 #define L2_Packet 0x82 /* ANSI ID string */ 225 #define L3_Packet 0x83 /* Unicode ID string */ 226 #define L4_Packet 0x84 /* Vendor defined */ 227 #define L5_Packet 0x85 /* Large I/O */ 228 #define L6_Packet 0x86 /* 32-bit Fixed Loc Mem Range Desc */ 229 #define END_TAG 0x78 /* End of resource */ 230 #define DF_START_TAG 0x30 /* Dependent function start */ 231 #define DF_START_TAG_priority 0x31 /* Dependent function start */ 232 #define DF_END_TAG 0x38 /* Dependent function end */ 233 #define SUBOPTIMAL_CONFIGURATION 0x2 /* Priority byte sub optimal config */ 234 235 /* Device Base Type Codes */ 236 237 typedef enum _PnP_BASE_TYPE { 238 Reserved = 0, 239 MassStorageDevice = 1, 240 NetworkInterfaceController = 2, 241 DisplayController = 3, 242 MultimediaController = 4, 243 MemoryController = 5, 244 BridgeController = 6, 245 CommunicationsDevice = 7, 246 SystemPeripheral = 8, 247 InputDevice = 9, 248 ServiceProcessor = 0x0A, /* 11/2/95 */ 249 } PnP_BASE_TYPE; 250 251 /* Device Sub Type Codes */ 252 253 typedef enum _PnP_SUB_TYPE { 254 SCSIController = 0, 255 IDEController = 1, 256 FloppyController = 2, 257 IPIController = 3, 258 OtherMassStorageController = 0x80, 259 260 EthernetController = 0, 261 TokenRingController = 1, 262 FDDIController = 2, 263 OtherNetworkController = 0x80, 264 265 VGAController= 0, 266 SVGAController= 1, 267 XGAController= 2, 268 OtherDisplayController = 0x80, 269 270 VideoController = 0, 271 AudioController = 1, 272 OtherMultimediaController = 0x80, 273 274 RAM = 0, 275 FLASH = 1, 276 OtherMemoryDevice = 0x80, 277 278 HostProcessorBridge = 0, 279 ISABridge = 1, 280 EISABridge = 2, 281 MicroChannelBridge = 3, 282 PCIBridge = 4, 283 PCMCIABridge = 5, 284 VMEBridge = 6, 285 OtherBridgeDevice = 0x80, 286 287 RS232Device = 0, 288 ATCompatibleParallelPort = 1, 289 OtherCommunicationsDevice = 0x80, 290 291 ProgrammableInterruptController = 0, 292 DMAController = 1, 293 SystemTimer = 2, 294 RealTimeClock = 3, 295 L2Cache = 4, 296 NVRAM = 5, 297 PowerManagement = 6, 298 CMOS = 7, 299 OperatorPanel = 8, 300 ServiceProcessorClass1 = 9, 301 ServiceProcessorClass2 = 0xA, 302 ServiceProcessorClass3 = 0xB, 303 GraphicAssist = 0xC, 304 SystemPlanar = 0xF, /* 10/5/95 */ 305 OtherSystemPeripheral = 0x80, 306 307 KeyboardController = 0, 308 Digitizer = 1, 309 MouseController = 2, 310 TabletController = 3, /* 10/27/95 */ 311 OtherInputController = 0x80, 312 313 GeneralMemoryController = 0, 314 } PnP_SUB_TYPE; 315 316 /* Device Interface Type Codes */ 317 318 typedef enum _PnP_INTERFACE { 319 General = 0, 320 GeneralSCSI = 0, 321 GeneralIDE = 0, 322 ATACompatible = 1, 323 324 GeneralFloppy = 0, 325 Compatible765 = 1, 326 NS398_Floppy = 2, /* NS Super I/O wired to use index 327 register at port 398 and data 328 register at port 399 */ 329 NS26E_Floppy = 3, /* Ports 26E and 26F */ 330 NS15C_Floppy = 4, /* Ports 15C and 15D */ 331 NS2E_Floppy = 5, /* Ports 2E and 2F */ 332 CHRP_Floppy = 6, /* CHRP Floppy in PR*P system */ 333 334 GeneralIPI = 0, 335 336 GeneralEther = 0, 337 GeneralToken = 0, 338 GeneralFDDI = 0, 339 340 GeneralVGA = 0, 341 GeneralSVGA = 0, 342 GeneralXGA = 0, 343 344 GeneralVideo = 0, 345 GeneralAudio = 0, 346 CS4232Audio = 1, /* CS 4232 Plug 'n Play Configured */ 347 348 GeneralRAM = 0, 349 GeneralFLASH = 0, 350 PCIMemoryController = 0, /* PCI Config Method */ 351 RS6KMemoryController = 1, /* RS6K Config Method */ 352 353 GeneralHostBridge = 0, 354 GeneralISABridge = 0, 355 GeneralEISABridge = 0, 356 GeneralMCABridge = 0, 357 GeneralPCIBridge = 0, 358 PCIBridgeDirect = 0, 359 PCIBridgeIndirect = 1, 360 PCIBridgeRS6K = 2, 361 GeneralPCMCIABridge = 0, 362 GeneralVMEBridge = 0, 363 364 GeneralRS232 = 0, 365 COMx = 1, 366 Compatible16450 = 2, 367 Compatible16550 = 3, 368 NS398SerPort = 4, /* NS Super I/O wired to use index 369 register at port 398 and data 370 register at port 399 */ 371 NS26ESerPort = 5, /* Ports 26E and 26F */ 372 NS15CSerPort = 6, /* Ports 15C and 15D */ 373 NS2ESerPort = 7, /* Ports 2E and 2F */ 374 375 GeneralParPort = 0, 376 LPTx = 1, 377 NS398ParPort = 2, /* NS Super I/O wired to use index 378 register at port 398 and data 379 register at port 399 */ 380 NS26EParPort = 3, /* Ports 26E and 26F */ 381 NS15CParPort = 4, /* Ports 15C and 15D */ 382 NS2EParPort = 5, /* Ports 2E and 2F */ 383 384 GeneralPIC = 0, 385 ISA_PIC = 1, 386 EISA_PIC = 2, 387 MPIC = 3, 388 RS6K_PIC = 4, 389 390 GeneralDMA = 0, 391 ISA_DMA = 1, 392 EISA_DMA = 2, 393 394 GeneralTimer = 0, 395 ISA_Timer = 1, 396 EISA_Timer = 2, 397 GeneralRTC = 0, 398 ISA_RTC = 1, 399 400 StoreThruOnly = 1, 401 StoreInEnabled = 2, 402 RS6KL2Cache = 3, 403 404 IndirectNVRAM = 0, /* Indirectly addressed */ 405 DirectNVRAM = 1, /* Memory Mapped */ 406 IndirectNVRAM24 = 2, /* Indirectly addressed - 24 bit */ 407 408 GeneralPowerManagement = 0, 409 EPOWPowerManagement = 1, 410 PowerControl = 2, // d1378 411 412 GeneralCMOS = 0, 413 414 GeneralOPPanel = 0, 415 HarddiskLight = 1, 416 CDROMLight = 2, 417 PowerLight = 3, 418 KeyLock = 4, 419 ANDisplay = 5, /* AlphaNumeric Display */ 420 SystemStatusLED = 6, /* 3 digit 7 segment LED */ 421 CHRP_SystemStatusLED = 7, /* CHRP LEDs in PR*P system */ 422 423 GeneralServiceProcessor = 0, 424 425 TransferData = 1, 426 IGMC32 = 2, 427 IGMC64 = 3, 428 429 GeneralSystemPlanar = 0, /* 10/5/95 */ 430 431 } PnP_INTERFACE; 432 433 /* PnP resources */ 434 435 /* Compressed ASCII is 5 bits per char; 00001=A ... 11010=Z */ 436 437 typedef struct _SERIAL_ID { 438 unsigned char VendorID0; /* Bit(7)=0 */ 439 /* Bits(6:2)=1st character in */ 440 /* compressed ASCII */ 441 /* Bits(1:0)=2nd character in */ 442 /* compressed ASCII bits(4:3) */ 443 unsigned char VendorID1; /* Bits(7:5)=2nd character in */ 444 /* compressed ASCII bits(2:0) */ 445 /* Bits(4:0)=3rd character in */ 446 /* compressed ASCII */ 447 unsigned char VendorID2; /* Product number - vendor assigned */ 448 unsigned char VendorID3; /* Product number - vendor assigned */ 449 450 /* Serial number is to provide uniqueness if more than one board of same */ 451 /* type is in system. Must be "FFFFFFFF" if feature not supported. */ 452 453 unsigned char Serial0; /* Unique serial number bits (7:0) */ 454 unsigned char Serial1; /* Unique serial number bits (15:8) */ 455 unsigned char Serial2; /* Unique serial number bits (23:16) */ 456 unsigned char Serial3; /* Unique serial number bits (31:24) */ 457 unsigned char Checksum; 458 } SERIAL_ID; 459 460 typedef enum _PnPItemName { 461 Unused = 0, 462 PnPVersion = 1, 463 LogicalDevice = 2, 464 CompatibleDevice = 3, 465 IRQFormat = 4, 466 DMAFormat = 5, 467 StartDepFunc = 6, 468 EndDepFunc = 7, 469 IOPort = 8, 470 FixedIOPort = 9, 471 Res1 = 10, 472 Res2 = 11, 473 Res3 = 12, 474 SmallVendorItem = 14, 475 EndTag = 15, 476 MemoryRange = 1, 477 ANSIIdentifier = 2, 478 UnicodeIdentifier = 3, 479 LargeVendorItem = 4, 480 MemoryRange32 = 5, 481 MemoryRangeFixed32 = 6, 482 } PnPItemName; 483 484 typedef enum _PnPTagType { 485 PNP_SMALL = 0, 486 PNP_LARGE = 1, 487 } PnPTagType; 488 489 typedef enum _PnPLargeVendorItems { 490 LV_FloppyDrive = 1, 491 LV_L2Cache = 2, 492 LV_PCIBridge = 3, 493 LV_Display = 4, 494 LV_BridgeAddrTrans = 5, 495 LV_BusBridgeAttr = 6, 496 LV_SCSIController = 7, 497 LV_PowerManagement = 8, 498 LV_GenericAddress = 9, 499 LV_ISABridgeInfo = 10, 500 LV_VideoChannels = 11, 501 LV_PowerControl = 12, 502 LV_MemoryPDData = 13, 503 LV_SystemInterrupts = 14, 504 LV_ErrorLog = 15, 505 LV_ExtendedVPD = 16, 506 LV_TimebaseControl = 17, 507 } PnPLargeVendorItems; 508 509 /* Define a bunch of access functions for the bits in the tag field */ 510 511 /* Tag type - 0 = small; 1 = large */ 512 #define tag_type(t) (((t) & 0x80)>>7) 513 #define set_tag_type(t,v) (t = (t & 0x7f) | ((v)<<7)) 514 515 /* Small item name is 4 bits - one of PnPItemName enum above */ 516 #define tag_small_item_name(t) (((t) & 0x78)>>3) 517 #define set_tag_small_item_name(t,v) (t = (t & 0x07) | ((v)<<3)) 518 519 /* Small item count is 3 bits - count of further bytes in packet */ 520 #define tag_small_count(t) ((t) & 0x07) 521 #define set_tag_count(t,v) (t = (t & 0x78) | (v)) 522 523 /* Large item name is 7 bits - one of PnPItemName enum above */ 524 #define tag_large_item_name(t) ((t) & 0x7f) 525 #define set_tag_large_item_name(t,v) (t = (t | 0x80) | (v)) 526 527 /* a PnP resource is a bunch of contiguous TAG packets ending with an end tag */ 528 529 typedef union _PnP_TAG_PACKET { 530 struct _S1_Pack{ /* VERSION PACKET */ 531 unsigned char Tag; /* small tag = 0x0a */ 532 unsigned char Version[2]; /* PnP version, Vendor version */ 533 } S1_Pack; 534 535 struct _S2_Pack{ /* LOGICAL DEVICE ID PACKET */ 536 unsigned char Tag; /* small tag = 0x15 or 0x16 */ 537 unsigned char DevId[4]; /* Logical device id */ 538 unsigned char Flags[2]; /* bit(0) boot device; */ 539 /* bit(7:1) cmd in range x31-x37 */ 540 /* bit(7:0) cmd in range x28-x3f (opt)*/ 541 } S2_Pack; 542 543 struct _S3_Pack{ /* COMPATIBLE DEVICE ID PACKET */ 544 unsigned char Tag; /* small tag = 0x1c */ 545 unsigned char CompatId[4]; /* Compatible device id */ 546 } S3_Pack; 547 548 struct _S4_Pack{ /* IRQ PACKET */ 549 unsigned char Tag; /* small tag = 0x22 or 0x23 */ 550 unsigned char IRQMask[2]; /* bit(0) is IRQ0, ...; */ 551 /* bit(0) is IRQ8 ... */ 552 unsigned char IRQInfo; /* optional; assume bit(0)=1; else */ 553 /* bit(0) - high true edge sensitive */ 554 /* bit(1) - low true edge sensitive */ 555 /* bit(2) - high true level sensitive*/ 556 /* bit(3) - low true level sensitive */ 557 /* bit(7:4) - must be 0 */ 558 } S4_Pack; 559 560 struct _S5_Pack{ /* DMA PACKET */ 561 unsigned char Tag; /* small tag = 0x2a */ 562 unsigned char DMAMask; /* bit(0) is channel 0 ... */ 563 unsigned char DMAInfo; 564 } S5_Pack; 565 566 struct _S6_Pack{ /* START DEPENDENT FUNCTION PACKET */ 567 unsigned char Tag; /* small tag = 0x30 or 0x31 */ 568 unsigned char Priority; /* Optional; if missing then x01; else*/ 569 /* x00 = best possible */ 570 /* x01 = acceptable */ 571 /* x02 = sub-optimal but functional */ 572 } S6_Pack; 573 574 struct _S7_Pack{ /* END DEPENDENT FUNCTION PACKET */ 575 unsigned char Tag; /* small tag = 0x38 */ 576 } S7_Pack; 577 578 struct _S8_Pack{ /* VARIABLE I/O PORT PACKET */ 579 unsigned char Tag; /* small tag x47 */ 580 unsigned char IOInfo; /* x0 = decode only bits(9:0); */ 581 #define ISAAddr16bit 0x01 /* x01 = decode bits(15:0) */ 582 unsigned char RangeMin[2]; /* Min base address */ 583 unsigned char RangeMax[2]; /* Max base address */ 584 unsigned char IOAlign; /* base alignmt, incr in 1B blocks */ 585 unsigned char IONum; /* number of contiguous I/O ports */ 586 } S8_Pack; 587 588 struct _S9_Pack{ /* FIXED I/O PORT PACKET */ 589 unsigned char Tag; /* small tag = 0x4b */ 590 unsigned char Range[2]; /* base address 10 bits */ 591 unsigned char IONum; /* number of contiguous I/O ports */ 592 } S9_Pack; 593 594 struct _S14_Pack{ /* VENDOR DEFINED PACKET */ 595 unsigned char Tag; /* small tag = 0x7m m = 1-7 */ 596 union _S14_Data{ 597 unsigned char Data[7]; /* Vendor defined */ 598 struct _S14_PPCPack{ /* Pr*p s14 pack */ 599 unsigned char Type; /* 00=non-IBM */ 600 unsigned char PPCData[6]; /* Vendor defined */ 601 } S14_PPCPack; 602 } S14_Data; 603 } S14_Pack; 604 605 struct _S15_Pack{ /* END PACKET */ 606 unsigned char Tag; /* small tag = 0x78 or 0x79 */ 607 unsigned char Check; /* optional - checksum */ 608 } S15_Pack; 609 610 struct _L1_Pack{ /* MEMORY RANGE PACKET */ 611 unsigned char Tag; /* large tag = 0x81 */ 612 unsigned char Count0; /* x09 */ 613 unsigned char Count1; /* x00 */ 614 unsigned char Data[9]; /* a variable array of bytes, */ 615 /* count in tag */ 616 } L1_Pack; 617 618 struct _L2_Pack{ /* ANSI ID STRING PACKET */ 619 unsigned char Tag; /* large tag = 0x82 */ 620 unsigned char Count0; /* Length of string */ 621 unsigned char Count1; 622 unsigned char Identifier[1]; /* a variable array of bytes, */ 623 /* count in tag */ 624 } L2_Pack; 625 626 struct _L3_Pack{ /* UNICODE ID STRING PACKET */ 627 unsigned char Tag; /* large tag = 0x83 */ 628 unsigned char Count0; /* Length + 2 of string */ 629 unsigned char Count1; 630 unsigned char Country0; /* TBD */ 631 unsigned char Country1; /* TBD */ 632 unsigned char Identifier[1]; /* a variable array of bytes, */ 633 /* count in tag */ 634 } L3_Pack; 635 636 struct _L4_Pack{ /* VENDOR DEFINED PACKET */ 637 unsigned char Tag; /* large tag = 0x84 */ 638 unsigned char Count0; 639 unsigned char Count1; 640 union _L4_Data{ 641 unsigned char Data[1]; /* a variable array of bytes, */ 642 /* count in tag */ 643 struct _L4_PPCPack{ /* Pr*p L4 packet */ 644 unsigned char Type; /* 00=non-IBM */ 645 unsigned char PPCData[1]; /* a variable array of bytes, */ 646 /* count in tag */ 647 } L4_PPCPack; 648 } L4_Data; 649 } L4_Pack; 650 651 struct _L5_Pack{ 652 unsigned char Tag; /* large tag = 0x85 */ 653 unsigned char Count0; /* Count = 17 */ 654 unsigned char Count1; 655 unsigned char Data[17]; 656 } L5_Pack; 657 658 struct _L6_Pack{ 659 unsigned char Tag; /* large tag = 0x86 */ 660 unsigned char Count0; /* Count = 9 */ 661 unsigned char Count1; 662 unsigned char Data[9]; 663 } L6_Pack; 664 665 } PnP_TAG_PACKET; 666 667 #endif /* __ASSEMBLY__ */ 668 #endif /* ndef _PNP_ */ 669
Indexes created Sat Sep 20 22:09:52 GMT 2025