1 1.12 thorpej # $NetBSD: files.starfive,v 1.12 2025/09/06 15:44:04 thorpej Exp $ 2 1.1 skrll # 3 1.1 skrll # Configuration info for StarFive SoCs 4 1.1 skrll # 5 1.1 skrll 6 1.4 skrll # JH71x0 Clock controllers 7 1.12 thorpej device jh7100clkc: fdt_clock 8 1.1 skrll attach jh7100clkc at fdt with jh7100_clkc 9 1.1 skrll file arch/riscv/starfive/jh7100_clkc.c jh7100_clkc 10 1.1 skrll 11 1.12 thorpej device jh7110clkc: fdt_clock, fdt_reset 12 1.4 skrll attach jh7110clkc at fdt with jh7110_clkc 13 1.4 skrll file arch/riscv/starfive/jh7110_clkc.c jh7110_clkc 14 1.4 skrll 15 1.4 skrll file arch/riscv/starfive/jh71x0_clkc.c jh7100_clkc | jh7110_clkc 16 1.4 skrll 17 1.2 skrll # JH71x0 USB 18 1.12 thorpej device jh71x0usb: fdt_syscon 19 1.2 skrll attach jh71x0usb at fdt with jh71x0_usb 20 1.2 skrll file arch/riscv/starfive/jh71x0_usb.c jh71x0_usb 21 1.3 skrll 22 1.3 skrll # JH7100 Pin control 23 1.12 thorpej device jh7100pinctrl: fdt_gpio, fdt_pinctrl 24 1.3 skrll attach jh7100pinctrl at fdt with jh7100_pinctrl 25 1.3 skrll file arch/riscv/starfive/jh7100_pinctrl.c jh7100_pinctrl 26 1.5 skrll 27 1.6 skrll # JH7100 Pin control 28 1.12 thorpej device jh7110pinctrl: fdt_gpio, fdt_pinctrl 29 1.6 skrll attach jh7110pinctrl at fdt with jh7110_pinctrl 30 1.6 skrll file arch/riscv/starfive/jh7110_pinctrl.c jh7110_pinctrl 31 1.6 skrll 32 1.5 skrll # Ethernet 33 1.5 skrll # JH7100 GMAC 34 1.12 thorpej attach awge at fdt with jh7100_gmac: fdt_clock, fdt_reset, fdt_syscon 35 1.5 skrll 36 1.5 skrll # JH7110 EOQS 37 1.12 thorpej attach eqos at fdt with jh7110_eqos: fdt_clock, fdt_reset, fdt_syscon 38 1.5 skrll 39 1.5 skrll file arch/riscv/starfive/jh7100_gmac.c jh7100_gmac 40 1.5 skrll file arch/riscv/starfive/jh7110_eqos.c jh7110_eqos 41 1.5 skrll file arch/riscv/starfive/jh71x0_eth.c jh7100_gmac | jh7110_eqos 42 1.7 skrll 43 1.7 skrll # JH7110 PCIe PHY 44 1.12 thorpej device jh7110pciephy: fdt_phy 45 1.7 skrll attach jh7110pciephy at fdt with jh7110_pciephy 46 1.7 skrll file arch/riscv/starfive/jh7110_pciephy.c jh7110_pciephy 47 1.8 skrll 48 1.9 skrll # JH7110 PCIe 49 1.12 thorpej device jh7110pcie: fdt_clock, fdt_gpio, fdt_reset, fdt_syscon, pcibus, pcihost_fdt 50 1.9 skrll attach jh7110pcie at fdt with jh7110_pcie 51 1.9 skrll file arch/riscv/starfive/jh7110_pcie.c jh7110_pcie 52 1.9 skrll 53 1.8 skrll # JH7110 system control 54 1.12 thorpej device jh7110syscon: fdt_syscon 55 1.8 skrll attach jh7110syscon at fdt with jh7110_syscon 56 1.8 skrll file arch/riscv/starfive/jh7110_syscon.c jh7110_syscon 57 1.10 skrll 58 1.10 skrll # JH71x0 temperature sensor 59 1.12 thorpej device jh71x0temp: fdt_reset 60 1.10 skrll attach jh71x0temp at fdt with jh71x0_temp 61 1.10 skrll file arch/riscv/starfive/jh71x0_temp.c jh71x0_temp 62 1.11 skrll 63 1.11 skrll # JH7110 TRNG 64 1.12 thorpej device jh7110trng: fdt_reset 65 1.11 skrll attach jh7110trng at fdt with jh7110_trng 66 1.11 skrll file arch/riscv/starfive/jh7110_trng.c jh7110_trng 67
Indexes created Mon Sep 22 05:09:51 GMT 2025