files.starfive revision 1.11
11.11Sskrll# $NetBSD: files.starfive,v 1.11 2025/02/08 16:12:20 skrll Exp $ 21.1Sskrll# 31.1Sskrll# Configuration info for StarFive SoCs 41.1Sskrll# 51.1Sskrll 61.4Sskrll# JH71x0 Clock controllers 71.1Sskrlldevice jh7100clkc 81.1Sskrllattach jh7100clkc at fdt with jh7100_clkc 91.1Sskrllfile arch/riscv/starfive/jh7100_clkc.c jh7100_clkc 101.1Sskrll 111.4Sskrlldevice jh7110clkc 121.4Sskrllattach jh7110clkc at fdt with jh7110_clkc 131.4Sskrllfile arch/riscv/starfive/jh7110_clkc.c jh7110_clkc 141.4Sskrll 151.4Sskrllfile arch/riscv/starfive/jh71x0_clkc.c jh7100_clkc | jh7110_clkc 161.4Sskrll 171.2Sskrll# JH71x0 USB 181.2Sskrlldevice jh71x0usb 191.2Sskrllattach jh71x0usb at fdt with jh71x0_usb 201.2Sskrllfile arch/riscv/starfive/jh71x0_usb.c jh71x0_usb 211.3Sskrll 221.3Sskrll# JH7100 Pin control 231.3Sskrlldevice jh7100pinctrl 241.3Sskrllattach jh7100pinctrl at fdt with jh7100_pinctrl 251.3Sskrllfile arch/riscv/starfive/jh7100_pinctrl.c jh7100_pinctrl 261.5Sskrll 271.6Sskrll# JH7100 Pin control 281.6Sskrlldevice jh7110pinctrl 291.6Sskrllattach jh7110pinctrl at fdt with jh7110_pinctrl 301.6Sskrllfile arch/riscv/starfive/jh7110_pinctrl.c jh7110_pinctrl 311.6Sskrll 321.5Sskrll# Ethernet 331.5Sskrll# JH7100 GMAC 341.5Sskrllattach awge at fdt with jh7100_gmac 351.5Sskrll 361.5Sskrll# JH7110 EOQS 371.5Sskrllattach eqos at fdt with jh7110_eqos 381.5Sskrll 391.5Sskrllfile arch/riscv/starfive/jh7100_gmac.c jh7100_gmac 401.5Sskrllfile arch/riscv/starfive/jh7110_eqos.c jh7110_eqos 411.5Sskrllfile arch/riscv/starfive/jh71x0_eth.c jh7100_gmac | jh7110_eqos 421.7Sskrll 431.7Sskrll# JH7110 PCIe PHY 441.7Sskrlldevice jh7110pciephy 451.7Sskrllattach jh7110pciephy at fdt with jh7110_pciephy 461.7Sskrllfile arch/riscv/starfive/jh7110_pciephy.c jh7110_pciephy 471.8Sskrll 481.9Sskrll# JH7110 PCIe 491.9Sskrlldevice jh7110pcie: pcibus, pcihost_fdt 501.9Sskrllattach jh7110pcie at fdt with jh7110_pcie 511.9Sskrllfile arch/riscv/starfive/jh7110_pcie.c jh7110_pcie 521.9Sskrll 531.8Sskrll# JH7110 system control 541.8Sskrlldevice jh7110syscon 551.8Sskrllattach jh7110syscon at fdt with jh7110_syscon 561.8Sskrllfile arch/riscv/starfive/jh7110_syscon.c jh7110_syscon 571.10Sskrll 581.10Sskrll# JH71x0 temperature sensor 591.10Sskrlldevice jh71x0temp 601.10Sskrllattach jh71x0temp at fdt with jh71x0_temp 611.10Sskrllfile arch/riscv/starfive/jh71x0_temp.c jh71x0_temp 621.11Sskrll 631.11Sskrll# JH7110 TRNG 641.11Sskrlldevice jh7110trng 651.11Sskrllattach jh7110trng at fdt with jh7110_trng 661.11Sskrllfile arch/riscv/starfive/jh7110_trng.c jh7110_trng 67