files.starfive revision 1.12 1 # $NetBSD: files.starfive,v 1.12 2025/09/06 15:44:04 thorpej Exp $
2 #
3 # Configuration info for StarFive SoCs
4 #
5
6 # JH71x0 Clock controllers
7 device jh7100clkc: fdt_clock
8 attach jh7100clkc at fdt with jh7100_clkc
9 file arch/riscv/starfive/jh7100_clkc.c jh7100_clkc
10
11 device jh7110clkc: fdt_clock, fdt_reset
12 attach jh7110clkc at fdt with jh7110_clkc
13 file arch/riscv/starfive/jh7110_clkc.c jh7110_clkc
14
15 file arch/riscv/starfive/jh71x0_clkc.c jh7100_clkc | jh7110_clkc
16
17 # JH71x0 USB
18 device jh71x0usb: fdt_syscon
19 attach jh71x0usb at fdt with jh71x0_usb
20 file arch/riscv/starfive/jh71x0_usb.c jh71x0_usb
21
22 # JH7100 Pin control
23 device jh7100pinctrl: fdt_gpio, fdt_pinctrl
24 attach jh7100pinctrl at fdt with jh7100_pinctrl
25 file arch/riscv/starfive/jh7100_pinctrl.c jh7100_pinctrl
26
27 # JH7100 Pin control
28 device jh7110pinctrl: fdt_gpio, fdt_pinctrl
29 attach jh7110pinctrl at fdt with jh7110_pinctrl
30 file arch/riscv/starfive/jh7110_pinctrl.c jh7110_pinctrl
31
32 # Ethernet
33 # JH7100 GMAC
34 attach awge at fdt with jh7100_gmac: fdt_clock, fdt_reset, fdt_syscon
35
36 # JH7110 EOQS
37 attach eqos at fdt with jh7110_eqos: fdt_clock, fdt_reset, fdt_syscon
38
39 file arch/riscv/starfive/jh7100_gmac.c jh7100_gmac
40 file arch/riscv/starfive/jh7110_eqos.c jh7110_eqos
41 file arch/riscv/starfive/jh71x0_eth.c jh7100_gmac | jh7110_eqos
42
43 # JH7110 PCIe PHY
44 device jh7110pciephy: fdt_phy
45 attach jh7110pciephy at fdt with jh7110_pciephy
46 file arch/riscv/starfive/jh7110_pciephy.c jh7110_pciephy
47
48 # JH7110 PCIe
49 device jh7110pcie: fdt_clock, fdt_gpio, fdt_reset, fdt_syscon, pcibus, pcihost_fdt
50 attach jh7110pcie at fdt with jh7110_pcie
51 file arch/riscv/starfive/jh7110_pcie.c jh7110_pcie
52
53 # JH7110 system control
54 device jh7110syscon: fdt_syscon
55 attach jh7110syscon at fdt with jh7110_syscon
56 file arch/riscv/starfive/jh7110_syscon.c jh7110_syscon
57
58 # JH71x0 temperature sensor
59 device jh71x0temp: fdt_reset
60 attach jh71x0temp at fdt with jh71x0_temp
61 file arch/riscv/starfive/jh71x0_temp.c jh71x0_temp
62
63 # JH7110 TRNG
64 device jh7110trng: fdt_reset
65 attach jh7110trng at fdt with jh7110_trng
66 file arch/riscv/starfive/jh7110_trng.c jh7110_trng
67