intr.h revision 1.5 1 1.5 yamt /* $NetBSD: intr.h,v 1.5 2006/12/21 15:55:24 yamt Exp $ */
2 1.1 simonb
3 1.1 simonb /*
4 1.1 simonb * Copyright 2000, 2001
5 1.1 simonb * Broadcom Corporation. All rights reserved.
6 1.1 simonb *
7 1.1 simonb * This software is furnished under license and may be used and copied only
8 1.1 simonb * in accordance with the following terms and conditions. Subject to these
9 1.1 simonb * conditions, you may download, copy, install, use, modify and distribute
10 1.1 simonb * modified or unmodified copies of this software in source and/or binary
11 1.1 simonb * form. No title or ownership is transferred hereby.
12 1.1 simonb *
13 1.1 simonb * 1) Any source code used, modified or distributed must reproduce and
14 1.1 simonb * retain this copyright notice and list of conditions as they appear in
15 1.1 simonb * the source file.
16 1.1 simonb *
17 1.1 simonb * 2) No right is granted to use any trade name, trademark, or logo of
18 1.2 cgd * Broadcom Corporation. The "Broadcom Corporation" name may not be
19 1.2 cgd * used to endorse or promote products derived from this software
20 1.2 cgd * without the prior written permission of Broadcom Corporation.
21 1.1 simonb *
22 1.1 simonb * 3) THIS SOFTWARE IS PROVIDED "AS-IS" AND ANY EXPRESS OR IMPLIED
23 1.1 simonb * WARRANTIES, INCLUDING BUT NOT LIMITED TO, ANY IMPLIED WARRANTIES OF
24 1.1 simonb * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR
25 1.1 simonb * NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT SHALL BROADCOM BE LIABLE
26 1.1 simonb * FOR ANY DAMAGES WHATSOEVER, AND IN PARTICULAR, BROADCOM SHALL NOT BE
27 1.1 simonb * LIABLE FOR DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
28 1.1 simonb * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
29 1.1 simonb * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
30 1.1 simonb * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
31 1.1 simonb * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
32 1.1 simonb * OR OTHERWISE), EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 1.1 simonb */
34 1.1 simonb
35 1.1 simonb #ifndef _SBMIPS_INTR_H_
36 1.1 simonb #define _SBMIPS_INTR_H_
37 1.1 simonb
38 1.1 simonb #include <machine/systemsw.h>
39 1.1 simonb
40 1.1 simonb /* Interrupt levels */
41 1.5 yamt #define IPL_NONE 0
42 1.4 simonb #define IPL_SOFT 1 /* generic software interrupts */
43 1.4 simonb #define IPL_SOFTCLOCK 2 /* clock software interrupts */
44 1.4 simonb #define IPL_SOFTNET 3 /* network software interrupts */
45 1.4 simonb #define IPL_SOFTSERIAL 4 /* serial software interrupts */
46 1.5 yamt #define IPL_BIO 5
47 1.5 yamt #define IPL_NET 6
48 1.5 yamt #define IPL_TTY 7
49 1.5 yamt #define IPL_VM 8
50 1.5 yamt #define IPL_CLOCK 9
51 1.5 yamt #define IPL_STATCLOCK 10
52 1.5 yamt #define IPL_SCHED 11
53 1.5 yamt #define IPL_SERIAL 12
54 1.5 yamt #define IPL_HIGH 13
55 1.5 yamt #define IPL_LOCK 14
56 1.5 yamt #define _NIPL 15
57 1.5 yamt
58 1.5 yamt #define SI_SOFT 0
59 1.5 yamt #define SI_SOFTCLOCK 1
60 1.5 yamt #define SI_SOFTNET 2
61 1.5 yamt #define SI_SOFTSERIAL 3
62 1.4 simonb
63 1.5 yamt #define SI_NQUEUES 4
64 1.4 simonb
65 1.5 yamt #define SI_QUEUENAMES { \
66 1.4 simonb "misc", \
67 1.4 simonb "clock", \
68 1.4 simonb "net", \
69 1.4 simonb "serial", \
70 1.4 simonb }
71 1.1 simonb
72 1.1 simonb #define _IMR_SOFT (MIPS_SOFT_INT_MASK_0 | MIPS_SOFT_INT_MASK_1)
73 1.1 simonb #define _IMR_VM (_IMR_SOFT | MIPS_INT_MASK_0)
74 1.1 simonb #define _IMR_SCHED (_IMR_VM | MIPS_INT_MASK_1 | MIPS_INT_MASK_5)
75 1.1 simonb #define _IMR_SERIAL (_IMR_SCHED | MIPS_INT_MASK_2)
76 1.1 simonb #define _IMR_HIGH (MIPS_INT_MASK)
77 1.1 simonb
78 1.5 yamt #define splsoftclock() _splraise(_IMR_SOFT)
79 1.5 yamt #define splsoftnet() _splraise(_IMR_SOFT)
80 1.5 yamt #define splsoftserial() _splraise(_IMR_SOFT)
81 1.1 simonb #define splbio() _splraise(_IMR_VM)
82 1.5 yamt #define splnet() _splraise(_IMR_VM)
83 1.5 yamt #define spltty() _splraise(_IMR_VM)
84 1.5 yamt #define splvm() _splraise(_IMR_VM)
85 1.1 simonb #define splclock() _splraise(_IMR_SCHED)
86 1.5 yamt #define splstatclock() _splraise(_IMR_SCHED)
87 1.5 yamt #define splsched() _splraise(_IMR_SCHED)
88 1.5 yamt #define splserial() _splraise(_IMR_SERIAL)
89 1.1 simonb #define splhigh() _splraise(_IMR_HIGH)
90 1.1 simonb #define spllock() splhigh()
91 1.1 simonb
92 1.1 simonb #define spl0() _spllower(0)
93 1.1 simonb #define spllowersoftclock() _spllower(_IMR_SOFT)
94 1.1 simonb #define splx(s) _splset(s)
95 1.1 simonb
96 1.4 simonb int _splraise(int);
97 1.4 simonb int _spllower(int);
98 1.4 simonb int _splset(int);
99 1.4 simonb int _splget(void);
100 1.4 simonb int _splnone(void);
101 1.4 simonb int _setsoftintr(int);
102 1.4 simonb int _clrsoftintr(int);
103 1.1 simonb
104 1.5 yamt typedef int ipl_t;
105 1.5 yamt typedef struct {
106 1.5 yamt ipl_t _spl;
107 1.5 yamt } ipl_cookie_t;
108 1.5 yamt
109 1.5 yamt ipl_cookie_t makeiplcookie(ipl_t);
110 1.5 yamt
111 1.5 yamt static inline int
112 1.5 yamt splraiseipl(ipl_cookie_t icookie)
113 1.5 yamt {
114 1.5 yamt
115 1.5 yamt return _splraise(icookie._spl);
116 1.5 yamt }
117 1.5 yamt
118 1.4 simonb #include <mips/softintr.h>
119 1.1 simonb
120 1.1 simonb #endif /* _SBMIPS_INTR_H_ */
121