1 1.2 simonb /* $NetBSD: swarm.h,v 1.2 2002/11/12 01:22:26 simonb Exp $ */ 2 1.1 simonb 3 1.1 simonb /* 4 1.1 simonb * I/O Address assignments for the CSWARM board 5 1.1 simonb * 6 1.1 simonb * Summary of address map: 7 1.1 simonb * 8 1.1 simonb * Address Size CSel Description 9 1.1 simonb * --------------- ---- ------ -------------------------------- 10 1.1 simonb * 0x1FC00000 2MB CS0 Boot ROM 11 1.1 simonb * 0x1F800000 2MB CS1 Alternate boot ROM 12 1.1 simonb * CS2 Unused 13 1.1 simonb * 0x100A0000 64KB CS3 LED display 14 1.1 simonb * 0x100B0000 64KB CS4 IDE Disk 15 1.1 simonb * CS5 Unused 16 1.1 simonb * 0x11000000 64MB CS6 PCMCIA 17 1.1 simonb * CS7 Unused 18 1.1 simonb * 19 1.1 simonb * GPIO assignments 20 1.1 simonb * 21 1.1 simonb * GPIO# Direction Description 22 1.1 simonb * ------- --------- ------------------------------------------ 23 1.1 simonb * GPIO0 Output Debug LED 24 1.1 simonb * GPIO1 Output Sturgeon NMI 25 1.1 simonb * GPIO2 Input PHY Interrupt (interrupt) 26 1.1 simonb * GPIO3 Input Nonmaskable Interrupt (interrupt) 27 1.1 simonb * GPIO4 Input IDE Disk Interrupt (interrupt) 28 1.1 simonb * GPIO5 Input Temperature Sensor Alert (interrupt) 29 1.1 simonb * GPIO6 N/A PCMCIA interface 30 1.1 simonb * GPIO7 N/A PCMCIA interface 31 1.1 simonb * GPIO8 N/A PCMCIA interface 32 1.1 simonb * GPIO9 N/A PCMCIA interface 33 1.1 simonb * GPIO10 N/A PCMCIA interface 34 1.1 simonb * GPIO11 N/A PCMCIA interface 35 1.1 simonb * GPIO12 N/A PCMCIA interface 36 1.1 simonb * GPIO13 N/A PCMCIA interface 37 1.1 simonb * GPIO14 N/A PCMCIA interface 38 1.1 simonb * GPIO15 N/A PCMCIA interface 39 1.1 simonb */ 40 1.1 simonb 41 1.1 simonb 42 1.1 simonb /* GPIO pins */ 43 1.1 simonb #define GPIO_DEBUG_LED 0 44 1.1 simonb #define GPIO_STURGEON_NMI 1 45 1.1 simonb #define GPIO_PHY_INTERRUPT 2 46 1.1 simonb #define GPIO_NONMASKABLE_INT 3 47 1.1 simonb #define GPIO_IDE_INTERRUPT 4 48 1.1 simonb #define GPIO_TEMP_SENSOR_INT 5 49 1.1 simonb 50 1.1 simonb /* device addresses */ 51 1.1 simonb #define SWARM_LEDS_PHYS 0x100a0000 52 1.1 simonb #define SWARM_IDE_PHYS 0x100b0000 53 1.1 simonb #define SWARM_PCMCIA_PHYS 0x11000000 54 1.1 simonb 55 1.1 simonb /* SMBus devices */ 56 1.1 simonb #define TEMPSENSOR_SMBUS_CHAN 0 57 1.1 simonb #define TEMPSENSOR_SMBUS_DEV 0x2A 58 1.1 simonb 59 1.1 simonb #define DRAM_SMBUS_CHAN 0 60 1.1 simonb #define DRAM_SMBUS_DEV 0x54 61 1.1 simonb 62 1.1 simonb #define BIGEEPROM_SMBUS_CHAN 0 63 1.1 simonb #define BIGEEPROM_SMBUS_DEV 0x50 64 1.1 simonb 65 1.2 simonb #define BIGEEPROM_SMBUS_CHAN_1 1 /* rev 2.0 swarm only */ 66 1.2 simonb #define BIGEEPROM_SMBUS_DEV_1 0x51 67 1.2 simonb 68 1.1 simonb #define CFG_DRAM_SMBUS_CHAN 0 69 1.1 simonb #define CFG_DRAM_SMBUS_BASE 0x54 /* starting SMBus device base */ 70 1.1 simonb 71 1.2 simonb #define X1241_SMBUS_CHAN 1 /* rev 1.0 swarm only, fixed slave address */ 72 1.2 simonb 73 1.2 simonb #define M41T81_SMBUS_CHAN 1 /* rev 2.0 swarm only (or PCF8563), fixed slave address */ 74 1.2 simonb 75 1.2 simonb #define PCF8563_SMBUS_CHAN 1 /* rev 2.0 swarm only (or M41T81) */ 76 1.2 simonb #define PCF8563_SMBUS_DEV 0x50 77 1.1 simonb 78 1.2 simonb #define MAX1617A_SMBUS_CHAN 0 /* or MAX6654 on newer board, reg compatible */ 79 1.2 simonb #define MAX1617A_SMBUS_DEV 0x2a 80
Indexes created Sat Sep 20 22:09:52 GMT 2025