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      1 /* $NetBSD: pi1ppcreg.h,v 1.2 2009/03/05 01:38:12 msaitoh Exp $ */
      2 
      3 /*-
      4  * Copyright (c) 2001 Alcove - Nicolas Souchu
      5  * Copyright (c) 2005 Joe Britt <britt (at) danger.com> - SGI PI1 version
      6  * All rights reserved.
      7  *
      8  * Redistribution and use in source and binary forms, with or without
      9  * modification, are permitted provided that the following conditions
     10  * are met:
     11  * 1. Redistributions of source code must retain the above copyright
     12  *    notice, this list of conditions and the following disclaimer.
     13  * 2. Redistributions in binary form must reproduce the above copyright
     14  *    notice, this list of conditions and the following disclaimer in the
     15  *    documentation and/or other materials provided with the distribution.
     16  *
     17  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
     18  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     19  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     20  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
     21  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     22  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     23  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     24  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     25  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     26  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     27  * SUCH DAMAGE.
     28  *
     29  * FreeBSD: src/sys/isa/ppcreg.h,v 1.10.2.4 2001/10/02 05:21:45 nsouch Exp
     30  *
     31  */
     32 
     33 #ifndef __PI1PPCREG_H
     34 #define __PI1PPCREG_H
     35 
     36 /* see iocreg.h for data/ctl/status reg offsets */
     37 
     38 /* SPP mode control register bit positions. */
     39 #define STROBE		0x01
     40 #define AUTOFEED	0x02
     41 #define nINIT		0x04
     42 #define SELECTIN	0x08
     43 
     44 /* we emulate this bit */
     45 #define IRQENABLE	0x10
     46 
     47 /* data dir in PS/2 mode */
     48 #define PCD             0x20
     49 
     50 /* SPP status register bit positions. */
     51 /* #define TIMEOUT	0x01 */
     52 
     53 #define nFAULT          0x08
     54 #define SELECT          0x10
     55 #define PERROR          0x20
     56 #define nACK            0x40
     57 #define nBUSY           0x80
     58 
     59 /* Flags indicating ready condition */
     60 #define SPP_READY (SELECT | nFAULT | nBUSY)
     61 #define SPP_MASK (SELECT | nFAULT | PERROR | nBUSY)
     62 
     63 /* Byte mode signals */
     64 #define HOSTCLK		STROBE
     65 #define HOSTBUSY	AUTOFEED
     66 #define ACTIVE1284	SELECTIN
     67 #define PTRCLK		nACK
     68 #define PTRBUSY		nBUSY
     69 #define ACKDATAREQ	PERROR
     70 #define XFLAG		SELECT
     71 #define nDATAVAIL	nFAULT
     72 
     73 /* interrupt mask & status bit positions */
     74 
     75 /* these interrupts are asserted on rising AND falling edges */
     76 #define PI1_PLP_PERROR_INTR	0x80
     77 #define	PI1_PLP_FAULT_INTR	0x40
     78 #define	PI1_PLP_SELECT_INTR	0x20
     79 
     80 /* this interrupt is only asserted on rising edge */
     81 #define	PI1_PLP_ACK_INTR	0x04
     82 
     83 #endif /* __PI1PPCREG_H */
     84