1 /* $NetBSD: scif.c,v 1.70 2023/09/16 15:42:01 andvar Exp $ */ 2 3 /*- 4 * Copyright (C) 1999 T.Horiuchi and SAITOH Masanobu. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. The name of the author may not be used to endorse or promote products 15 * derived from this software without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 /*- 30 * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc. 31 * All rights reserved. 32 * 33 * This code is derived from software contributed to The NetBSD Foundation 34 * by Charles M. Hannum. 35 * 36 * Redistribution and use in source and binary forms, with or without 37 * modification, are permitted provided that the following conditions 38 * are met: 39 * 1. Redistributions of source code must retain the above copyright 40 * notice, this list of conditions and the following disclaimer. 41 * 2. Redistributions in binary form must reproduce the above copyright 42 * notice, this list of conditions and the following disclaimer in the 43 * documentation and/or other materials provided with the distribution. 44 * 45 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 46 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 47 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 48 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 49 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 50 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 51 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 52 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 53 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 54 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 55 * POSSIBILITY OF SUCH DAMAGE. 56 */ 57 58 /* 59 * Copyright (c) 1991 The Regents of the University of California. 60 * All rights reserved. 61 * 62 * Redistribution and use in source and binary forms, with or without 63 * modification, are permitted provided that the following conditions 64 * are met: 65 * 1. Redistributions of source code must retain the above copyright 66 * notice, this list of conditions and the following disclaimer. 67 * 2. Redistributions in binary form must reproduce the above copyright 68 * notice, this list of conditions and the following disclaimer in the 69 * documentation and/or other materials provided with the distribution. 70 * 3. Neither the name of the University nor the names of its contributors 71 * may be used to endorse or promote products derived from this software 72 * without specific prior written permission. 73 * 74 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 75 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 76 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 77 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 78 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 79 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 80 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 81 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 82 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 83 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 84 * SUCH DAMAGE. 85 * 86 * @(#)com.c 7.5 (Berkeley) 5/16/91 87 */ 88 89 /* 90 * SH internal serial driver 91 * 92 * This code is derived from both z8530tty.c and com.c 93 */ 94 95 #include <sys/cdefs.h> 96 __KERNEL_RCSID(0, "$NetBSD: scif.c,v 1.70 2023/09/16 15:42:01 andvar Exp $"); 97 98 #include "opt_kgdb.h" 99 #include "opt_scif.h" 100 101 #include <sys/param.h> 102 #include <sys/systm.h> 103 #include <sys/tty.h> 104 #include <sys/proc.h> 105 #include <sys/conf.h> 106 #include <sys/file.h> 107 #include <sys/syslog.h> 108 #include <sys/kernel.h> 109 #include <sys/device.h> 110 #include <sys/kmem.h> 111 #include <sys/kgdb.h> 112 #include <sys/kauth.h> 113 #include <sys/intr.h> 114 115 #include <dev/cons.h> 116 117 #include <sh3/clock.h> 118 #include <sh3/exception.h> 119 #include <sh3/scifreg.h> 120 121 #include <sh3/dev/scifvar.h> 122 123 #include "locators.h" 124 125 126 struct scif_softc { 127 device_t sc_dev; 128 129 struct tty *sc_tty; 130 void *sc_si; 131 132 callout_t sc_diag_ch; 133 134 #if 0 135 bus_space_tag_t sc_iot; /* ISA i/o space identifier */ 136 bus_space_handle_t sc_ioh; /* ISA io handle */ 137 138 int sc_drq; 139 140 int sc_frequency; 141 #endif 142 143 u_int sc_overflows, 144 sc_floods, 145 sc_errors; /* number of retries so far */ 146 u_char sc_status[7]; /* copy of registers */ 147 148 int sc_hwflags; 149 int sc_swflags; 150 u_int sc_fifolen; 151 152 u_int sc_r_hiwat, 153 sc_r_lowat; 154 u_char *volatile sc_rbget, 155 *volatile sc_rbput; 156 volatile u_int sc_rbavail; 157 u_char *sc_rbuf, 158 *sc_ebuf; 159 160 u_char *sc_tba; /* transmit buffer address */ 161 u_int sc_tbc, /* transmit byte count */ 162 sc_heldtbc; 163 164 volatile u_char sc_rx_flags, 165 #define RX_TTY_BLOCKED 0x01 166 #define RX_TTY_OVERFLOWED 0x02 167 #define RX_IBUF_BLOCKED 0x04 168 #define RX_IBUF_OVERFLOWED 0x08 169 #define RX_ANY_BLOCK 0x0f 170 sc_tx_busy, /* working on an output chunk */ 171 sc_tx_done, /* done with one output chunk */ 172 sc_tx_stopped, /* H/W level stop (lost CTS) */ 173 sc_st_check, /* got a status interrupt */ 174 sc_rx_ready; 175 176 volatile u_char sc_heldchange; 177 }; 178 179 #ifdef SCIF_DEBUG 180 int scif_debug = 1; 181 #define DPRINTF(x) if (scif_debug) printf x 182 #else 183 #define DPRINTF(x) 184 #endif 185 186 static int scif_match(device_t, cfdata_t, void *); 187 static void scif_attach(device_t, device_t, void *); 188 189 CFATTACH_DECL_NEW(scif, sizeof(struct scif_softc), 190 scif_match, scif_attach, NULL, NULL); 191 192 static int scif_attached = 0; /* XXX: FIXME: don't limit to just one! */ 193 194 extern struct cfdriver scif_cd; 195 196 #define SCIFUNIT(x) TTUNIT(x) 197 #define SCIFDIALOUT(x) TTDIALOUT(x) 198 199 200 /* console */ 201 dev_type_cnprobe(scifcnprobe); 202 dev_type_cninit(scifcninit); 203 dev_type_cngetc(scifcngetc); 204 dev_type_cnputc(scifcnputc); 205 206 207 /* cdevsw */ 208 dev_type_open(scifopen); 209 dev_type_close(scifclose); 210 dev_type_read(scifread); 211 dev_type_write(scifwrite); 212 dev_type_ioctl(scifioctl); 213 dev_type_stop(scifstop); 214 dev_type_tty(sciftty); 215 dev_type_poll(scifpoll); 216 217 const struct cdevsw scif_cdevsw = { 218 .d_open = scifopen, 219 .d_close = scifclose, 220 .d_read = scifread, 221 .d_write = scifwrite, 222 .d_ioctl = scifioctl, 223 .d_stop = scifstop, 224 .d_tty = sciftty, 225 .d_poll = scifpoll, 226 .d_mmap = nommap, 227 .d_kqfilter = ttykqfilter, 228 .d_discard = nodiscard, 229 .d_flag = D_TTY 230 }; 231 232 #ifndef SCIFCONSOLE 233 #define SCIFCONSOLE 0 234 #endif 235 int scifconsole = SCIFCONSOLE; /* patchable */ 236 237 /* struct tty */ 238 static void scifstart(struct tty *); 239 static int scifparam(struct tty *, struct termios *); 240 241 242 void InitializeScif (unsigned int); 243 int ScifErrCheck(void); 244 void scif_putc(unsigned char); 245 unsigned char scif_getc(void); 246 247 static int scifintr(void *); 248 static void scifsoft(void *); 249 static void scif_rxsoft(struct scif_softc *, struct tty *); 250 static void scif_txsoft(struct scif_softc *, struct tty *); 251 #if 0 252 static void scif_stsoft(struct scif_softc *, struct tty *); 253 #endif 254 static void scif_schedrx(struct scif_softc *); 255 static void scifdiag(void *); 256 257 static void scif_break(struct scif_softc *, int); 258 static void scif_iflush(struct scif_softc *); 259 260 261 /* Hardware flag masks (sc_hwflags) */ 262 #define SCIF_HW_NOIEN 0x01 263 #define SCIF_HW_FIFO 0x02 264 #define SCIF_HW_FLOW 0x08 265 #define SCIF_HW_DEV_OK 0x20 266 #define SCIF_HW_CONSOLE 0x40 267 #define SCIF_HW_KGDB 0x80 268 269 270 /* Buffer size for character buffer */ 271 #define SCIF_RING_SIZE 2048 272 static unsigned int scif_rbuf_size = SCIF_RING_SIZE; 273 274 /* Stop input when 3/4 of the ring is full; restart when only 1/4 is full. */ 275 static unsigned int scif_rbuf_hiwat = (SCIF_RING_SIZE * 1) / 4; 276 static unsigned int scif_rbuf_lowat = (SCIF_RING_SIZE * 3) / 4; 277 278 279 #ifdef SCIFCN_SPEED 280 unsigned int scifcn_speed = SCIFCN_SPEED; 281 #else 282 unsigned int scifcn_speed = 9600; 283 #endif 284 285 #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */ 286 int scifconscflag = CONMODE; 287 288 static int scifisconsole = 0; 289 290 #ifdef KGDB 291 static int kgdb_attached = 0; 292 #endif 293 294 295 #define divrnd(n, q) (((n)*2/(q)+1)/2) /* divide and round off */ 296 297 298 /* XXX: uwe 299 * Prepare for bus_spacification. The difference in access widths is 300 * still handled by the magic definitions in scifreg.h 301 */ 302 #define scif_smr_read() SHREG_SCSMR2 303 #define scif_smr_write(v) (SHREG_SCSMR2 = (v)) 304 305 #define scif_brr_read() SHREG_SCBRR2 306 #define scif_brr_write(v) (SHREG_SCBRR2 = (v)) 307 308 #define scif_scr_read() SHREG_SCSCR2 309 #define scif_scr_write(v) (SHREG_SCSCR2 = (v)) 310 311 #define scif_ftdr_write(v) (SHREG_SCFTDR2 = (v)) 312 313 #define scif_ssr_read() SHREG_SCSSR2 314 #define scif_ssr_write(v) (SHREG_SCSSR2 = (v)) 315 316 #define scif_frdr_read() SHREG_SCFRDR2 317 318 #define scif_fcr_read() SHREG_SCFCR2 319 #define scif_fcr_write(v) (SHREG_SCFCR2 = (v)) 320 321 #define scif_fdr_read() SHREG_SCFDR2 322 323 #ifdef SH4 /* additional registers in sh4 */ 324 325 #define scif_sptr_read() SHREG_SCSPTR2 326 #define scif_sptr_write(v) (SHREG_SCSPTR2 = (v)) 327 328 #define scif_lsr_read() SHREG_SCLSR2 329 #define scif_lsr_write(v) (SHREG_SCLSR2 = (v)) 330 331 #endif /* SH4 */ 332 333 334 void 335 InitializeScif(unsigned int bps) 336 { 337 338 /* Initialize SCR */ 339 scif_scr_write(0x00); 340 341 #if 0 342 scif_fcr_write(SCFCR2_TFRST | SCFCR2_RFRST | SCFCR2_MCE); 343 #else 344 scif_fcr_write(SCFCR2_TFRST | SCFCR2_RFRST); 345 #endif 346 /* Serial Mode Register */ 347 scif_smr_write(0x00); /* 8bit,NonParity,Even,1Stop */ 348 349 /* Bit Rate Register */ 350 scif_brr_write(divrnd(sh_clock_get_pclock(), 32 * bps) - 1); 351 352 /* 353 * wait 2m Sec, because Send/Recv must begin 1 bit period after 354 * BRR is set. 355 */ 356 delay(2000); 357 358 #if 0 359 scif_fcr_write(FIFO_RCV_TRIGGER_14 | FIFO_XMT_TRIGGER_1 | SCFCR2_MCE); 360 #else 361 scif_fcr_write(FIFO_RCV_TRIGGER_14 | FIFO_XMT_TRIGGER_1); 362 #endif 363 364 /* Send permission, Receive permission ON */ 365 scif_scr_write(SCSCR2_TE | SCSCR2_RE); 366 367 /* Serial Status Register */ 368 scif_ssr_write(scif_ssr_read() & SCSSR2_TDFE); /* Clear Status */ 369 } 370 371 int 372 ScifErrCheck(void) 373 { 374 375 return (scif_ssr_read() & (SCSSR2_ER | SCSSR2_FER | SCSSR2_PER)); 376 } 377 378 void 379 scif_putc(unsigned char c) 380 { 381 382 /* wait for ready */ 383 while ((scif_fdr_read() & SCFDR2_TXCNT) == SCFDR2_TXF_FULL) 384 continue; 385 386 /* write send data to send register */ 387 scif_ftdr_write(c); 388 389 /* clear ready flag */ 390 scif_ssr_write(scif_ssr_read() & ~(SCSSR2_TDFE | SCSSR2_TEND)); 391 } 392 393 unsigned char 394 scif_getc(void) 395 { 396 unsigned char c, err_c; 397 #ifdef SH4 398 unsigned short err_c2 = 0; /* XXXGCC: -Wuninitialized */ 399 #endif 400 401 for (;;) { 402 /* wait for ready */ 403 while ((scif_fdr_read() & SCFDR2_RECVCNT) == 0) 404 continue; 405 406 c = scif_frdr_read(); 407 err_c = scif_ssr_read(); 408 scif_ssr_write(scif_ssr_read() 409 & ~(SCSSR2_ER | SCSSR2_BRK | SCSSR2_RDF | SCSSR2_DR)); 410 #ifdef SH4 411 if (CPU_IS_SH4) { 412 err_c2 = scif_lsr_read(); 413 scif_lsr_write(scif_lsr_read() & ~SCLSR2_ORER); 414 } 415 #endif 416 if ((err_c & (SCSSR2_ER | SCSSR2_BRK | SCSSR2_FER 417 | SCSSR2_PER)) == 0) 418 { 419 #ifdef SH4 420 if (CPU_IS_SH4 && ((err_c2 & SCLSR2_ORER) == 0)) 421 #endif 422 return(c); 423 } 424 } 425 426 } 427 428 static int 429 scif_match(device_t parent, cfdata_t cfp, void *aux) 430 { 431 432 if (scif_attached) 433 return 0; 434 435 if (strcmp(cfp->cf_name, "scif") != 0) 436 return 0; 437 438 return 1; 439 } 440 441 static void 442 scif_attach(device_t parent, device_t self, void *aux) 443 { 444 struct scif_softc *sc; 445 struct tty *tp; 446 447 sc = device_private(self); 448 sc->sc_dev = self; 449 450 scif_attached = 1; 451 452 sc->sc_hwflags = 0; /* XXX */ 453 sc->sc_swflags = 0; /* XXX */ 454 sc->sc_fifolen = 16; 455 456 aprint_normal("\n"); 457 if (scifisconsole) { 458 aprint_naive(" (console)\n"); 459 aprint_normal_dev(self, "console\n"); 460 SET(sc->sc_hwflags, SCIF_HW_CONSOLE); 461 SET(sc->sc_swflags, TIOCFLAG_SOFTCAR); 462 } 463 #ifdef KGDB 464 else if (kgdb_attached) { 465 aprint_naive(" (kgdb)\n"); 466 aprint_normal_dev(self, "kgdb\n"); 467 SET(sc->sc_hwflags, SCIF_HW_KGDB); 468 SET(sc->sc_swflags, TIOCFLAG_SOFTCAR); 469 } 470 #endif 471 else { 472 aprint_naive("\n"); 473 InitializeScif(9600); /* XXX */ 474 } 475 476 callout_init(&sc->sc_diag_ch, 0); 477 #ifdef SH4 478 intc_intr_establish(SH4_INTEVT_SCIF_ERI, IST_LEVEL, IPL_SERIAL, 479 scifintr, sc); 480 intc_intr_establish(SH4_INTEVT_SCIF_RXI, IST_LEVEL, IPL_SERIAL, 481 scifintr, sc); 482 intc_intr_establish(SH4_INTEVT_SCIF_BRI, IST_LEVEL, IPL_SERIAL, 483 scifintr, sc); 484 intc_intr_establish(SH4_INTEVT_SCIF_TXI, IST_LEVEL, IPL_SERIAL, 485 scifintr, sc); 486 #else 487 intc_intr_establish(SH7709_INTEVT2_SCIF_ERI, IST_LEVEL, IPL_SERIAL, 488 scifintr, sc); 489 intc_intr_establish(SH7709_INTEVT2_SCIF_RXI, IST_LEVEL, IPL_SERIAL, 490 scifintr, sc); 491 intc_intr_establish(SH7709_INTEVT2_SCIF_BRI, IST_LEVEL, IPL_SERIAL, 492 scifintr, sc); 493 intc_intr_establish(SH7709_INTEVT2_SCIF_TXI, IST_LEVEL, IPL_SERIAL, 494 scifintr, sc); 495 #endif 496 497 sc->sc_si = softint_establish(SOFTINT_SERIAL, scifsoft, sc); 498 SET(sc->sc_hwflags, SCIF_HW_DEV_OK); 499 500 tp = tty_alloc(); 501 tp->t_oproc = scifstart; 502 tp->t_param = scifparam; 503 tp->t_hwiflow = NULL; 504 505 sc->sc_tty = tp; 506 sc->sc_rbuf = kmem_alloc(scif_rbuf_size << 1, KM_SLEEP); 507 sc->sc_ebuf = sc->sc_rbuf + (scif_rbuf_size << 1); 508 509 tty_attach(tp); 510 511 /* XXX: TODO */ 512 if (!pmf_device_register(self, NULL, NULL)) 513 aprint_error_dev(self, "unable to establish power handler\n"); 514 } 515 516 /* 517 * Start or restart transmission. 518 */ 519 static void 520 scifstart(struct tty *tp) 521 { 522 struct scif_softc *sc; 523 int s; 524 525 sc = device_lookup_private(&scif_cd, SCIFUNIT(tp->t_dev)); 526 527 s = spltty(); 528 if (ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP)) 529 goto out; 530 if (sc->sc_tx_stopped) 531 goto out; 532 if (!ttypull(tp)) 533 goto out; 534 535 /* Grab the first contiguous region of buffer space. */ 536 { 537 u_char *tba; 538 int tbc; 539 540 tba = tp->t_outq.c_cf; 541 tbc = ndqb(&tp->t_outq, 0); 542 543 (void)splserial(); 544 545 sc->sc_tba = tba; 546 sc->sc_tbc = tbc; 547 } 548 549 SET(tp->t_state, TS_BUSY); 550 sc->sc_tx_busy = 1; 551 552 /* Enable transmit completion interrupts if necessary. */ 553 scif_scr_write(scif_scr_read() | SCSCR2_TIE | SCSCR2_RIE); 554 555 /* Output the first chunk of the contiguous buffer. */ 556 { 557 int n; 558 int maxchars; 559 int i; 560 561 n = sc->sc_tbc; 562 maxchars = sc->sc_fifolen 563 - ((scif_fdr_read() & SCFDR2_TXCNT) >> 8); 564 if (n > maxchars) 565 n = maxchars; 566 567 for (i = 0; i < n; i++) { 568 scif_putc(*(sc->sc_tba)); 569 sc->sc_tba++; 570 } 571 sc->sc_tbc -= n; 572 } 573 out: 574 splx(s); 575 return; 576 } 577 578 /* 579 * Set SCIF tty parameters from termios. 580 * XXX - Should just copy the whole termios after 581 * making sure all the changes could be done. 582 */ 583 static int 584 scifparam(struct tty *tp, struct termios *t) 585 { 586 struct scif_softc *sc; 587 int ospeed = t->c_ospeed; 588 int s; 589 590 sc = device_lookup_private(&scif_cd, SCIFUNIT(tp->t_dev)); 591 if (!device_is_active(sc->sc_dev)) 592 return (EIO); 593 594 /* Check requested parameters. */ 595 if (ospeed < 0) 596 return (EINVAL); 597 if (t->c_ispeed && t->c_ispeed != t->c_ospeed) 598 return (EINVAL); 599 600 /* 601 * For the console, always force CLOCAL and !HUPCL, so that the port 602 * is always active. 603 */ 604 if (ISSET(sc->sc_swflags, TIOCFLAG_SOFTCAR) || 605 ISSET(sc->sc_hwflags, SCIF_HW_CONSOLE)) { 606 SET(t->c_cflag, CLOCAL); 607 CLR(t->c_cflag, HUPCL); 608 } 609 610 /* 611 * If there were no changes, don't do anything. This avoids dropping 612 * input and improves performance when all we did was frob things like 613 * VMIN and VTIME. 614 */ 615 if (tp->t_ospeed == t->c_ospeed && 616 tp->t_cflag == t->c_cflag) 617 return (0); 618 619 #if 0 620 /* XXX (msaitoh) */ 621 lcr = ISSET(sc->sc_lcr, LCR_SBREAK) | cflag2lcr(t->c_cflag); 622 #endif 623 624 s = splserial(); 625 626 /* 627 * Set the flow control pins depending on the current flow control 628 * mode. 629 */ 630 if (ISSET(t->c_cflag, CRTSCTS)) { 631 scif_fcr_write(scif_fcr_read() | SCFCR2_MCE); 632 } else { 633 scif_fcr_write(scif_fcr_read() & ~SCFCR2_MCE); 634 } 635 636 scif_brr_write(divrnd(sh_clock_get_pclock(), 32 * ospeed) -1); 637 638 /* 639 * Set the FIFO threshold based on the receive speed. 640 * 641 * * If it's a low speed, it's probably a mouse or some other 642 * interactive device, so set the threshold low. 643 * * If it's a high speed, trim the trigger level down to prevent 644 * overflows. 645 * * Otherwise set it a bit higher. 646 */ 647 #if 0 648 /* XXX (msaitoh) */ 649 if (ISSET(sc->sc_hwflags, SCIF_HW_HAYESP)) 650 sc->sc_fifo = FIFO_DMA_MODE | FIFO_ENABLE | FIFO_TRIGGER_8; 651 else if (ISSET(sc->sc_hwflags, SCIF_HW_FIFO)) 652 sc->sc_fifo = FIFO_ENABLE | 653 (t->c_ospeed <= 1200 ? FIFO_TRIGGER_1 : 654 t->c_ospeed <= 38400 ? FIFO_TRIGGER_8 : FIFO_TRIGGER_4); 655 else 656 sc->sc_fifo = 0; 657 #endif 658 659 /* And copy to tty. */ 660 tp->t_ispeed = 0; 661 tp->t_ospeed = t->c_ospeed; 662 tp->t_cflag = t->c_cflag; 663 664 if (!sc->sc_heldchange) { 665 if (sc->sc_tx_busy) { 666 sc->sc_heldtbc = sc->sc_tbc; 667 sc->sc_tbc = 0; 668 sc->sc_heldchange = 1; 669 } 670 #if 0 671 /* XXX (msaitoh) */ 672 else 673 scif_loadchannelregs(sc); 674 #endif 675 } 676 677 if (!ISSET(t->c_cflag, CHWFLOW)) { 678 /* Disable the high water mark. */ 679 sc->sc_r_hiwat = 0; 680 sc->sc_r_lowat = 0; 681 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 682 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 683 scif_schedrx(sc); 684 } 685 } else { 686 sc->sc_r_hiwat = scif_rbuf_hiwat; 687 sc->sc_r_lowat = scif_rbuf_lowat; 688 } 689 690 splx(s); 691 692 DPRINTF(("%s: scifparam\n", device_xname(sc->sc_dev))); 693 694 if (!ISSET(t->c_cflag, CHWFLOW)) { 695 if (sc->sc_tx_stopped) { 696 sc->sc_tx_stopped = 0; 697 scifstart(tp); 698 } 699 } 700 701 return (0); 702 } 703 704 static void 705 scif_iflush(struct scif_softc *sc) 706 { 707 int i; 708 709 i = scif_fdr_read() & SCFDR2_RECVCNT; 710 711 while (i > 0) { 712 (void)scif_frdr_read(); 713 scif_ssr_write(scif_ssr_read() & ~(SCSSR2_RDF | SCSSR2_DR)); 714 i--; 715 } 716 } 717 718 int 719 scifopen(dev_t dev, int flag, int mode, struct lwp *l) 720 { 721 struct scif_softc *sc; 722 struct tty *tp; 723 int s, s2; 724 int error; 725 726 sc = device_lookup_private(&scif_cd, SCIFUNIT(dev)); 727 if (sc == 0 || !ISSET(sc->sc_hwflags, SCIF_HW_DEV_OK) || 728 sc->sc_rbuf == NULL) 729 return (ENXIO); 730 731 if (!device_is_active(sc->sc_dev)) 732 return (ENXIO); 733 734 #ifdef KGDB 735 /* 736 * If this is the kgdb port, no other use is permitted. 737 */ 738 if (ISSET(sc->sc_hwflags, SCIF_HW_KGDB)) 739 return (EBUSY); 740 #endif /* KGDB */ 741 742 tp = sc->sc_tty; 743 744 if (kauth_authorize_device_tty(l->l_cred, KAUTH_DEVICE_TTY_OPEN, tp)) 745 return (EBUSY); 746 747 s = spltty(); 748 749 /* 750 * Do the following iff this is a first open. 751 */ 752 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 753 struct termios t; 754 755 tp->t_dev = dev; 756 757 s2 = splserial(); 758 759 /* Turn on interrupts. */ 760 scif_scr_write(scif_scr_read() | SCSCR2_TIE | SCSCR2_RIE); 761 762 splx(s2); 763 764 /* 765 * Initialize the termios status to the defaults. Add in the 766 * sticky bits from TIOCSFLAGS. 767 */ 768 t.c_ispeed = 0; 769 if (ISSET(sc->sc_hwflags, SCIF_HW_CONSOLE)) { 770 t.c_ospeed = scifcn_speed; /* XXX (msaitoh) */ 771 t.c_cflag = scifconscflag; 772 } else { 773 t.c_ospeed = TTYDEF_SPEED; 774 t.c_cflag = TTYDEF_CFLAG; 775 } 776 if (ISSET(sc->sc_swflags, TIOCFLAG_CLOCAL)) 777 SET(t.c_cflag, CLOCAL); 778 if (ISSET(sc->sc_swflags, TIOCFLAG_CRTSCTS)) 779 SET(t.c_cflag, CRTSCTS); 780 if (ISSET(sc->sc_swflags, TIOCFLAG_MDMBUF)) 781 SET(t.c_cflag, MDMBUF); 782 /* Make sure scifparam() will do something. */ 783 tp->t_ospeed = 0; 784 (void) scifparam(tp, &t); 785 tp->t_iflag = TTYDEF_IFLAG; 786 tp->t_oflag = TTYDEF_OFLAG; 787 tp->t_lflag = TTYDEF_LFLAG; 788 ttychars(tp); 789 ttsetwater(tp); 790 791 s2 = splserial(); 792 793 /* Clear the input ring, and unblock. */ 794 sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf; 795 sc->sc_rbavail = scif_rbuf_size; 796 scif_iflush(sc); 797 CLR(sc->sc_rx_flags, RX_ANY_BLOCK); 798 #if 0 799 /* XXX (msaitoh) */ 800 scif_hwiflow(sc); 801 #endif 802 803 DPRINTF(("%s: scifopen\n", device_xname(sc->sc_dev))); 804 805 splx(s2); 806 } 807 808 splx(s); 809 810 error = ttyopen(tp, SCIFDIALOUT(dev), ISSET(flag, O_NONBLOCK)); 811 if (error) 812 goto bad; 813 814 error = (*tp->t_linesw->l_open)(dev, tp); 815 if (error) 816 goto bad; 817 818 return (0); 819 820 bad: 821 822 return (error); 823 } 824 825 int 826 scifclose(dev_t dev, int flag, int mode, struct lwp *l) 827 { 828 struct scif_softc *sc; 829 struct tty *tp; 830 831 sc = device_lookup_private(&scif_cd, SCIFUNIT(dev)); 832 tp = sc->sc_tty; 833 834 /* XXX This is for cons.c. */ 835 if (!ISSET(tp->t_state, TS_ISOPEN)) 836 return (0); 837 838 (*tp->t_linesw->l_close)(tp, flag); 839 ttyclose(tp); 840 841 if (!device_is_active(sc->sc_dev)) 842 return (0); 843 844 return (0); 845 } 846 847 int 848 scifread(dev_t dev, struct uio *uio, int flag) 849 { 850 struct scif_softc *sc; 851 struct tty *tp; 852 853 sc = device_lookup_private(&scif_cd, SCIFUNIT(dev)); 854 tp = sc->sc_tty; 855 856 return ((*tp->t_linesw->l_read)(tp, uio, flag)); 857 } 858 859 int 860 scifwrite(dev_t dev, struct uio *uio, int flag) 861 { 862 struct scif_softc *sc; 863 struct tty *tp; 864 865 sc = device_lookup_private(&scif_cd, SCIFUNIT(dev)); 866 tp = sc->sc_tty; 867 868 return ((*tp->t_linesw->l_write)(tp, uio, flag)); 869 } 870 871 int 872 scifpoll(dev_t dev, int events, struct lwp *l) 873 { 874 struct scif_softc *sc; 875 struct tty *tp; 876 877 sc = device_lookup_private(&scif_cd, SCIFUNIT(dev)); 878 tp = sc->sc_tty; 879 880 return ((*tp->t_linesw->l_poll)(tp, events, l)); 881 } 882 883 struct tty * 884 sciftty(dev_t dev) 885 { 886 struct scif_softc *sc; 887 struct tty *tp; 888 889 sc = device_lookup_private(&scif_cd, SCIFUNIT(dev)); 890 tp = sc->sc_tty; 891 892 return (tp); 893 } 894 895 int 896 scifioctl(dev_t dev, u_long cmd, void *data, int flag, struct lwp *l) 897 { 898 struct scif_softc *sc; 899 struct tty *tp; 900 int error; 901 int s; 902 903 sc = device_lookup_private(&scif_cd, SCIFUNIT(dev)); 904 if (!device_is_active(sc->sc_dev)) 905 return (EIO); 906 907 tp = sc->sc_tty; 908 error = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, l); 909 if (error != EPASSTHROUGH) 910 return (error); 911 912 error = ttioctl(tp, cmd, data, flag, l); 913 if (error != EPASSTHROUGH) 914 return (error); 915 916 error = 0; 917 918 s = splserial(); 919 920 switch (cmd) { 921 case TIOCSBRK: 922 scif_break(sc, 1); 923 break; 924 925 case TIOCCBRK: 926 scif_break(sc, 0); 927 break; 928 929 case TIOCGFLAGS: 930 *(int *)data = sc->sc_swflags; 931 break; 932 933 case TIOCSFLAGS: 934 error = kauth_authorize_device_tty(l->l_cred, 935 KAUTH_DEVICE_TTY_PRIVSET, tp); 936 if (error) 937 break; 938 sc->sc_swflags = *(int *)data; 939 break; 940 941 default: 942 error = EPASSTHROUGH; 943 break; 944 } 945 946 splx(s); 947 948 return (error); 949 } 950 951 static void 952 scif_schedrx(struct scif_softc *sc) 953 { 954 955 sc->sc_rx_ready = 1; 956 957 /* Wake up the poller. */ 958 softint_schedule(sc->sc_si); 959 } 960 961 static void 962 scif_break(struct scif_softc *sc, int onoff) 963 { 964 965 if (onoff) 966 scif_ssr_write(scif_ssr_read() & ~SCSSR2_TDFE); 967 else 968 scif_ssr_write(scif_ssr_read() | SCSSR2_TDFE); 969 970 #if 0 /* XXX */ 971 if (!sc->sc_heldchange) { 972 if (sc->sc_tx_busy) { 973 sc->sc_heldtbc = sc->sc_tbc; 974 sc->sc_tbc = 0; 975 sc->sc_heldchange = 1; 976 } else 977 scif_loadchannelregs(sc); 978 } 979 #endif 980 } 981 982 /* 983 * Stop output, e.g., for ^S or output flush. 984 */ 985 void 986 scifstop(struct tty *tp, int flag) 987 { 988 struct scif_softc *sc; 989 int s; 990 991 sc = device_lookup_private(&scif_cd, SCIFUNIT(tp->t_dev)); 992 993 s = splserial(); 994 if (ISSET(tp->t_state, TS_BUSY)) { 995 /* Stop transmitting at the next chunk. */ 996 sc->sc_tbc = 0; 997 sc->sc_heldtbc = 0; 998 if (!ISSET(tp->t_state, TS_TTSTOP)) 999 SET(tp->t_state, TS_FLUSH); 1000 } 1001 splx(s); 1002 } 1003 1004 static void 1005 scifdiag(void *arg) 1006 { 1007 struct scif_softc *sc = arg; 1008 int overflows, floods; 1009 int s; 1010 1011 s = splserial(); 1012 overflows = sc->sc_overflows; 1013 sc->sc_overflows = 0; 1014 floods = sc->sc_floods; 1015 sc->sc_floods = 0; 1016 sc->sc_errors = 0; 1017 splx(s); 1018 1019 log(LOG_WARNING, "%s: %d silo overflow%s, %d ibuf flood%s\n", 1020 device_xname(sc->sc_dev), 1021 overflows, overflows == 1 ? "" : "s", 1022 floods, floods == 1 ? "" : "s"); 1023 } 1024 1025 static void 1026 scif_rxsoft(struct scif_softc *sc, struct tty *tp) 1027 { 1028 int (*rint)(int, struct tty *) = tp->t_linesw->l_rint; 1029 u_char *get, *end; 1030 u_int cc, scc; 1031 u_char ssr2; 1032 int code; 1033 int s; 1034 1035 end = sc->sc_ebuf; 1036 get = sc->sc_rbget; 1037 scc = cc = scif_rbuf_size - sc->sc_rbavail; 1038 1039 if (cc == scif_rbuf_size) { 1040 sc->sc_floods++; 1041 if (sc->sc_errors++ == 0) 1042 callout_reset(&sc->sc_diag_ch, 60 * hz, scifdiag, sc); 1043 } 1044 1045 while (cc) { 1046 code = get[0]; 1047 ssr2 = get[1]; 1048 if (ISSET(ssr2, SCSSR2_BRK | SCSSR2_FER | SCSSR2_PER)) { 1049 if (ISSET(ssr2, SCSSR2_BRK | SCSSR2_FER)) 1050 SET(code, TTY_FE); 1051 if (ISSET(ssr2, SCSSR2_PER)) 1052 SET(code, TTY_PE); 1053 } 1054 if ((*rint)(code, tp) == -1) { 1055 /* 1056 * The line discipline's buffer is out of space. 1057 */ 1058 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1059 /* 1060 * We're either not using flow control, or the 1061 * line discipline didn't tell us to block for 1062 * some reason. Either way, we have no way to 1063 * know when there's more space available, so 1064 * just drop the rest of the data. 1065 */ 1066 get += cc << 1; 1067 if (get >= end) 1068 get -= scif_rbuf_size << 1; 1069 cc = 0; 1070 } else { 1071 /* 1072 * Don't schedule any more receive processing 1073 * until the line discipline tells us there's 1074 * space available (through scifhwiflow()). 1075 * Leave the rest of the data in the input 1076 * buffer. 1077 */ 1078 SET(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1079 } 1080 break; 1081 } 1082 get += 2; 1083 if (get >= end) 1084 get = sc->sc_rbuf; 1085 cc--; 1086 } 1087 1088 if (cc != scc) { 1089 sc->sc_rbget = get; 1090 s = splserial(); 1091 cc = sc->sc_rbavail += scc - cc; 1092 /* Buffers should be ok again, release possible block. */ 1093 if (cc >= sc->sc_r_lowat) { 1094 if (ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 1095 CLR(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 1096 scif_scr_write(scif_scr_read() | SCSCR2_RIE); 1097 } 1098 #if 0 1099 if (ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED)) { 1100 CLR(sc->sc_rx_flags, RX_IBUF_BLOCKED); 1101 scif_hwiflow(sc); 1102 } 1103 #endif 1104 } 1105 splx(s); 1106 } 1107 } 1108 1109 static void 1110 scif_txsoft(struct scif_softc *sc, struct tty *tp) 1111 { 1112 1113 CLR(tp->t_state, TS_BUSY); 1114 if (ISSET(tp->t_state, TS_FLUSH)) 1115 CLR(tp->t_state, TS_FLUSH); 1116 else 1117 ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf)); 1118 (*tp->t_linesw->l_start)(tp); 1119 } 1120 1121 #if 0 /* XXX (msaitoh) */ 1122 static void 1123 scif_stsoft(struct scif_softc *sc, struct tty *tp) 1124 { 1125 u_char msr, delta; 1126 int s; 1127 1128 s = splserial(); 1129 msr = sc->sc_msr; 1130 delta = sc->sc_msr_delta; 1131 sc->sc_msr_delta = 0; 1132 splx(s); 1133 1134 if (ISSET(delta, sc->sc_msr_dcd)) { 1135 /* 1136 * Inform the tty layer that carrier detect changed. 1137 */ 1138 (void) (*tp->t_linesw->l_modem)(tp, ISSET(msr, MSR_DCD)); 1139 } 1140 1141 if (ISSET(delta, sc->sc_msr_cts)) { 1142 /* Block or unblock output according to flow control. */ 1143 if (ISSET(msr, sc->sc_msr_cts)) { 1144 sc->sc_tx_stopped = 0; 1145 (*tp->t_linesw->l_start)(tp); 1146 } else { 1147 sc->sc_tx_stopped = 1; 1148 } 1149 } 1150 1151 DPRINTF(("%s: scif_stsoft\n", device_xname(sc->sc_dev))); 1152 } 1153 #endif /* 0 */ 1154 1155 static void 1156 scifsoft(void *arg) 1157 { 1158 struct scif_softc *sc = arg; 1159 struct tty *tp; 1160 1161 if (!device_is_active(sc->sc_dev)) 1162 return; 1163 1164 tp = sc->sc_tty; 1165 1166 if (sc->sc_rx_ready) { 1167 sc->sc_rx_ready = 0; 1168 scif_rxsoft(sc, tp); 1169 } 1170 1171 #if 0 1172 if (sc->sc_st_check) { 1173 sc->sc_st_check = 0; 1174 scif_stsoft(sc, tp); 1175 } 1176 #endif 1177 1178 if (sc->sc_tx_done) { 1179 sc->sc_tx_done = 0; 1180 scif_txsoft(sc, tp); 1181 } 1182 } 1183 1184 static int 1185 scifintr(void *arg) 1186 { 1187 struct scif_softc *sc = arg; 1188 u_char *put, *end; 1189 u_int cc; 1190 u_short ssr2; 1191 int count; 1192 1193 if (!device_is_active(sc->sc_dev)) 1194 return (0); 1195 1196 end = sc->sc_ebuf; 1197 put = sc->sc_rbput; 1198 cc = sc->sc_rbavail; 1199 1200 do { 1201 ssr2 = scif_ssr_read(); 1202 if (ISSET(ssr2, SCSSR2_BRK)) { 1203 scif_ssr_write(scif_ssr_read() 1204 & ~(SCSSR2_ER | SCSSR2_BRK | SCSSR2_DR)); 1205 #ifdef DDB 1206 if (ISSET(sc->sc_hwflags, SCIF_HW_CONSOLE)) { 1207 console_debugger(); 1208 } 1209 #endif /* DDB */ 1210 #ifdef KGDB 1211 if (ISSET(sc->sc_hwflags, SCIF_HW_KGDB)) { 1212 kgdb_connect(1); 1213 } 1214 #endif /* KGDB */ 1215 } 1216 count = scif_fdr_read() & SCFDR2_RECVCNT; 1217 if (count != 0) { 1218 for (;;) { 1219 u_char c = scif_frdr_read(); 1220 u_char err = (u_char)(scif_ssr_read() & 0x00ff); 1221 1222 scif_ssr_write(scif_ssr_read() 1223 & ~(SCSSR2_ER | SCSSR2_RDF | SCSSR2_DR)); 1224 #ifdef SH4 1225 if (CPU_IS_SH4) 1226 scif_lsr_write(scif_lsr_read() 1227 & ~SCLSR2_ORER); 1228 #endif 1229 if ((cc > 0) && (count > 0)) { 1230 put[0] = c; 1231 put[1] = err; 1232 put += 2; 1233 if (put >= end) 1234 put = sc->sc_rbuf; 1235 cc--; 1236 count--; 1237 } else 1238 break; 1239 } 1240 1241 /* 1242 * Current string of incoming characters ended because 1243 * no more data was available or we ran out of space. 1244 * Schedule a receive event if any data was received. 1245 * If we're out of space, turn off receive interrupts. 1246 */ 1247 sc->sc_rbput = put; 1248 sc->sc_rbavail = cc; 1249 if (!ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) 1250 sc->sc_rx_ready = 1; 1251 1252 /* 1253 * See if we are in danger of overflowing a buffer. If 1254 * so, use hardware flow control to ease the pressure. 1255 */ 1256 if (!ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED) && 1257 cc < sc->sc_r_hiwat) { 1258 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 1259 #if 0 1260 scif_hwiflow(sc); 1261 #endif 1262 } 1263 1264 /* 1265 * If we're out of space, disable receive interrupts 1266 * until the queue has drained a bit. 1267 */ 1268 if (!cc) { 1269 SET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 1270 scif_scr_write(scif_scr_read() & ~SCSCR2_RIE); 1271 } 1272 } else { 1273 if (scif_ssr_read() & (SCSSR2_RDF | SCSSR2_DR)) { 1274 scif_scr_write(scif_scr_read() 1275 & ~(SCSCR2_TIE | SCSCR2_RIE)); 1276 delay(10); 1277 scif_scr_write(scif_scr_read() 1278 | SCSCR2_TIE | SCSCR2_RIE); 1279 continue; 1280 } 1281 } 1282 } while (scif_ssr_read() & (SCSSR2_RDF | SCSSR2_DR)); 1283 1284 #if 0 1285 msr = bus_space_read_1(iot, ioh, scif_msr); 1286 delta = msr ^ sc->sc_msr; 1287 sc->sc_msr = msr; 1288 if (ISSET(delta, sc->sc_msr_mask)) { 1289 SET(sc->sc_msr_delta, delta); 1290 1291 /* 1292 * Pulse-per-second clock signal on edge of DCD? 1293 */ 1294 if (ISSET(delta, sc->sc_ppsmask)) { 1295 struct timeval tv; 1296 if (ISSET(msr, sc->sc_ppsmask) == 1297 sc->sc_ppsassert) { 1298 /* XXX nanotime() */ 1299 microtime(&tv); 1300 TIMEVAL_TO_TIMESPEC(&tv, 1301 &sc->ppsinfo.assert_timestamp); 1302 if (sc->ppsparam.mode & PPS_OFFSETASSERT) { 1303 timespecadd(&sc->ppsinfo.assert_timestamp, 1304 &sc->ppsparam.assert_offset, 1305 &sc->ppsinfo.assert_timestamp); 1306 TIMESPEC_TO_TIMEVAL(&tv, &sc->ppsinfo.assert_timestamp); 1307 } 1308 1309 #ifdef PPS_SYNC 1310 if (sc->ppsparam.mode & PPS_HARDPPSONASSERT) 1311 hardpps(&tv, tv.tv_usec); 1312 #endif 1313 sc->ppsinfo.assert_sequence++; 1314 sc->ppsinfo.current_mode = 1315 sc->ppsparam.mode; 1316 1317 } else if (ISSET(msr, sc->sc_ppsmask) == 1318 sc->sc_ppsclear) { 1319 /* XXX nanotime() */ 1320 microtime(&tv); 1321 TIMEVAL_TO_TIMESPEC(&tv, 1322 &sc->ppsinfo.clear_timestamp); 1323 if (sc->ppsparam.mode & PPS_OFFSETCLEAR) { 1324 timespecadd(&sc->ppsinfo.clear_timestamp, 1325 &sc->ppsparam.clear_offset, 1326 &sc->ppsinfo.clear_timestamp); 1327 TIMESPEC_TO_TIMEVAL(&tv, &sc->ppsinfo.clear_timestamp); 1328 } 1329 1330 #ifdef PPS_SYNC 1331 if (sc->ppsparam.mode & PPS_HARDPPSONCLEAR) 1332 hardpps(&tv, tv.tv_usec); 1333 #endif 1334 sc->ppsinfo.clear_sequence++; 1335 sc->ppsinfo.current_mode = 1336 sc->ppsparam.mode; 1337 } 1338 } 1339 1340 /* 1341 * Stop output immediately if we lose the output 1342 * flow control signal or carrier detect. 1343 */ 1344 if (ISSET(~msr, sc->sc_msr_mask)) { 1345 sc->sc_tbc = 0; 1346 sc->sc_heldtbc = 0; 1347 DPRINTF(("%s: scifintr\n", device_xname(sc->sc_dev))); 1348 } 1349 1350 sc->sc_st_check = 1; 1351 } 1352 #endif 1353 1354 /* 1355 * Done handling any receive interrupts. See if data can be 1356 * transmitted as well. Schedule tx done event if no data left 1357 * and tty was marked busy. 1358 */ 1359 if (((scif_fdr_read() & SCFDR2_TXCNT) >> 8) != 16) { /* XXX (msaitoh) */ 1360 /* 1361 * If we've delayed a parameter change, do it now, and restart 1362 * output. 1363 */ 1364 if (sc->sc_heldchange) { 1365 sc->sc_heldchange = 0; 1366 sc->sc_tbc = sc->sc_heldtbc; 1367 sc->sc_heldtbc = 0; 1368 } 1369 1370 /* Output the next chunk of the contiguous buffer, if any. */ 1371 if (sc->sc_tbc > 0) { 1372 int n; 1373 int maxchars; 1374 int i; 1375 1376 n = sc->sc_tbc; 1377 maxchars = sc->sc_fifolen - 1378 ((scif_fdr_read() & SCFDR2_TXCNT) >> 8); 1379 if (n > maxchars) 1380 n = maxchars; 1381 1382 for (i = 0; i < n; i++) { 1383 scif_putc(*(sc->sc_tba)); 1384 sc->sc_tba++; 1385 } 1386 sc->sc_tbc -= n; 1387 } else { 1388 /* Disable transmit completion interrupts if necessary. */ 1389 #if 0 1390 if (ISSET(sc->sc_ier, IER_ETXRDY)) 1391 #endif 1392 scif_scr_write(scif_scr_read() & ~SCSCR2_TIE); 1393 1394 if (sc->sc_tx_busy) { 1395 sc->sc_tx_busy = 0; 1396 sc->sc_tx_done = 1; 1397 } 1398 } 1399 } 1400 1401 /* Wake up the poller. */ 1402 softint_schedule(sc->sc_si); 1403 1404 #ifdef RND_SCIF 1405 rnd_add_uint32(&sc->rnd_source, iir | lsr); 1406 #endif 1407 1408 return (1); 1409 } 1410 1411 void 1412 scifcnprobe(struct consdev *cp) 1413 { 1414 int maj; 1415 1416 /* locate the major number */ 1417 maj = cdevsw_lookup_major(&scif_cdevsw); 1418 1419 /* Initialize required fields. */ 1420 cp->cn_dev = makedev(maj, 0); 1421 if (scifconsole) 1422 cp->cn_pri = CN_REMOTE; 1423 else 1424 cp->cn_pri = CN_NORMAL; 1425 } 1426 1427 void 1428 scifcninit(struct consdev *cp) 1429 { 1430 1431 InitializeScif(scifcn_speed); 1432 scifisconsole = 1; 1433 } 1434 1435 int 1436 scifcngetc(dev_t dev) 1437 { 1438 int c; 1439 int s; 1440 1441 s = splserial(); 1442 c = scif_getc(); 1443 splx(s); 1444 1445 return (c); 1446 } 1447 1448 void 1449 scifcnputc(dev_t dev, int c) 1450 { 1451 int s; 1452 1453 s = splserial(); 1454 scif_putc((u_char)c); 1455 splx(s); 1456 } 1457 1458 #ifdef KGDB 1459 int 1460 scif_kgdb_init(void) 1461 { 1462 1463 if (strcmp(kgdb_devname, "scif") != 0) 1464 return (1); 1465 1466 if (scifisconsole) 1467 return (1); /* can't share with console */ 1468 1469 InitializeScif(kgdb_rate); 1470 1471 kgdb_attach((int (*)(void *))scifcngetc, 1472 (void (*)(void *, int))scifcnputc, NULL); 1473 kgdb_dev = 123; /* unneeded, only to satisfy some tests */ 1474 kgdb_attached = 1; 1475 1476 return (0); 1477 } 1478 #endif /* KGDB */ 1479
Indexes created Sat Sep 20 22:09:52 GMT 2025