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scif.c revision 1.21
      1  1.21      uch /* $NetBSD: scif.c,v 1.21 2002/02/22 19:44:04 uch Exp $ */
      2   1.1   itojun 
      3   1.1   itojun /*-
      4   1.1   itojun  * Copyright (C) 1999 T.Horiuchi and SAITOH Masanobu.  All rights reserved.
      5   1.1   itojun  *
      6   1.1   itojun  * Redistribution and use in source and binary forms, with or without
      7   1.1   itojun  * modification, are permitted provided that the following conditions
      8   1.1   itojun  * are met:
      9   1.1   itojun  * 1. Redistributions of source code must retain the above copyright
     10   1.1   itojun  *    notice, this list of conditions and the following disclaimer.
     11   1.1   itojun  * 2. Redistributions in binary form must reproduce the above copyright
     12   1.1   itojun  *    notice, this list of conditions and the following disclaimer in the
     13   1.1   itojun  *    documentation and/or other materials provided with the distribution.
     14   1.1   itojun  * 3. The name of the author may not be used to endorse or promote products
     15   1.1   itojun  *    derived from this software without specific prior written permission.
     16   1.1   itojun  *
     17   1.1   itojun  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     18   1.1   itojun  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     19   1.1   itojun  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     20   1.1   itojun  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     21   1.1   itojun  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     22   1.1   itojun  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     23   1.1   itojun  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     24   1.1   itojun  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     25   1.1   itojun  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
     26   1.1   itojun  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     27   1.1   itojun  */
     28   1.1   itojun 
     29   1.2  msaitoh /*-
     30   1.2  msaitoh  * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc.
     31   1.2  msaitoh  * All rights reserved.
     32   1.2  msaitoh  *
     33   1.2  msaitoh  * This code is derived from software contributed to The NetBSD Foundation
     34   1.2  msaitoh  * by Charles M. Hannum.
     35   1.2  msaitoh  *
     36   1.2  msaitoh  * Redistribution and use in source and binary forms, with or without
     37   1.2  msaitoh  * modification, are permitted provided that the following conditions
     38   1.2  msaitoh  * are met:
     39   1.2  msaitoh  * 1. Redistributions of source code must retain the above copyright
     40   1.2  msaitoh  *    notice, this list of conditions and the following disclaimer.
     41   1.2  msaitoh  * 2. Redistributions in binary form must reproduce the above copyright
     42   1.2  msaitoh  *    notice, this list of conditions and the following disclaimer in the
     43   1.2  msaitoh  *    documentation and/or other materials provided with the distribution.
     44   1.2  msaitoh  * 3. All advertising materials mentioning features or use of this software
     45   1.2  msaitoh  *    must display the following acknowledgement:
     46   1.2  msaitoh  *        This product includes software developed by the NetBSD
     47   1.2  msaitoh  *        Foundation, Inc. and its contributors.
     48   1.2  msaitoh  * 4. Neither the name of The NetBSD Foundation nor the names of its
     49   1.2  msaitoh  *    contributors may be used to endorse or promote products derived
     50   1.2  msaitoh  *    from this software without specific prior written permission.
     51   1.2  msaitoh  *
     52   1.2  msaitoh  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     53   1.2  msaitoh  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     54   1.2  msaitoh  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     55   1.2  msaitoh  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     56   1.2  msaitoh  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     57   1.2  msaitoh  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     58   1.2  msaitoh  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     59   1.2  msaitoh  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     60   1.2  msaitoh  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     61   1.2  msaitoh  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     62   1.2  msaitoh  * POSSIBILITY OF SUCH DAMAGE.
     63   1.2  msaitoh  */
     64   1.2  msaitoh 
     65   1.2  msaitoh /*
     66   1.2  msaitoh  * Copyright (c) 1991 The Regents of the University of California.
     67   1.2  msaitoh  * All rights reserved.
     68   1.2  msaitoh  *
     69   1.2  msaitoh  * Redistribution and use in source and binary forms, with or without
     70   1.2  msaitoh  * modification, are permitted provided that the following conditions
     71   1.2  msaitoh  * are met:
     72   1.2  msaitoh  * 1. Redistributions of source code must retain the above copyright
     73   1.2  msaitoh  *    notice, this list of conditions and the following disclaimer.
     74   1.2  msaitoh  * 2. Redistributions in binary form must reproduce the above copyright
     75   1.2  msaitoh  *    notice, this list of conditions and the following disclaimer in the
     76   1.2  msaitoh  *    documentation and/or other materials provided with the distribution.
     77   1.2  msaitoh  * 3. All advertising materials mentioning features or use of this software
     78   1.2  msaitoh  *    must display the following acknowledgement:
     79   1.2  msaitoh  *	This product includes software developed by the University of
     80   1.2  msaitoh  *	California, Berkeley and its contributors.
     81   1.2  msaitoh  * 4. Neither the name of the University nor the names of its contributors
     82   1.2  msaitoh  *    may be used to endorse or promote products derived from this software
     83   1.2  msaitoh  *    without specific prior written permission.
     84   1.2  msaitoh  *
     85   1.2  msaitoh  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     86   1.2  msaitoh  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     87   1.2  msaitoh  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     88   1.2  msaitoh  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     89   1.2  msaitoh  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     90   1.2  msaitoh  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     91   1.2  msaitoh  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     92   1.2  msaitoh  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     93   1.2  msaitoh  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     94   1.2  msaitoh  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     95   1.2  msaitoh  * SUCH DAMAGE.
     96   1.2  msaitoh  *
     97   1.2  msaitoh  *	@(#)com.c	7.5 (Berkeley) 5/16/91
     98   1.2  msaitoh  */
     99   1.2  msaitoh 
    100   1.2  msaitoh /*
    101   1.2  msaitoh  * SH internal serial driver
    102   1.2  msaitoh  *
    103   1.2  msaitoh  * This code is derived from both z8530tty.c and com.c
    104   1.2  msaitoh  */
    105   1.2  msaitoh 
    106  1.17    lukem #include "opt_kgdb.h"
    107   1.1   itojun #include "opt_scif.h"
    108   1.1   itojun 
    109   1.1   itojun #include <sys/param.h>
    110   1.1   itojun #include <sys/systm.h>
    111   1.1   itojun #include <sys/tty.h>
    112   1.1   itojun #include <sys/proc.h>
    113   1.1   itojun #include <sys/conf.h>
    114   1.1   itojun #include <sys/file.h>
    115   1.1   itojun #include <sys/syslog.h>
    116   1.1   itojun #include <sys/kernel.h>
    117   1.1   itojun #include <sys/device.h>
    118   1.1   itojun #include <sys/malloc.h>
    119   1.1   itojun 
    120   1.1   itojun #include <dev/cons.h>
    121   1.1   itojun 
    122   1.1   itojun #include <machine/cpu.h>
    123  1.21      uch #include <sh3/clock.h>
    124   1.1   itojun #include <sh3/scifreg.h>
    125  1.21      uch //#include <sh3/tmureg.h>
    126   1.1   itojun 
    127   1.1   itojun #include <machine/shbvar.h>
    128   1.1   itojun 
    129  1.20      uch static void	scifstart(struct tty *);
    130  1.20      uch static int	scifparam(struct tty *, struct termios *);
    131   1.1   itojun 
    132  1.20      uch void scifcnprobe(struct consdev *);
    133  1.20      uch void scifcninit(struct consdev *);
    134  1.20      uch void scifcnputc(dev_t, int);
    135  1.20      uch int scifcngetc(dev_t);
    136  1.20      uch void scifcnpoolc(dev_t, int);
    137  1.20      uch void scif_intr_init(void);
    138  1.20      uch int scifintr(void *);
    139   1.1   itojun 
    140   1.1   itojun struct scif_softc {
    141   1.1   itojun 	struct device sc_dev;		/* boilerplate */
    142   1.1   itojun 	struct tty *sc_tty;
    143   1.1   itojun 	void *sc_ih;
    144   1.1   itojun 
    145   1.8  thorpej 	struct callout sc_diag_ch;
    146   1.8  thorpej 
    147   1.1   itojun #if 0
    148   1.1   itojun 	bus_space_tag_t sc_iot;		/* ISA i/o space identifier */
    149   1.1   itojun 	bus_space_handle_t   sc_ioh;	/* ISA io handle */
    150   1.1   itojun 
    151   1.1   itojun 	int sc_drq;
    152   1.1   itojun 
    153   1.1   itojun 	int sc_frequency;
    154   1.1   itojun #endif
    155   1.1   itojun 
    156   1.1   itojun 	u_int sc_overflows,
    157   1.1   itojun 	      sc_floods,
    158   1.1   itojun 	      sc_errors;		/* number of retries so far */
    159   1.1   itojun 	u_char sc_status[7];		/* copy of registers */
    160   1.1   itojun 
    161   1.1   itojun 	int sc_hwflags;
    162   1.1   itojun 	int sc_swflags;
    163   1.1   itojun 	u_int sc_fifolen;
    164   1.1   itojun 
    165   1.1   itojun 	u_int sc_r_hiwat,
    166   1.1   itojun 	      sc_r_lowat;
    167   1.1   itojun 	u_char *volatile sc_rbget,
    168   1.1   itojun 	       *volatile sc_rbput;
    169   1.1   itojun  	volatile u_int sc_rbavail;
    170   1.1   itojun 	u_char *sc_rbuf,
    171   1.1   itojun 	       *sc_ebuf;
    172   1.1   itojun 
    173   1.1   itojun  	u_char *sc_tba;			/* transmit buffer address */
    174   1.1   itojun  	u_int sc_tbc,			/* transmit byte count */
    175   1.1   itojun 	      sc_heldtbc;
    176   1.1   itojun 
    177   1.1   itojun 	volatile u_char sc_rx_flags,
    178   1.1   itojun #define	RX_TTY_BLOCKED		0x01
    179   1.1   itojun #define	RX_TTY_OVERFLOWED	0x02
    180   1.1   itojun #define	RX_IBUF_BLOCKED		0x04
    181   1.1   itojun #define	RX_IBUF_OVERFLOWED	0x08
    182   1.1   itojun #define	RX_ANY_BLOCK		0x0f
    183   1.3  msaitoh 			sc_tx_busy,	/* working on an output chunk */
    184   1.3  msaitoh 			sc_tx_done,	/* done with one output chunk */
    185   1.2  msaitoh 			sc_tx_stopped,	/* H/W level stop (lost CTS) */
    186   1.2  msaitoh 			sc_st_check,	/* got a status interrupt */
    187   1.1   itojun 			sc_rx_ready;
    188   1.1   itojun 
    189   1.1   itojun 	volatile u_char sc_heldchange;
    190   1.1   itojun };
    191   1.1   itojun 
    192   1.1   itojun /* controller driver configuration */
    193  1.20      uch static int scif_match(struct device *, struct cfdata *, void *);
    194  1.20      uch static void scif_attach(struct device *, struct device *, void *);
    195   1.1   itojun 
    196  1.20      uch void	scif_break(struct scif_softc *, int);
    197  1.20      uch void	scif_iflush(struct scif_softc *);
    198   1.1   itojun 
    199   1.1   itojun #define	integrate	static inline
    200  1.15  thorpej #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS
    201  1.20      uch void 	scifsoft(void *);
    202   1.1   itojun #else
    203   1.1   itojun #ifndef __NO_SOFT_SERIAL_INTERRUPT
    204  1.20      uch void 	scifsoft(void);
    205   1.1   itojun #else
    206  1.20      uch void 	scifsoft(void *);
    207   1.1   itojun #endif
    208   1.1   itojun #endif
    209  1.20      uch integrate void scif_rxsoft(struct scif_softc *, struct tty *);
    210  1.20      uch integrate void scif_txsoft(struct scif_softc *, struct tty *);
    211  1.20      uch integrate void scif_stsoft(struct scif_softc *, struct tty *);
    212  1.20      uch integrate void scif_schedrx(struct scif_softc *);
    213  1.20      uch void	scifdiag(void *);
    214   1.1   itojun 
    215   1.1   itojun 
    216   1.1   itojun #define	SCIFUNIT_MASK		0x7ffff
    217   1.1   itojun #define	SCIFDIALOUT_MASK	0x80000
    218   1.1   itojun 
    219   1.1   itojun #define	SCIFUNIT(x)	(minor(x) & SCIFUNIT_MASK)
    220   1.1   itojun #define	SCIFDIALOUT(x)	(minor(x) & SCIFDIALOUT_MASK)
    221   1.1   itojun 
    222   1.1   itojun /* Macros to clear/set/test flags. */
    223   1.1   itojun #define SET(t, f)	(t) |= (f)
    224   1.1   itojun #define CLR(t, f)	(t) &= ~(f)
    225   1.1   itojun #define ISSET(t, f)	((t) & (f))
    226   1.1   itojun 
    227   1.1   itojun /* Hardware flag masks */
    228   1.1   itojun #define	SCIF_HW_NOIEN	0x01
    229   1.1   itojun #define	SCIF_HW_FIFO	0x02
    230   1.1   itojun #define	SCIF_HW_FLOW	0x08
    231   1.1   itojun #define	SCIF_HW_DEV_OK	0x20
    232   1.1   itojun #define	SCIF_HW_CONSOLE	0x40
    233   1.1   itojun #define	SCIF_HW_KGDB	0x80
    234   1.1   itojun 
    235   1.1   itojun /* Buffer size for character buffer */
    236   1.1   itojun #define	SCIF_RING_SIZE	2048
    237   1.1   itojun 
    238   1.1   itojun /* Stop input when 3/4 of the ring is full; restart when only 1/4 is full. */
    239   1.1   itojun u_int scif_rbuf_hiwat = (SCIF_RING_SIZE * 1) / 4;
    240   1.1   itojun u_int scif_rbuf_lowat = (SCIF_RING_SIZE * 3) / 4;
    241   1.1   itojun 
    242   1.1   itojun #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */
    243   1.1   itojun int scifconscflag = CONMODE;
    244   1.9  msaitoh int scifisconsole = 0;
    245   1.1   itojun 
    246   1.7  msaitoh #ifdef SCIFCN_SPEED
    247   1.7  msaitoh unsigned int scifcn_speed = SCIFCN_SPEED;
    248   1.7  msaitoh #else
    249   1.7  msaitoh unsigned int scifcn_speed = 9600;
    250   1.7  msaitoh #endif
    251   1.7  msaitoh 
    252   1.1   itojun #define	divrnd(n, q)	(((n)*2/(q)+1)/2)	/* divide and round off */
    253   1.1   itojun 
    254  1.15  thorpej #ifndef __HAVE_GENERIC_SOFT_INTERRUPTS
    255   1.1   itojun #ifdef __NO_SOFT_SERIAL_INTERRUPT
    256   1.1   itojun volatile int	scif_softintr_scheduled;
    257   1.8  thorpej struct callout scif_soft_ch = CALLOUT_INITIALIZER;
    258   1.1   itojun #endif
    259   1.1   itojun #endif
    260   1.1   itojun 
    261   1.1   itojun u_int scif_rbuf_size = SCIF_RING_SIZE;
    262   1.1   itojun 
    263   1.1   itojun struct cfattach scif_ca = {
    264   1.1   itojun 	sizeof(struct scif_softc), scif_match, scif_attach
    265   1.1   itojun };
    266   1.1   itojun 
    267   1.1   itojun extern struct cfdriver scif_cd;
    268   1.1   itojun 
    269   1.1   itojun cdev_decl(scif);
    270   1.1   itojun 
    271  1.20      uch void InitializeScif (unsigned int);
    272   1.1   itojun 
    273   1.1   itojun /*
    274   1.1   itojun  * following functions are debugging prupose only
    275   1.1   itojun  */
    276   1.1   itojun #define CR      0x0D
    277   1.1   itojun #define USART_ON (unsigned int)~0x08
    278   1.1   itojun 
    279  1.20      uch void scif_putc(unsigned char);
    280  1.20      uch unsigned char scif_getc(void);
    281  1.20      uch int ScifErrCheck(void);
    282   1.1   itojun 
    283   1.1   itojun /*
    284   1.1   itojun  * InitializeScif
    285   1.1   itojun  * : unsigned int bps;
    286   1.1   itojun  * : SCIF(Serial Communication Interface)
    287   1.1   itojun  */
    288   1.1   itojun 
    289   1.1   itojun void
    290  1.20      uch InitializeScif(unsigned int bps)
    291   1.1   itojun {
    292   1.1   itojun 
    293   1.1   itojun 	/* Initialize SCR */
    294   1.3  msaitoh 	SHREG_SCSCR2 = 0x00;
    295   1.1   itojun 
    296   1.6  msaitoh #if 0
    297   1.6  msaitoh 	SHREG_SCFCR2 = SCFCR2_TFRST | SCFCR2_RFRST | SCFCR2_MCE;
    298   1.6  msaitoh #else
    299   1.1   itojun 	SHREG_SCFCR2 = SCFCR2_TFRST | SCFCR2_RFRST;
    300   1.6  msaitoh #endif
    301   1.7  msaitoh 	/* Serial Mode Register */
    302   1.3  msaitoh 	SHREG_SCSMR2 = 0x00;	/* 8bit,NonParity,Even,1Stop */
    303   1.1   itojun 
    304   1.7  msaitoh 	/* Bit Rate Register */
    305  1.21      uch 	SHREG_SCBRR2 = divrnd(sh_clock_get_pclock(), 32 * bps) - 1;
    306   1.1   itojun 
    307   1.7  msaitoh 	/*
    308   1.7  msaitoh 	 * wait 1mSec, because Send/Recv must begin 1 bit period after
    309   1.7  msaitoh 	 * BRR is set.
    310   1.7  msaitoh 	 */
    311  1.21      uch 	delay(1000);
    312   1.1   itojun 
    313   1.6  msaitoh #if 0
    314   1.6  msaitoh 	SHREG_SCFCR2 = FIFO_RCV_TRIGGER_14 | FIFO_XMT_TRIGGER_1 | SCFCR2_MCE;
    315   1.6  msaitoh #else
    316   1.1   itojun 	SHREG_SCFCR2 = FIFO_RCV_TRIGGER_14 | FIFO_XMT_TRIGGER_1;
    317   1.6  msaitoh #endif
    318   1.1   itojun 
    319  1.18      wiz 	/* Send permission, Receive permission ON */
    320   1.3  msaitoh 	SHREG_SCSCR2 = SCSCR2_TE | SCSCR2_RE;
    321   1.1   itojun 
    322   1.7  msaitoh 	/* Serial Status Register */
    323   1.3  msaitoh 	SHREG_SCSSR2 &= SCSSR2_TDFE;	/* Clear Status */
    324   1.1   itojun }
    325   1.1   itojun 
    326   1.1   itojun 
    327   1.1   itojun /*
    328  1.14  msaitoh  * scif_putc
    329   1.1   itojun  *  : unsigned char c;
    330   1.1   itojun  */
    331   1.1   itojun 
    332   1.1   itojun void
    333  1.20      uch scif_putc(unsigned char c)
    334   1.1   itojun {
    335   1.1   itojun 
    336  1.14  msaitoh 	if (c == '\n')
    337  1.14  msaitoh 		scif_putc('\r');
    338  1.14  msaitoh 
    339   1.1   itojun 	/* wait for ready */
    340   1.1   itojun 	while ((SHREG_SCFDR2 & SCFDR2_TXCNT) == SCFDR2_TXF_FULL)
    341   1.1   itojun 		;
    342   1.1   itojun 
    343   1.1   itojun 	/* write send data to send register */
    344   1.1   itojun 	SHREG_SCFTDR2 = c;
    345   1.1   itojun 
    346   1.1   itojun 	/* clear ready flag */
    347   1.1   itojun 	SHREG_SCSSR2 &= ~(SCSSR2_TDFE | SCSSR2_TEND);
    348   1.1   itojun }
    349   1.1   itojun 
    350   1.1   itojun /*
    351   1.1   itojun  * : ScifErrCheck
    352   1.1   itojun  *	0x80 = error
    353   1.1   itojun  *	0x08 = frame error
    354   1.1   itojun  *	0x04 = parity error
    355   1.1   itojun  */
    356   1.1   itojun int
    357   1.1   itojun ScifErrCheck(void)
    358   1.1   itojun {
    359   1.1   itojun 
    360   1.1   itojun 	return(SHREG_SCSSR2 & (SCSSR2_ER | SCSSR2_FER | SCSSR2_PER));
    361   1.1   itojun }
    362   1.1   itojun 
    363   1.1   itojun /*
    364  1.14  msaitoh  * scif_getc
    365   1.1   itojun  */
    366   1.1   itojun #if 0
    367   1.1   itojun /* Old code */
    368   1.1   itojun unsigned char
    369  1.14  msaitoh scif_getc(void)
    370   1.1   itojun {
    371   1.1   itojun 	unsigned char c, err_c;
    372   1.1   itojun 
    373   1.1   itojun 	while (((err_c = SHREG_SCSSR2)
    374   1.1   itojun 		& (SCSSR2_RDF | SCSSR2_ER | SCSSR2_FER | SCSSR2_PER | SCSSR2_DR)) == 0)
    375   1.1   itojun 		;
    376  1.10  msaitoh 	if ((err_c & (SCSSR2_ER | SCSSR2_FER | SCSSR2_PER)) != 0) {
    377  1.10  msaitoh 		SHREG_SCSSR2 &= ~SCSSR2_ER;
    378   1.1   itojun 		return(err_c |= 0x80);
    379  1.10  msaitoh 	}
    380   1.1   itojun 
    381   1.1   itojun 	c = SHREG_SCFRDR2;
    382   1.1   itojun 
    383  1.10  msaitoh 	SHREG_SCSSR2 &= ~(SCSSR2_ER | SCSSR2_RDF | SCSSR2_DR);
    384   1.1   itojun 
    385   1.1   itojun 	return(c);
    386   1.1   itojun }
    387   1.1   itojun #else
    388   1.1   itojun unsigned char
    389  1.14  msaitoh scif_getc(void)
    390   1.1   itojun {
    391   1.1   itojun 	unsigned char c, err_c;
    392   1.1   itojun 
    393  1.12  msaitoh 	while (1) {
    394  1.12  msaitoh 		/* wait for ready */
    395  1.12  msaitoh 		while ((SHREG_SCFDR2 & SCFDR2_RECVCNT) == 0)
    396  1.12  msaitoh 			;
    397   1.1   itojun 
    398  1.12  msaitoh 		c = SHREG_SCFRDR2;
    399  1.12  msaitoh 		err_c = SHREG_SCSSR2;
    400  1.12  msaitoh 		SHREG_SCSSR2 &= ~(SCSSR2_ER | SCSSR2_BRK | SCSSR2_RDF
    401  1.12  msaitoh 		    | SCSSR2_DR);
    402  1.12  msaitoh 		if ((err_c & (SCSSR2_ER | SCSSR2_BRK | SCSSR2_FER
    403  1.12  msaitoh 		    | SCSSR2_PER)) == 0) {
    404  1.12  msaitoh 			return(c);
    405  1.12  msaitoh 		}
    406  1.12  msaitoh 	}
    407   1.1   itojun 
    408   1.1   itojun }
    409   1.1   itojun #endif
    410   1.1   itojun 
    411   1.1   itojun #if 0
    412   1.1   itojun #define SCIF_MAX_UNITS 2
    413   1.1   itojun #else
    414   1.1   itojun #define SCIF_MAX_UNITS 1
    415   1.1   itojun #endif
    416   1.1   itojun 
    417   1.1   itojun 
    418   1.1   itojun static int
    419  1.20      uch scif_match(struct device *parent, struct cfdata *cfp, void *aux)
    420   1.1   itojun {
    421   1.1   itojun 	struct shb_attach_args *sa = aux;
    422   1.1   itojun 
    423   1.1   itojun 	if (strcmp(cfp->cf_driver->cd_name, "scif")
    424   1.1   itojun 	    || cfp->cf_unit >= SCIF_MAX_UNITS)
    425   1.1   itojun 		return 0;
    426   1.1   itojun 
    427   1.1   itojun 	sa->ia_iosize = 0x10;
    428   1.1   itojun 	return 1;
    429   1.1   itojun }
    430   1.1   itojun 
    431   1.1   itojun static void
    432  1.20      uch scif_attach(struct device *parent, struct device *self, void *aux)
    433   1.1   itojun {
    434   1.1   itojun 	struct scif_softc *sc = (struct scif_softc *)self;
    435   1.1   itojun 	struct tty *tp;
    436   1.1   itojun 	int irq;
    437   1.1   itojun 	struct shb_attach_args *ia = aux;
    438   1.1   itojun 
    439   1.1   itojun 	sc->sc_hwflags = 0;	/* XXX */
    440   1.1   itojun 	sc->sc_swflags = 0;	/* XXX */
    441   1.1   itojun 	sc->sc_fifolen = 16;
    442   1.1   itojun 
    443   1.1   itojun 	irq = ia->ia_irq;
    444   1.1   itojun 
    445   1.9  msaitoh 	if (scifisconsole) {
    446   1.9  msaitoh 		/* InitializeScif(scifcn_speed); */
    447   1.9  msaitoh 		SET(sc->sc_hwflags, SCIF_HW_CONSOLE);
    448   1.9  msaitoh 		SET(sc->sc_swflags, TIOCFLAG_SOFTCAR);
    449   1.9  msaitoh 		printf("\n%s: console\n", sc->sc_dev.dv_xname);
    450   1.9  msaitoh 	} else {
    451   1.9  msaitoh 		InitializeScif(9600);
    452   1.9  msaitoh 		printf("\n");
    453   1.9  msaitoh 	}
    454   1.1   itojun 
    455   1.8  thorpej 	callout_init(&sc->sc_diag_ch);
    456   1.8  thorpej 
    457   1.1   itojun #if 0
    458   1.1   itojun 	if (irq != IRQUNK) {
    459   1.1   itojun 		sc->sc_ih = shb_intr_establish(irq,
    460   1.1   itojun 		    IST_EDGE, IPL_SERIAL, scifintr, sc);
    461   1.1   itojun 	}
    462   1.1   itojun #else
    463   1.1   itojun 	if (irq != IRQUNK) {
    464   1.1   itojun 		sc->sc_ih = shb_intr_establish(SCIF_IRQ,
    465   1.1   itojun 		    IST_EDGE, IPL_SERIAL, scifintr, sc);
    466   1.1   itojun 	}
    467   1.1   itojun #endif
    468   1.1   itojun 
    469   1.9  msaitoh 	SET(sc->sc_hwflags, SCIF_HW_DEV_OK);
    470   1.1   itojun 
    471   1.1   itojun 	tp = ttymalloc();
    472   1.1   itojun 	tp->t_oproc = scifstart;
    473   1.1   itojun 	tp->t_param = scifparam;
    474   1.1   itojun 	tp->t_hwiflow = NULL;
    475   1.1   itojun 
    476   1.1   itojun 	sc->sc_tty = tp;
    477   1.1   itojun 	sc->sc_rbuf = malloc(scif_rbuf_size << 1, M_DEVBUF, M_NOWAIT);
    478   1.1   itojun 	if (sc->sc_rbuf == NULL) {
    479   1.1   itojun 		printf("%s: unable to allocate ring buffer\n",
    480   1.1   itojun 		    sc->sc_dev.dv_xname);
    481   1.1   itojun 		return;
    482   1.1   itojun 	}
    483   1.1   itojun 	sc->sc_ebuf = sc->sc_rbuf + (scif_rbuf_size << 1);
    484   1.1   itojun 
    485   1.1   itojun 	tty_attach(tp);
    486   1.1   itojun }
    487   1.1   itojun 
    488   1.1   itojun /*
    489   1.1   itojun  * Start or restart transmission.
    490   1.1   itojun  */
    491   1.1   itojun static void
    492  1.20      uch scifstart(struct tty *tp)
    493   1.1   itojun {
    494   1.1   itojun 	struct scif_softc *sc = scif_cd.cd_devs[SCIFUNIT(tp->t_dev)];
    495   1.1   itojun 	int s;
    496   1.1   itojun 
    497   1.1   itojun 	s = spltty();
    498   1.1   itojun 	if (ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP))
    499   1.1   itojun 		goto out;
    500   1.1   itojun 	if (sc->sc_tx_stopped)
    501   1.1   itojun 		goto out;
    502   1.1   itojun 
    503   1.1   itojun 	if (tp->t_outq.c_cc <= tp->t_lowat) {
    504   1.1   itojun 		if (ISSET(tp->t_state, TS_ASLEEP)) {
    505   1.1   itojun 			CLR(tp->t_state, TS_ASLEEP);
    506   1.1   itojun 			wakeup(&tp->t_outq);
    507   1.1   itojun 		}
    508   1.1   itojun 		selwakeup(&tp->t_wsel);
    509   1.1   itojun 		if (tp->t_outq.c_cc == 0)
    510   1.1   itojun 			goto out;
    511   1.1   itojun 	}
    512   1.1   itojun 
    513   1.1   itojun 	/* Grab the first contiguous region of buffer space. */
    514   1.1   itojun 	{
    515   1.1   itojun 		u_char *tba;
    516   1.1   itojun 		int tbc;
    517   1.1   itojun 
    518   1.1   itojun 		tba = tp->t_outq.c_cf;
    519   1.1   itojun 		tbc = ndqb(&tp->t_outq, 0);
    520   1.1   itojun 
    521   1.1   itojun 		(void)splserial();
    522   1.1   itojun 
    523   1.1   itojun 		sc->sc_tba = tba;
    524   1.1   itojun 		sc->sc_tbc = tbc;
    525   1.1   itojun 	}
    526   1.1   itojun 
    527   1.1   itojun 	SET(tp->t_state, TS_BUSY);
    528   1.1   itojun 	sc->sc_tx_busy = 1;
    529   1.1   itojun 
    530   1.1   itojun 	/* Enable transmit completion interrupts if necessary. */
    531   1.1   itojun 	SHREG_SCSCR2 |= SCSCR2_TIE | SCSCR2_RIE;
    532   1.1   itojun 
    533   1.1   itojun 	/* Output the first chunk of the contiguous buffer. */
    534   1.1   itojun 	{
    535   1.1   itojun 		int n;
    536   1.1   itojun 		int max;
    537   1.1   itojun 		int i;
    538   1.1   itojun 
    539   1.1   itojun 		n = sc->sc_tbc;
    540   1.1   itojun 		max = sc->sc_fifolen - ((SHREG_SCFDR2 & SCFDR2_TXCNT) >> 8);
    541   1.1   itojun 		if (n > max)
    542   1.1   itojun 			n = max;
    543   1.1   itojun 
    544   1.1   itojun 		for (i = 0; i < n; i++) {
    545  1.14  msaitoh 			scif_putc(*(sc->sc_tba));
    546   1.1   itojun 			sc->sc_tba++;
    547   1.1   itojun 		}
    548   1.1   itojun 		sc->sc_tbc -= n;
    549   1.1   itojun 	}
    550   1.1   itojun out:
    551   1.1   itojun 	splx(s);
    552   1.1   itojun 	return;
    553   1.1   itojun }
    554   1.1   itojun 
    555   1.1   itojun /*
    556   1.1   itojun  * Set SCIF tty parameters from termios.
    557   1.1   itojun  * XXX - Should just copy the whole termios after
    558   1.1   itojun  * making sure all the changes could be done.
    559   1.1   itojun  */
    560   1.1   itojun static int
    561  1.20      uch scifparam(struct tty *tp, struct termios *t)
    562   1.1   itojun {
    563   1.1   itojun 	struct scif_softc *sc = scif_cd.cd_devs[SCIFUNIT(tp->t_dev)];
    564   1.1   itojun 	int ospeed = t->c_ospeed;
    565   1.1   itojun 	int s;
    566   1.1   itojun 
    567   1.1   itojun 	if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0)
    568   1.1   itojun 		return (EIO);
    569   1.1   itojun 
    570   1.1   itojun 	/* Check requested parameters. */
    571   1.1   itojun 	if (ospeed < 0)
    572   1.1   itojun 		return (EINVAL);
    573   1.1   itojun 	if (t->c_ispeed && t->c_ispeed != t->c_ospeed)
    574   1.1   itojun 		return (EINVAL);
    575   1.1   itojun 
    576   1.1   itojun 	/*
    577   1.1   itojun 	 * For the console, always force CLOCAL and !HUPCL, so that the port
    578   1.1   itojun 	 * is always active.
    579   1.1   itojun 	 */
    580   1.1   itojun 	if (ISSET(sc->sc_swflags, TIOCFLAG_SOFTCAR) ||
    581   1.1   itojun 	    ISSET(sc->sc_hwflags, SCIF_HW_CONSOLE)) {
    582   1.1   itojun 		SET(t->c_cflag, CLOCAL);
    583   1.1   itojun 		CLR(t->c_cflag, HUPCL);
    584   1.1   itojun 	}
    585   1.1   itojun 
    586   1.1   itojun 	/*
    587   1.1   itojun 	 * If there were no changes, don't do anything.  This avoids dropping
    588   1.1   itojun 	 * input and improves performance when all we did was frob things like
    589   1.1   itojun 	 * VMIN and VTIME.
    590   1.1   itojun 	 */
    591   1.1   itojun 	if (tp->t_ospeed == t->c_ospeed &&
    592   1.1   itojun 	    tp->t_cflag == t->c_cflag)
    593   1.1   itojun 		return (0);
    594   1.1   itojun 
    595   1.1   itojun #if 0
    596   1.1   itojun /* XXX (msaitoh) */
    597   1.1   itojun 	lcr = ISSET(sc->sc_lcr, LCR_SBREAK) | cflag2lcr(t->c_cflag);
    598   1.1   itojun #endif
    599   1.1   itojun 
    600   1.1   itojun 	s = splserial();
    601   1.1   itojun 
    602   1.1   itojun 	/*
    603   1.1   itojun 	 * Set the flow control pins depending on the current flow control
    604   1.1   itojun 	 * mode.
    605   1.1   itojun 	 */
    606   1.1   itojun 	if (ISSET(t->c_cflag, CRTSCTS)) {
    607   1.1   itojun 		SHREG_SCFCR2 |= SCFCR2_MCE;
    608   1.1   itojun 	} else {
    609   1.1   itojun 		SHREG_SCFCR2 &= ~SCFCR2_MCE;
    610   1.1   itojun 	}
    611   1.1   itojun 
    612  1.21      uch 	SHREG_SCBRR2 = divrnd(sh_clock_get_pclock(), 32 * ospeed) -1;
    613   1.1   itojun 
    614   1.1   itojun 	/*
    615   1.1   itojun 	 * Set the FIFO threshold based on the receive speed.
    616   1.1   itojun 	 *
    617   1.1   itojun 	 *  * If it's a low speed, it's probably a mouse or some other
    618   1.1   itojun 	 *    interactive device, so set the threshold low.
    619   1.1   itojun 	 *  * If it's a high speed, trim the trigger level down to prevent
    620   1.1   itojun 	 *    overflows.
    621   1.1   itojun 	 *  * Otherwise set it a bit higher.
    622   1.1   itojun 	 */
    623   1.1   itojun #if 0
    624   1.1   itojun /* XXX (msaitoh) */
    625   1.1   itojun 	if (ISSET(sc->sc_hwflags, SCIF_HW_HAYESP))
    626   1.1   itojun 		sc->sc_fifo = FIFO_DMA_MODE | FIFO_ENABLE | FIFO_TRIGGER_8;
    627   1.1   itojun 	else if (ISSET(sc->sc_hwflags, SCIF_HW_FIFO))
    628   1.1   itojun 		sc->sc_fifo = FIFO_ENABLE |
    629   1.1   itojun 		    (t->c_ospeed <= 1200 ? FIFO_TRIGGER_1 :
    630   1.1   itojun 		     t->c_ospeed <= 38400 ? FIFO_TRIGGER_8 : FIFO_TRIGGER_4);
    631   1.1   itojun 	else
    632   1.1   itojun 		sc->sc_fifo = 0;
    633   1.1   itojun #endif
    634   1.1   itojun 
    635   1.1   itojun 	/* And copy to tty. */
    636   1.1   itojun 	tp->t_ispeed = 0;
    637   1.1   itojun 	tp->t_ospeed = t->c_ospeed;
    638   1.1   itojun 	tp->t_cflag = t->c_cflag;
    639   1.1   itojun 
    640   1.1   itojun 	if (!sc->sc_heldchange) {
    641   1.1   itojun 		if (sc->sc_tx_busy) {
    642   1.1   itojun 			sc->sc_heldtbc = sc->sc_tbc;
    643   1.1   itojun 			sc->sc_tbc = 0;
    644   1.1   itojun 			sc->sc_heldchange = 1;
    645   1.1   itojun 		}
    646   1.1   itojun #if 0
    647   1.1   itojun /* XXX (msaitoh) */
    648   1.1   itojun 		else
    649   1.1   itojun 			scif_loadchannelregs(sc);
    650   1.1   itojun #endif
    651   1.1   itojun 	}
    652   1.1   itojun 
    653   1.1   itojun 	if (!ISSET(t->c_cflag, CHWFLOW)) {
    654   1.1   itojun 		/* Disable the high water mark. */
    655   1.1   itojun 		sc->sc_r_hiwat = 0;
    656   1.1   itojun 		sc->sc_r_lowat = 0;
    657   1.1   itojun 		if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) {
    658   1.1   itojun 			CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED);
    659   1.1   itojun 			scif_schedrx(sc);
    660   1.1   itojun 		}
    661   1.1   itojun 	} else {
    662   1.1   itojun 		sc->sc_r_hiwat = scif_rbuf_hiwat;
    663   1.1   itojun 		sc->sc_r_lowat = scif_rbuf_lowat;
    664   1.1   itojun 	}
    665   1.1   itojun 
    666   1.1   itojun 	splx(s);
    667   1.1   itojun 
    668   1.1   itojun #ifdef SCIF_DEBUG
    669   1.1   itojun 	if (scif_debug)
    670   1.1   itojun 		scifstatus(sc, "scifparam ");
    671   1.1   itojun #endif
    672   1.1   itojun 
    673   1.1   itojun 	if (!ISSET(t->c_cflag, CHWFLOW)) {
    674   1.1   itojun 		if (sc->sc_tx_stopped) {
    675   1.1   itojun 			sc->sc_tx_stopped = 0;
    676   1.1   itojun 			scifstart(tp);
    677   1.1   itojun 		}
    678   1.1   itojun 	}
    679   1.1   itojun 
    680   1.1   itojun 	return (0);
    681   1.1   itojun }
    682   1.1   itojun 
    683   1.1   itojun void
    684  1.20      uch scif_iflush(struct scif_softc *sc)
    685   1.1   itojun {
    686   1.1   itojun 	int i;
    687   1.1   itojun 	unsigned char c;
    688   1.1   itojun 
    689   1.1   itojun 	i = SHREG_SCFDR2 & SCFDR2_RECVCNT;
    690   1.1   itojun 
    691   1.1   itojun 	while (i > 0) {
    692   1.1   itojun 		c = SHREG_SCFRDR2;
    693   1.1   itojun 		SHREG_SCSSR2 &= ~(SCSSR2_RDF | SCSSR2_DR);
    694   1.1   itojun 		i--;
    695   1.1   itojun 	}
    696   1.1   itojun }
    697   1.1   itojun 
    698   1.1   itojun int
    699  1.20      uch scifopen(dev_t dev, int flag, int mode, struct proc *p)
    700   1.1   itojun {
    701   1.1   itojun 	int unit = SCIFUNIT(dev);
    702   1.1   itojun 	struct scif_softc *sc;
    703   1.1   itojun 	struct tty *tp;
    704   1.1   itojun 	int s, s2;
    705   1.1   itojun 	int error;
    706   1.1   itojun 
    707   1.1   itojun 	if (unit >= scif_cd.cd_ndevs)
    708   1.1   itojun 		return (ENXIO);
    709   1.1   itojun 	sc = scif_cd.cd_devs[unit];
    710   1.1   itojun 	if (sc == 0 || !ISSET(sc->sc_hwflags, SCIF_HW_DEV_OK) ||
    711   1.1   itojun 	    sc->sc_rbuf == NULL)
    712   1.1   itojun 		return (ENXIO);
    713   1.1   itojun 
    714   1.1   itojun 	if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0)
    715   1.1   itojun 		return (ENXIO);
    716   1.1   itojun 
    717   1.1   itojun #ifdef KGDB
    718   1.1   itojun 	/*
    719   1.1   itojun 	 * If this is the kgdb port, no other use is permitted.
    720   1.1   itojun 	 */
    721   1.1   itojun 	if (ISSET(sc->sc_hwflags, SCIF_HW_KGDB))
    722   1.1   itojun 		return (EBUSY);
    723   1.1   itojun #endif
    724   1.1   itojun 
    725   1.1   itojun 	tp = sc->sc_tty;
    726   1.1   itojun 
    727   1.1   itojun 	if (ISSET(tp->t_state, TS_ISOPEN) &&
    728   1.1   itojun 	    ISSET(tp->t_state, TS_XCLUDE) &&
    729   1.1   itojun 	    p->p_ucred->cr_uid != 0)
    730   1.1   itojun 		return (EBUSY);
    731   1.1   itojun 
    732   1.1   itojun 	s = spltty();
    733   1.1   itojun 
    734   1.1   itojun 	/*
    735   1.1   itojun 	 * Do the following iff this is a first open.
    736   1.1   itojun 	 */
    737   1.1   itojun 	if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
    738   1.1   itojun 		struct termios t;
    739   1.1   itojun 
    740   1.1   itojun 		tp->t_dev = dev;
    741   1.1   itojun 
    742   1.1   itojun 		s2 = splserial();
    743   1.1   itojun 
    744   1.1   itojun 		/* Turn on interrupts. */
    745   1.1   itojun 		SHREG_SCSCR2 |= SCSCR2_TIE | SCSCR2_RIE;
    746   1.1   itojun 
    747   1.1   itojun 		splx(s2);
    748   1.1   itojun 
    749   1.1   itojun 		/*
    750   1.1   itojun 		 * Initialize the termios status to the defaults.  Add in the
    751   1.1   itojun 		 * sticky bits from TIOCSFLAGS.
    752   1.1   itojun 		 */
    753   1.1   itojun 		t.c_ispeed = 0;
    754   1.1   itojun 		if (ISSET(sc->sc_hwflags, SCIF_HW_CONSOLE)) {
    755   1.7  msaitoh 			t.c_ospeed = scifcn_speed;	/* XXX (msaitoh) */
    756   1.1   itojun 			t.c_cflag = scifconscflag;
    757   1.1   itojun 		} else {
    758   1.1   itojun 			t.c_ospeed = TTYDEF_SPEED;
    759   1.1   itojun 			t.c_cflag = TTYDEF_CFLAG;
    760   1.1   itojun 		}
    761   1.1   itojun 		if (ISSET(sc->sc_swflags, TIOCFLAG_CLOCAL))
    762   1.1   itojun 			SET(t.c_cflag, CLOCAL);
    763   1.1   itojun 		if (ISSET(sc->sc_swflags, TIOCFLAG_CRTSCTS))
    764   1.1   itojun 			SET(t.c_cflag, CRTSCTS);
    765   1.1   itojun 		if (ISSET(sc->sc_swflags, TIOCFLAG_MDMBUF))
    766   1.1   itojun 			SET(t.c_cflag, MDMBUF);
    767   1.1   itojun 		/* Make sure scifparam() will do something. */
    768   1.1   itojun 		tp->t_ospeed = 0;
    769   1.1   itojun 		(void) scifparam(tp, &t);
    770   1.1   itojun 		tp->t_iflag = TTYDEF_IFLAG;
    771   1.1   itojun 		tp->t_oflag = TTYDEF_OFLAG;
    772   1.1   itojun 		tp->t_lflag = TTYDEF_LFLAG;
    773   1.1   itojun 		ttychars(tp);
    774   1.1   itojun 		ttsetwater(tp);
    775   1.1   itojun 
    776   1.1   itojun 		s2 = splserial();
    777   1.1   itojun 
    778   1.1   itojun 		/* Clear the input ring, and unblock. */
    779   1.1   itojun 		sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf;
    780   1.1   itojun 		sc->sc_rbavail = scif_rbuf_size;
    781   1.1   itojun 		scif_iflush(sc);
    782   1.1   itojun 		CLR(sc->sc_rx_flags, RX_ANY_BLOCK);
    783   1.1   itojun #if 0
    784   1.1   itojun /* XXX (msaitoh) */
    785   1.1   itojun 		scif_hwiflow(sc);
    786   1.1   itojun #endif
    787   1.1   itojun 
    788   1.1   itojun #ifdef SCIF_DEBUG
    789   1.1   itojun 		if (scif_debug)
    790   1.1   itojun 			scifstatus(sc, "scifopen  ");
    791   1.1   itojun #endif
    792   1.1   itojun 
    793   1.1   itojun 		splx(s2);
    794   1.1   itojun 	}
    795   1.1   itojun 
    796   1.1   itojun 	splx(s);
    797   1.1   itojun 
    798   1.1   itojun 	error = ttyopen(tp, SCIFDIALOUT(dev), ISSET(flag, O_NONBLOCK));
    799   1.1   itojun 	if (error)
    800   1.1   itojun 		goto bad;
    801   1.1   itojun 
    802  1.13      eeh 	error = (*tp->t_linesw->l_open)(dev, tp);
    803   1.1   itojun 	if (error)
    804   1.1   itojun 		goto bad;
    805   1.1   itojun 
    806   1.1   itojun 	return (0);
    807   1.1   itojun 
    808   1.1   itojun bad:
    809   1.1   itojun 
    810   1.1   itojun 	return (error);
    811   1.1   itojun }
    812   1.1   itojun 
    813   1.1   itojun int
    814  1.20      uch scifclose(dev_t dev, int flag, int mode, struct proc *p)
    815   1.1   itojun {
    816   1.1   itojun 	struct scif_softc *sc = scif_cd.cd_devs[SCIFUNIT(dev)];
    817   1.1   itojun 	struct tty *tp = sc->sc_tty;
    818   1.1   itojun 
    819   1.1   itojun 	/* XXX This is for cons.c. */
    820   1.1   itojun 	if (!ISSET(tp->t_state, TS_ISOPEN))
    821   1.1   itojun 		return (0);
    822   1.1   itojun 
    823  1.13      eeh 	(*tp->t_linesw->l_close)(tp, flag);
    824   1.1   itojun 	ttyclose(tp);
    825   1.1   itojun 
    826   1.1   itojun 	if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0)
    827   1.1   itojun 		return (0);
    828   1.1   itojun 
    829   1.1   itojun 	return (0);
    830   1.1   itojun }
    831   1.1   itojun 
    832   1.1   itojun int
    833  1.20      uch scifread(dev_t dev, struct uio *uio, int flag)
    834   1.1   itojun {
    835   1.1   itojun 	struct scif_softc *sc = scif_cd.cd_devs[SCIFUNIT(dev)];
    836   1.1   itojun 	struct tty *tp = sc->sc_tty;
    837   1.1   itojun 
    838  1.13      eeh 	return ((*tp->t_linesw->l_read)(tp, uio, flag));
    839   1.1   itojun }
    840   1.1   itojun 
    841   1.1   itojun int
    842  1.20      uch scifwrite(dev_t dev, struct uio *uio, int flag)
    843   1.1   itojun {
    844   1.1   itojun 	struct scif_softc *sc = scif_cd.cd_devs[SCIFUNIT(dev)];
    845   1.1   itojun 	struct tty *tp = sc->sc_tty;
    846   1.1   itojun 
    847  1.13      eeh 	return ((*tp->t_linesw->l_write)(tp, uio, flag));
    848  1.16      scw }
    849  1.16      scw 
    850  1.16      scw int
    851  1.20      uch scifpoll(dev_t dev, int events, struct proc *p)
    852  1.16      scw {
    853  1.16      scw 	struct scif_softc *sc = scif_cd.cd_devs[SCIFUNIT(dev)];
    854  1.16      scw 	struct tty *tp = sc->sc_tty;
    855  1.16      scw 
    856  1.16      scw 	return ((*tp->t_linesw->l_poll)(tp, events, p));
    857   1.1   itojun }
    858   1.1   itojun 
    859   1.1   itojun struct tty *
    860  1.20      uch sciftty(dev_t dev)
    861   1.1   itojun {
    862   1.1   itojun 	struct scif_softc *sc = scif_cd.cd_devs[SCIFUNIT(dev)];
    863   1.1   itojun 	struct tty *tp = sc->sc_tty;
    864   1.1   itojun 
    865   1.1   itojun 	return (tp);
    866   1.1   itojun }
    867   1.1   itojun 
    868   1.1   itojun int
    869  1.20      uch scifioctl(dev_t dev, u_long cmd, caddr_t data, int flag, struct proc *p)
    870   1.1   itojun {
    871   1.1   itojun 	struct scif_softc *sc = scif_cd.cd_devs[SCIFUNIT(dev)];
    872   1.1   itojun 	struct tty *tp = sc->sc_tty;
    873   1.1   itojun 	int error;
    874   1.1   itojun 	int s;
    875   1.1   itojun 
    876   1.1   itojun 	if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0)
    877   1.1   itojun 		return (EIO);
    878   1.1   itojun 
    879  1.13      eeh 	error = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, p);
    880   1.1   itojun 	if (error >= 0)
    881   1.1   itojun 		return (error);
    882   1.1   itojun 
    883   1.1   itojun 	error = ttioctl(tp, cmd, data, flag, p);
    884   1.1   itojun 	if (error >= 0)
    885   1.1   itojun 		return (error);
    886   1.1   itojun 
    887   1.1   itojun 	error = 0;
    888   1.1   itojun 
    889   1.1   itojun 	s = splserial();
    890   1.1   itojun 
    891   1.1   itojun 	switch (cmd) {
    892   1.1   itojun 	case TIOCSBRK:
    893   1.1   itojun 		scif_break(sc, 1);
    894   1.1   itojun 		break;
    895   1.1   itojun 
    896   1.1   itojun 	case TIOCCBRK:
    897   1.1   itojun 		scif_break(sc, 0);
    898   1.1   itojun 		break;
    899   1.6  msaitoh 
    900   1.1   itojun 	case TIOCGFLAGS:
    901   1.1   itojun 		*(int *)data = sc->sc_swflags;
    902   1.1   itojun 		break;
    903   1.1   itojun 
    904   1.1   itojun 	case TIOCSFLAGS:
    905   1.1   itojun 		error = suser(p->p_ucred, &p->p_acflag);
    906   1.1   itojun 		if (error)
    907   1.1   itojun 			break;
    908   1.1   itojun 		sc->sc_swflags = *(int *)data;
    909   1.1   itojun 		break;
    910   1.1   itojun 
    911   1.1   itojun 	default:
    912   1.1   itojun 		error = ENOTTY;
    913   1.1   itojun 		break;
    914   1.1   itojun 	}
    915   1.1   itojun 
    916   1.1   itojun 	splx(s);
    917   1.1   itojun 
    918   1.1   itojun 	return (error);
    919   1.1   itojun }
    920   1.1   itojun 
    921   1.1   itojun integrate void
    922  1.20      uch scif_schedrx(struct scif_softc *sc)
    923   1.1   itojun {
    924   1.1   itojun 
    925   1.1   itojun 	sc->sc_rx_ready = 1;
    926   1.1   itojun 
    927   1.1   itojun 	/* Wake up the poller. */
    928  1.15  thorpej #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS
    929   1.1   itojun 	softintr_schedule(sc->sc_si);
    930   1.1   itojun #else
    931   1.1   itojun #ifndef __NO_SOFT_SERIAL_INTERRUPT
    932   1.1   itojun 	setsoftserial();
    933   1.1   itojun #else
    934   1.1   itojun 	if (!scif_softintr_scheduled) {
    935   1.1   itojun 		scif_softintr_scheduled = 1;
    936   1.8  thorpej 		callout_reset(&scif_soft_ch, 1, scifsoft, NULL);
    937   1.1   itojun 	}
    938   1.1   itojun #endif
    939   1.1   itojun #endif
    940   1.1   itojun }
    941   1.1   itojun 
    942   1.6  msaitoh void
    943  1.20      uch scif_break(struct scif_softc *sc, int onoff)
    944   1.6  msaitoh {
    945   1.6  msaitoh 
    946   1.6  msaitoh 	if (onoff)
    947   1.6  msaitoh 		SHREG_SCSSR2 &= ~SCSSR2_TDFE;
    948   1.6  msaitoh 	else
    949   1.6  msaitoh 		SHREG_SCSSR2 |= SCSSR2_TDFE;
    950   1.6  msaitoh 
    951   1.6  msaitoh #if 0	/* XXX */
    952   1.6  msaitoh 	if (!sc->sc_heldchange) {
    953   1.6  msaitoh 		if (sc->sc_tx_busy) {
    954   1.6  msaitoh 			sc->sc_heldtbc = sc->sc_tbc;
    955   1.6  msaitoh 			sc->sc_tbc = 0;
    956   1.6  msaitoh 			sc->sc_heldchange = 1;
    957   1.6  msaitoh 		} else
    958   1.6  msaitoh 			scif_loadchannelregs(sc);
    959   1.6  msaitoh 	}
    960   1.6  msaitoh #endif
    961   1.6  msaitoh }
    962   1.6  msaitoh 
    963   1.1   itojun /*
    964   1.1   itojun  * Stop output, e.g., for ^S or output flush.
    965   1.1   itojun  */
    966   1.1   itojun void
    967  1.20      uch scifstop(struct tty *tp, int flag)
    968   1.1   itojun {
    969   1.1   itojun 	struct scif_softc *sc = scif_cd.cd_devs[SCIFUNIT(tp->t_dev)];
    970   1.1   itojun 	int s;
    971   1.1   itojun 
    972   1.1   itojun 	s = splserial();
    973   1.1   itojun 	if (ISSET(tp->t_state, TS_BUSY)) {
    974   1.1   itojun 		/* Stop transmitting at the next chunk. */
    975   1.1   itojun 		sc->sc_tbc = 0;
    976   1.1   itojun 		sc->sc_heldtbc = 0;
    977   1.1   itojun 		if (!ISSET(tp->t_state, TS_TTSTOP))
    978   1.1   itojun 			SET(tp->t_state, TS_FLUSH);
    979   1.1   itojun 	}
    980   1.1   itojun 	splx(s);
    981   1.1   itojun }
    982   1.1   itojun 
    983   1.1   itojun void
    984   1.1   itojun scif_intr_init()
    985   1.1   itojun {
    986   1.1   itojun 	/* XXX */
    987   1.1   itojun }
    988   1.1   itojun 
    989   1.1   itojun void
    990  1.20      uch scifdiag(void *arg)
    991   1.1   itojun {
    992   1.1   itojun 	struct scif_softc *sc = arg;
    993   1.1   itojun 	int overflows, floods;
    994   1.1   itojun 	int s;
    995   1.1   itojun 
    996   1.1   itojun 	s = splserial();
    997   1.1   itojun 	overflows = sc->sc_overflows;
    998   1.1   itojun 	sc->sc_overflows = 0;
    999   1.1   itojun 	floods = sc->sc_floods;
   1000   1.1   itojun 	sc->sc_floods = 0;
   1001   1.1   itojun 	sc->sc_errors = 0;
   1002   1.1   itojun 	splx(s);
   1003   1.1   itojun 
   1004   1.1   itojun 	log(LOG_WARNING, "%s: %d silo overflow%s, %d ibuf flood%s\n",
   1005   1.1   itojun 	    sc->sc_dev.dv_xname,
   1006   1.1   itojun 	    overflows, overflows == 1 ? "" : "s",
   1007   1.1   itojun 	    floods, floods == 1 ? "" : "s");
   1008   1.1   itojun }
   1009   1.1   itojun 
   1010   1.1   itojun integrate void
   1011  1.20      uch scif_rxsoft(struct scif_softc *sc, struct tty *tp)
   1012   1.1   itojun {
   1013  1.20      uch 	int (*rint)(int c, struct tty *tp) = tp->t_linesw->l_rint;
   1014   1.1   itojun 	u_char *get, *end;
   1015   1.1   itojun 	u_int cc, scc;
   1016   1.1   itojun 	u_char ssr2;
   1017   1.1   itojun 	int code;
   1018   1.1   itojun 	int s;
   1019   1.1   itojun 
   1020   1.1   itojun 	end = sc->sc_ebuf;
   1021   1.1   itojun 	get = sc->sc_rbget;
   1022   1.1   itojun 	scc = cc = scif_rbuf_size - sc->sc_rbavail;
   1023   1.1   itojun 
   1024   1.1   itojun 	if (cc == scif_rbuf_size) {
   1025   1.1   itojun 		sc->sc_floods++;
   1026   1.1   itojun 		if (sc->sc_errors++ == 0)
   1027  1.11  msaitoh 			callout_reset(&sc->sc_diag_ch, 60 * hz, scifdiag, sc);
   1028   1.1   itojun 	}
   1029   1.1   itojun 
   1030   1.1   itojun 	while (cc) {
   1031   1.1   itojun 		code = get[0];
   1032   1.1   itojun 		ssr2 = get[1];
   1033   1.6  msaitoh 		if (ISSET(ssr2, SCSSR2_BRK | SCSSR2_FER | SCSSR2_PER)) {
   1034   1.6  msaitoh 			if (ISSET(ssr2, SCSSR2_BRK | SCSSR2_FER))
   1035   1.1   itojun 				SET(code, TTY_FE);
   1036   1.1   itojun 			if (ISSET(ssr2, SCSSR2_PER))
   1037   1.1   itojun 				SET(code, TTY_PE);
   1038   1.1   itojun 		}
   1039   1.1   itojun 		if ((*rint)(code, tp) == -1) {
   1040   1.1   itojun 			/*
   1041   1.1   itojun 			 * The line discipline's buffer is out of space.
   1042   1.1   itojun 			 */
   1043   1.1   itojun 			if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) {
   1044   1.1   itojun 				/*
   1045   1.1   itojun 				 * We're either not using flow control, or the
   1046   1.1   itojun 				 * line discipline didn't tell us to block for
   1047   1.1   itojun 				 * some reason.  Either way, we have no way to
   1048   1.1   itojun 				 * know when there's more space available, so
   1049   1.1   itojun 				 * just drop the rest of the data.
   1050   1.1   itojun 				 */
   1051   1.1   itojun 				get += cc << 1;
   1052   1.1   itojun 				if (get >= end)
   1053   1.1   itojun 					get -= scif_rbuf_size << 1;
   1054   1.1   itojun 				cc = 0;
   1055   1.1   itojun 			} else {
   1056   1.1   itojun 				/*
   1057   1.1   itojun 				 * Don't schedule any more receive processing
   1058   1.1   itojun 				 * until the line discipline tells us there's
   1059   1.1   itojun 				 * space available (through scifhwiflow()).
   1060   1.1   itojun 				 * Leave the rest of the data in the input
   1061   1.1   itojun 				 * buffer.
   1062   1.1   itojun 				 */
   1063   1.1   itojun 				SET(sc->sc_rx_flags, RX_TTY_OVERFLOWED);
   1064   1.1   itojun 			}
   1065   1.1   itojun 			break;
   1066   1.1   itojun 		}
   1067   1.1   itojun 		get += 2;
   1068   1.1   itojun 		if (get >= end)
   1069   1.1   itojun 			get = sc->sc_rbuf;
   1070   1.1   itojun 		cc--;
   1071   1.1   itojun 	}
   1072   1.1   itojun 
   1073   1.1   itojun 	if (cc != scc) {
   1074   1.1   itojun 		sc->sc_rbget = get;
   1075   1.1   itojun 		s = splserial();
   1076   1.1   itojun 		cc = sc->sc_rbavail += scc - cc;
   1077   1.1   itojun 		/* Buffers should be ok again, release possible block. */
   1078   1.1   itojun 		if (cc >= sc->sc_r_lowat) {
   1079   1.1   itojun 			if (ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) {
   1080   1.1   itojun 				CLR(sc->sc_rx_flags, RX_IBUF_OVERFLOWED);
   1081   1.1   itojun 				SHREG_SCSCR2 |= SCSCR2_RIE;
   1082   1.1   itojun 			}
   1083   1.1   itojun #if 0
   1084   1.1   itojun 			if (ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED)) {
   1085   1.1   itojun 				CLR(sc->sc_rx_flags, RX_IBUF_BLOCKED);
   1086   1.1   itojun 				scif_hwiflow(sc);
   1087   1.1   itojun 			}
   1088   1.1   itojun #endif
   1089   1.1   itojun 		}
   1090   1.1   itojun 		splx(s);
   1091   1.1   itojun 	}
   1092   1.1   itojun }
   1093   1.1   itojun 
   1094   1.1   itojun integrate void
   1095  1.20      uch scif_txsoft(struct scif_softc *sc, struct tty *tp)
   1096   1.1   itojun {
   1097   1.1   itojun 
   1098   1.1   itojun 	CLR(tp->t_state, TS_BUSY);
   1099   1.1   itojun 	if (ISSET(tp->t_state, TS_FLUSH))
   1100   1.1   itojun 		CLR(tp->t_state, TS_FLUSH);
   1101   1.1   itojun 	else
   1102   1.1   itojun 		ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf));
   1103  1.13      eeh 	(*tp->t_linesw->l_start)(tp);
   1104   1.1   itojun }
   1105   1.1   itojun 
   1106   1.1   itojun integrate void
   1107  1.20      uch scif_stsoft(struct scif_softc *sc, struct tty *tp)
   1108   1.1   itojun {
   1109   1.1   itojun #if 0
   1110   1.1   itojun /* XXX (msaitoh) */
   1111   1.1   itojun 	u_char msr, delta;
   1112   1.1   itojun 	int s;
   1113   1.1   itojun 
   1114   1.1   itojun 	s = splserial();
   1115   1.1   itojun 	msr = sc->sc_msr;
   1116   1.1   itojun 	delta = sc->sc_msr_delta;
   1117   1.1   itojun 	sc->sc_msr_delta = 0;
   1118   1.1   itojun 	splx(s);
   1119   1.1   itojun 
   1120   1.1   itojun 	if (ISSET(delta, sc->sc_msr_dcd)) {
   1121   1.1   itojun 		/*
   1122   1.1   itojun 		 * Inform the tty layer that carrier detect changed.
   1123   1.1   itojun 		 */
   1124  1.13      eeh 		(void) (*tp->t_linesw->l_modem)(tp, ISSET(msr, MSR_DCD));
   1125   1.1   itojun 	}
   1126   1.1   itojun 
   1127   1.1   itojun 	if (ISSET(delta, sc->sc_msr_cts)) {
   1128   1.1   itojun 		/* Block or unblock output according to flow control. */
   1129   1.1   itojun 		if (ISSET(msr, sc->sc_msr_cts)) {
   1130   1.1   itojun 			sc->sc_tx_stopped = 0;
   1131  1.13      eeh 			(*tp->t_linesw->l_start)(tp);
   1132   1.1   itojun 		} else {
   1133   1.1   itojun 			sc->sc_tx_stopped = 1;
   1134   1.1   itojun 		}
   1135   1.1   itojun 	}
   1136   1.1   itojun 
   1137   1.1   itojun #ifdef SCIF_DEBUG
   1138   1.1   itojun 	if (scif_debug)
   1139   1.1   itojun 		scifstatus(sc, "scif_stsoft");
   1140   1.1   itojun #endif
   1141   1.1   itojun #endif
   1142   1.1   itojun }
   1143   1.1   itojun 
   1144  1.15  thorpej #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS
   1145   1.1   itojun void
   1146  1.20      uch scifsoft(void *arg)
   1147   1.1   itojun {
   1148   1.1   itojun 	struct scif_softc *sc = arg;
   1149   1.1   itojun 	struct tty *tp;
   1150   1.1   itojun 
   1151   1.1   itojun 	if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0)
   1152   1.1   itojun 		return;
   1153   1.1   itojun 
   1154   1.1   itojun 	{
   1155   1.1   itojun #else
   1156   1.1   itojun void
   1157   1.1   itojun #ifndef __NO_SOFT_SERIAL_INTERRUPT
   1158   1.1   itojun scifsoft()
   1159   1.1   itojun #else
   1160  1.20      uch scifsoft(void *arg)
   1161   1.1   itojun #endif
   1162   1.1   itojun {
   1163   1.1   itojun 	struct scif_softc	*sc;
   1164   1.1   itojun 	struct tty	*tp;
   1165   1.1   itojun 	int	unit;
   1166   1.1   itojun #ifdef __NO_SOFT_SERIAL_INTERRUPT
   1167   1.1   itojun 	int s;
   1168   1.1   itojun 
   1169   1.1   itojun 	s = splsoftserial();
   1170   1.1   itojun 	scif_softintr_scheduled = 0;
   1171   1.1   itojun #endif
   1172   1.1   itojun 
   1173   1.1   itojun 	for (unit = 0; unit < scif_cd.cd_ndevs; unit++) {
   1174   1.1   itojun 		sc = scif_cd.cd_devs[unit];
   1175   1.1   itojun 		if (sc == NULL || !ISSET(sc->sc_hwflags, SCIF_HW_DEV_OK))
   1176   1.1   itojun 			continue;
   1177   1.1   itojun 
   1178   1.1   itojun 		if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0)
   1179   1.1   itojun 			continue;
   1180   1.1   itojun 
   1181   1.1   itojun 		tp = sc->sc_tty;
   1182   1.1   itojun 		if (tp == NULL)
   1183   1.1   itojun 			continue;
   1184   1.1   itojun 		if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0)
   1185   1.1   itojun 			continue;
   1186   1.1   itojun #endif
   1187   1.1   itojun 		tp = sc->sc_tty;
   1188   1.1   itojun 
   1189   1.1   itojun 		if (sc->sc_rx_ready) {
   1190   1.1   itojun 			sc->sc_rx_ready = 0;
   1191   1.1   itojun 			scif_rxsoft(sc, tp);
   1192   1.1   itojun 		}
   1193   1.1   itojun 
   1194   1.1   itojun #if 0
   1195   1.1   itojun 		if (sc->sc_st_check) {
   1196   1.1   itojun 			sc->sc_st_check = 0;
   1197   1.1   itojun 			scif_stsoft(sc, tp);
   1198   1.1   itojun 		}
   1199   1.1   itojun #endif
   1200   1.1   itojun 
   1201   1.1   itojun 		if (sc->sc_tx_done) {
   1202   1.1   itojun 			sc->sc_tx_done = 0;
   1203   1.1   itojun 			scif_txsoft(sc, tp);
   1204   1.1   itojun 		}
   1205   1.1   itojun 	}
   1206   1.1   itojun 
   1207  1.15  thorpej #ifndef __HAVE_GENERIC_SOFT_INTERRUPTS
   1208   1.1   itojun #ifdef __NO_SOFT_SERIAL_INTERRUPT
   1209   1.1   itojun 	splx(s);
   1210   1.1   itojun #endif
   1211   1.1   itojun #endif
   1212   1.1   itojun }
   1213   1.1   itojun 
   1214   1.1   itojun int
   1215  1.20      uch scifintr(void *arg)
   1216   1.1   itojun {
   1217   1.1   itojun 	struct scif_softc *sc = arg;
   1218   1.1   itojun 	u_char *put, *end;
   1219   1.1   itojun 	u_int cc;
   1220   1.1   itojun 	u_short ssr2;
   1221   1.1   itojun 	int count;
   1222   1.1   itojun 
   1223   1.1   itojun 	if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0)
   1224   1.1   itojun 		return (0);
   1225   1.1   itojun 
   1226   1.1   itojun 	end = sc->sc_ebuf;
   1227   1.1   itojun 	put = sc->sc_rbput;
   1228   1.1   itojun 	cc = sc->sc_rbavail;
   1229   1.1   itojun 
   1230   1.7  msaitoh 	ssr2 = SHREG_SCSSR2;
   1231   1.7  msaitoh 	if (ISSET(ssr2, SCSSR2_BRK)) {
   1232   1.7  msaitoh 		SHREG_SCSSR2 &= ~(SCSSR2_ER | SCSSR2_BRK | SCSSR2_DR);
   1233   1.1   itojun #if defined(DDB) || defined(KGDB)
   1234   1.1   itojun #ifdef DDB
   1235   1.7  msaitoh 		if (ISSET(sc->sc_hwflags, SCIF_HW_CONSOLE)) {
   1236   1.7  msaitoh 			console_debugger();
   1237   1.7  msaitoh 		}
   1238   1.1   itojun #endif
   1239   1.1   itojun #ifdef KGDB
   1240   1.7  msaitoh 		if (ISSET(sc->sc_hwflags, SCIF_HW_KGDB)) {
   1241   1.7  msaitoh 			kgdb_connect(1);
   1242   1.7  msaitoh 		}
   1243   1.1   itojun #endif
   1244   1.6  msaitoh #endif /* DDB || KGDB */
   1245   1.7  msaitoh 	}
   1246   1.7  msaitoh 	count = SHREG_SCFDR2 & SCFDR2_RECVCNT;
   1247   1.7  msaitoh 	if (count != 0) {
   1248   1.7  msaitoh 		while ((cc > 0) && (count > 0)) {
   1249   1.7  msaitoh 			put[0] = SHREG_SCFRDR2;
   1250   1.7  msaitoh 			put[1] = (u_char)(SHREG_SCSSR2 & 0x00ff);
   1251   1.7  msaitoh 
   1252  1.10  msaitoh 			SHREG_SCSSR2 &= ~(SCSSR2_ER | SCSSR2_RDF | SCSSR2_DR);
   1253   1.7  msaitoh 
   1254   1.7  msaitoh 			put += 2;
   1255   1.7  msaitoh 			if (put >= end)
   1256   1.7  msaitoh 				put = sc->sc_rbuf;
   1257   1.7  msaitoh 			cc--;
   1258   1.7  msaitoh 			count--;
   1259   1.1   itojun 		}
   1260   1.1   itojun 
   1261   1.7  msaitoh 		/*
   1262   1.7  msaitoh 		 * Current string of incoming characters ended because
   1263   1.7  msaitoh 		 * no more data was available or we ran out of space.
   1264   1.7  msaitoh 		 * Schedule a receive event if any data was received.
   1265   1.7  msaitoh 		 * If we're out of space, turn off receive interrupts.
   1266   1.7  msaitoh 		 */
   1267   1.7  msaitoh 		sc->sc_rbput = put;
   1268   1.7  msaitoh 		sc->sc_rbavail = cc;
   1269   1.7  msaitoh 		if (!ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED))
   1270   1.7  msaitoh 			sc->sc_rx_ready = 1;
   1271   1.1   itojun 
   1272   1.7  msaitoh 		/*
   1273   1.7  msaitoh 		 * See if we are in danger of overflowing a buffer. If
   1274   1.7  msaitoh 		 * so, use hardware flow control to ease the pressure.
   1275   1.7  msaitoh 		 */
   1276   1.7  msaitoh 		if (!ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED) &&
   1277   1.7  msaitoh 		    cc < sc->sc_r_hiwat) {
   1278   1.7  msaitoh 			SET(sc->sc_rx_flags, RX_IBUF_BLOCKED);
   1279   1.1   itojun #if 0
   1280   1.7  msaitoh 			scif_hwiflow(sc);
   1281   1.1   itojun #endif
   1282   1.7  msaitoh 		}
   1283   1.1   itojun 
   1284   1.7  msaitoh 		/*
   1285   1.7  msaitoh 		 * If we're out of space, disable receive interrupts
   1286   1.7  msaitoh 		 * until the queue has drained a bit.
   1287   1.7  msaitoh 		 */
   1288   1.7  msaitoh 		if (!cc) {
   1289   1.7  msaitoh 			SHREG_SCSCR2 &= ~SCSCR2_RIE;
   1290   1.7  msaitoh 		}
   1291   1.7  msaitoh 	} else {
   1292   1.7  msaitoh 		if (SHREG_SCSSR2 & (SCSSR2_RDF | SCSSR2_DR)) {
   1293   1.7  msaitoh 			SHREG_SCSCR2 &= ~(SCSCR2_TIE | SCSCR2_RIE);
   1294   1.1   itojun 		}
   1295   1.7  msaitoh 	}
   1296   1.1   itojun 
   1297   1.1   itojun #if 0
   1298   1.7  msaitoh 	msr = bus_space_read_1(iot, ioh, scif_msr);
   1299   1.7  msaitoh 	delta = msr ^ sc->sc_msr;
   1300   1.7  msaitoh 	sc->sc_msr = msr;
   1301   1.7  msaitoh 	if (ISSET(delta, sc->sc_msr_mask)) {
   1302   1.7  msaitoh 		SET(sc->sc_msr_delta, delta);
   1303   1.1   itojun 
   1304   1.7  msaitoh 		/*
   1305   1.7  msaitoh 		 * Pulse-per-second clock signal on edge of DCD?
   1306   1.7  msaitoh 		 */
   1307   1.7  msaitoh 		if (ISSET(delta, sc->sc_ppsmask)) {
   1308   1.7  msaitoh 			struct timeval tv;
   1309   1.7  msaitoh 			if (ISSET(msr, sc->sc_ppsmask) ==
   1310   1.7  msaitoh 			    sc->sc_ppsassert) {
   1311   1.7  msaitoh 				/* XXX nanotime() */
   1312   1.7  msaitoh 				microtime(&tv);
   1313   1.7  msaitoh 				TIMEVAL_TO_TIMESPEC(&tv,
   1314   1.7  msaitoh 						    &sc->ppsinfo.assert_timestamp);
   1315   1.7  msaitoh 				if (sc->ppsparam.mode & PPS_OFFSETASSERT) {
   1316   1.7  msaitoh 					timespecadd(&sc->ppsinfo.assert_timestamp,
   1317   1.1   itojun 						    &sc->ppsparam.assert_offset,
   1318   1.1   itojun 						    &sc->ppsinfo.assert_timestamp);
   1319   1.7  msaitoh 					TIMESPEC_TO_TIMEVAL(&tv, &sc->ppsinfo.assert_timestamp);
   1320   1.7  msaitoh 				}
   1321   1.1   itojun 
   1322   1.1   itojun #ifdef PPS_SYNC
   1323   1.7  msaitoh 				if (sc->ppsparam.mode & PPS_HARDPPSONASSERT)
   1324   1.7  msaitoh 					hardpps(&tv, tv.tv_usec);
   1325   1.1   itojun #endif
   1326   1.7  msaitoh 				sc->ppsinfo.assert_sequence++;
   1327   1.7  msaitoh 				sc->ppsinfo.current_mode =
   1328   1.7  msaitoh 					sc->ppsparam.mode;
   1329   1.7  msaitoh 
   1330   1.7  msaitoh 			} else if (ISSET(msr, sc->sc_ppsmask) ==
   1331   1.7  msaitoh 				   sc->sc_ppsclear) {
   1332   1.7  msaitoh 				/* XXX nanotime() */
   1333   1.7  msaitoh 				microtime(&tv);
   1334   1.7  msaitoh 				TIMEVAL_TO_TIMESPEC(&tv,
   1335   1.7  msaitoh 						    &sc->ppsinfo.clear_timestamp);
   1336   1.7  msaitoh 				if (sc->ppsparam.mode & PPS_OFFSETCLEAR) {
   1337   1.7  msaitoh 					timespecadd(&sc->ppsinfo.clear_timestamp,
   1338   1.1   itojun 						    &sc->ppsparam.clear_offset,
   1339   1.1   itojun 						    &sc->ppsinfo.clear_timestamp);
   1340   1.7  msaitoh 					TIMESPEC_TO_TIMEVAL(&tv, &sc->ppsinfo.clear_timestamp);
   1341   1.7  msaitoh 				}
   1342   1.1   itojun 
   1343   1.1   itojun #ifdef PPS_SYNC
   1344   1.7  msaitoh 				if (sc->ppsparam.mode & PPS_HARDPPSONCLEAR)
   1345   1.7  msaitoh 					hardpps(&tv, tv.tv_usec);
   1346   1.1   itojun #endif
   1347   1.7  msaitoh 				sc->ppsinfo.clear_sequence++;
   1348   1.7  msaitoh 				sc->ppsinfo.current_mode =
   1349   1.7  msaitoh 					sc->ppsparam.mode;
   1350   1.1   itojun 			}
   1351   1.7  msaitoh 		}
   1352   1.1   itojun 
   1353   1.7  msaitoh 		/*
   1354   1.7  msaitoh 		 * Stop output immediately if we lose the output
   1355   1.7  msaitoh 		 * flow control signal or carrier detect.
   1356   1.7  msaitoh 		 */
   1357   1.7  msaitoh 		if (ISSET(~msr, sc->sc_msr_mask)) {
   1358   1.7  msaitoh 			sc->sc_tbc = 0;
   1359   1.7  msaitoh 			sc->sc_heldtbc = 0;
   1360   1.1   itojun #ifdef SCIF_DEBUG
   1361   1.7  msaitoh 			if (scif_debug)
   1362   1.7  msaitoh 				scifstatus(sc, "scifintr  ");
   1363   1.1   itojun #endif
   1364   1.7  msaitoh 		}
   1365   1.1   itojun 
   1366   1.7  msaitoh 		sc->sc_st_check = 1;
   1367   1.7  msaitoh 	}
   1368   1.1   itojun #endif
   1369   1.1   itojun 
   1370   1.1   itojun 	/*
   1371   1.1   itojun 	 * Done handling any receive interrupts. See if data can be
   1372   1.1   itojun 	 * transmitted as well. Schedule tx done event if no data left
   1373   1.1   itojun 	 * and tty was marked busy.
   1374   1.1   itojun 	 */
   1375   1.7  msaitoh 	if (((SHREG_SCFDR2 & SCFDR2_TXCNT) >> 8) != 16) { /* XXX (msaitoh) */
   1376   1.1   itojun 		/*
   1377   1.1   itojun 		 * If we've delayed a parameter change, do it now, and restart
   1378   1.1   itojun 		 * output.
   1379   1.1   itojun 		 */
   1380   1.1   itojun 		if (sc->sc_heldchange) {
   1381   1.1   itojun 			sc->sc_heldchange = 0;
   1382   1.1   itojun 			sc->sc_tbc = sc->sc_heldtbc;
   1383   1.1   itojun 			sc->sc_heldtbc = 0;
   1384   1.1   itojun 		}
   1385   1.1   itojun 
   1386   1.1   itojun 		/* Output the next chunk of the contiguous buffer, if any. */
   1387   1.1   itojun 		if (sc->sc_tbc > 0) {
   1388   1.1   itojun 			int n;
   1389   1.1   itojun 			int max;
   1390   1.1   itojun 			int i;
   1391   1.1   itojun 
   1392   1.1   itojun 			n = sc->sc_tbc;
   1393   1.1   itojun 			max = sc->sc_fifolen -
   1394   1.1   itojun 				((SHREG_SCFDR2 & SCFDR2_TXCNT) >> 8);
   1395   1.1   itojun 			if (n > max)
   1396   1.1   itojun 				n = max;
   1397   1.1   itojun 
   1398   1.1   itojun 			for (i = 0; i < n; i++) {
   1399  1.14  msaitoh 				scif_putc(*(sc->sc_tba));
   1400   1.1   itojun 				sc->sc_tba++;
   1401   1.1   itojun 			}
   1402   1.1   itojun 			sc->sc_tbc -= n;
   1403   1.1   itojun 		} else {
   1404   1.1   itojun 			/* Disable transmit completion interrupts if necessary. */
   1405   1.1   itojun #if 0
   1406   1.1   itojun 			if (ISSET(sc->sc_ier, IER_ETXRDY))
   1407   1.1   itojun #endif
   1408   1.1   itojun 				SHREG_SCSCR2 &= ~SCSCR2_TIE;
   1409   1.1   itojun 
   1410   1.1   itojun 			if (sc->sc_tx_busy) {
   1411   1.1   itojun 				sc->sc_tx_busy = 0;
   1412   1.1   itojun 				sc->sc_tx_done = 1;
   1413   1.1   itojun 			}
   1414   1.1   itojun 		}
   1415   1.1   itojun 	}
   1416   1.1   itojun 
   1417   1.1   itojun 	/* Wake up the poller. */
   1418  1.15  thorpej #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS
   1419   1.1   itojun 	softintr_schedule(sc->sc_si);
   1420   1.1   itojun #else
   1421   1.1   itojun #ifndef __NO_SOFT_SERIAL_INTERRUPT
   1422   1.1   itojun 	setsoftserial();
   1423   1.1   itojun #else
   1424   1.1   itojun 	if (!scif_softintr_scheduled) {
   1425   1.1   itojun 		scif_softintr_scheduled = 1;
   1426   1.8  thorpej 		callout_reset(&scif_soft_ch, 1, scifsoft, NULL);
   1427   1.1   itojun 	}
   1428   1.1   itojun #endif
   1429   1.1   itojun #endif
   1430   1.1   itojun 
   1431   1.1   itojun #if NRND > 0 && defined(RND_SCIF)
   1432  1.20      uch rnd_add_uint32(&sc->rnd_source, iir | lsr);
   1433   1.1   itojun #endif
   1434   1.1   itojun 
   1435   1.1   itojun 	return (1);
   1436   1.1   itojun }
   1437   1.1   itojun 
   1438   1.1   itojun void
   1439  1.20      uch scifcnprobe(struct consdev *cp)
   1440   1.1   itojun {
   1441   1.1   itojun 	int maj;
   1442   1.1   itojun 
   1443   1.1   itojun 	/* locate the major number */
   1444   1.1   itojun 	for (maj = 0; maj < nchrdev; maj++)
   1445   1.1   itojun 		if (cdevsw[maj].d_open == scifopen)
   1446   1.1   itojun 			break;
   1447   1.1   itojun 
   1448   1.1   itojun 	/* Initialize required fields. */
   1449   1.1   itojun 	cp->cn_dev = makedev(maj, 0);
   1450   1.4  msaitoh #ifdef SCIFCONSOLE
   1451   1.4  msaitoh 	cp->cn_pri = CN_REMOTE;
   1452   1.4  msaitoh #else
   1453   1.1   itojun 	cp->cn_pri = CN_NORMAL;
   1454   1.1   itojun #endif
   1455   1.1   itojun }
   1456   1.1   itojun 
   1457   1.1   itojun void
   1458  1.20      uch scifcninit(struct consdev *cp)
   1459   1.1   itojun {
   1460   1.1   itojun 
   1461   1.7  msaitoh 	InitializeScif(scifcn_speed);
   1462   1.9  msaitoh 	scifisconsole = 1;
   1463   1.1   itojun }
   1464   1.1   itojun 
   1465   1.1   itojun int
   1466  1.20      uch scifcngetc(dev_t dev)
   1467   1.1   itojun {
   1468   1.1   itojun 	int c;
   1469   1.1   itojun 	int s;
   1470   1.1   itojun 
   1471   1.1   itojun 	s = splserial();
   1472   1.1   itojun 	c = scif_getc();
   1473   1.1   itojun 	splx(s);
   1474   1.1   itojun 
   1475   1.1   itojun 	return (c);
   1476   1.1   itojun }
   1477   1.1   itojun 
   1478   1.1   itojun void
   1479  1.20      uch scifcnputc(dev_t dev, int c)
   1480   1.1   itojun {
   1481   1.1   itojun 	int s;
   1482   1.1   itojun 
   1483   1.1   itojun 	s = splserial();
   1484  1.14  msaitoh 	scif_putc((u_char)c);
   1485   1.1   itojun 	splx(s);
   1486   1.1   itojun }
   1487