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scif.c revision 1.51
      1  1.51        ad /*	$NetBSD: scif.c,v 1.51 2007/07/09 20:52:27 ad Exp $ */
      2   1.1    itojun 
      3   1.1    itojun /*-
      4   1.1    itojun  * Copyright (C) 1999 T.Horiuchi and SAITOH Masanobu.  All rights reserved.
      5   1.1    itojun  *
      6   1.1    itojun  * Redistribution and use in source and binary forms, with or without
      7   1.1    itojun  * modification, are permitted provided that the following conditions
      8   1.1    itojun  * are met:
      9   1.1    itojun  * 1. Redistributions of source code must retain the above copyright
     10   1.1    itojun  *    notice, this list of conditions and the following disclaimer.
     11   1.1    itojun  * 2. Redistributions in binary form must reproduce the above copyright
     12   1.1    itojun  *    notice, this list of conditions and the following disclaimer in the
     13   1.1    itojun  *    documentation and/or other materials provided with the distribution.
     14   1.1    itojun  * 3. The name of the author may not be used to endorse or promote products
     15   1.1    itojun  *    derived from this software without specific prior written permission.
     16   1.1    itojun  *
     17   1.1    itojun  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     18   1.1    itojun  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     19   1.1    itojun  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     20   1.1    itojun  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     21   1.1    itojun  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     22   1.1    itojun  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     23   1.1    itojun  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     24   1.1    itojun  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     25   1.1    itojun  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
     26   1.1    itojun  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     27   1.1    itojun  */
     28   1.1    itojun 
     29   1.2   msaitoh /*-
     30   1.2   msaitoh  * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc.
     31   1.2   msaitoh  * All rights reserved.
     32   1.2   msaitoh  *
     33   1.2   msaitoh  * This code is derived from software contributed to The NetBSD Foundation
     34   1.2   msaitoh  * by Charles M. Hannum.
     35   1.2   msaitoh  *
     36   1.2   msaitoh  * Redistribution and use in source and binary forms, with or without
     37   1.2   msaitoh  * modification, are permitted provided that the following conditions
     38   1.2   msaitoh  * are met:
     39   1.2   msaitoh  * 1. Redistributions of source code must retain the above copyright
     40   1.2   msaitoh  *    notice, this list of conditions and the following disclaimer.
     41   1.2   msaitoh  * 2. Redistributions in binary form must reproduce the above copyright
     42   1.2   msaitoh  *    notice, this list of conditions and the following disclaimer in the
     43   1.2   msaitoh  *    documentation and/or other materials provided with the distribution.
     44   1.2   msaitoh  * 3. All advertising materials mentioning features or use of this software
     45   1.2   msaitoh  *    must display the following acknowledgement:
     46   1.2   msaitoh  *        This product includes software developed by the NetBSD
     47   1.2   msaitoh  *        Foundation, Inc. and its contributors.
     48   1.2   msaitoh  * 4. Neither the name of The NetBSD Foundation nor the names of its
     49   1.2   msaitoh  *    contributors may be used to endorse or promote products derived
     50   1.2   msaitoh  *    from this software without specific prior written permission.
     51   1.2   msaitoh  *
     52   1.2   msaitoh  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     53   1.2   msaitoh  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     54   1.2   msaitoh  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     55   1.2   msaitoh  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     56   1.2   msaitoh  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     57   1.2   msaitoh  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     58   1.2   msaitoh  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     59   1.2   msaitoh  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     60   1.2   msaitoh  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     61   1.2   msaitoh  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     62   1.2   msaitoh  * POSSIBILITY OF SUCH DAMAGE.
     63   1.2   msaitoh  */
     64   1.2   msaitoh 
     65   1.2   msaitoh /*
     66   1.2   msaitoh  * Copyright (c) 1991 The Regents of the University of California.
     67   1.2   msaitoh  * All rights reserved.
     68   1.2   msaitoh  *
     69   1.2   msaitoh  * Redistribution and use in source and binary forms, with or without
     70   1.2   msaitoh  * modification, are permitted provided that the following conditions
     71   1.2   msaitoh  * are met:
     72   1.2   msaitoh  * 1. Redistributions of source code must retain the above copyright
     73   1.2   msaitoh  *    notice, this list of conditions and the following disclaimer.
     74   1.2   msaitoh  * 2. Redistributions in binary form must reproduce the above copyright
     75   1.2   msaitoh  *    notice, this list of conditions and the following disclaimer in the
     76   1.2   msaitoh  *    documentation and/or other materials provided with the distribution.
     77  1.35       agc  * 3. Neither the name of the University nor the names of its contributors
     78   1.2   msaitoh  *    may be used to endorse or promote products derived from this software
     79   1.2   msaitoh  *    without specific prior written permission.
     80   1.2   msaitoh  *
     81   1.2   msaitoh  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     82   1.2   msaitoh  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     83   1.2   msaitoh  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     84   1.2   msaitoh  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     85   1.2   msaitoh  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     86   1.2   msaitoh  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     87   1.2   msaitoh  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     88   1.2   msaitoh  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     89   1.2   msaitoh  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     90   1.2   msaitoh  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     91   1.2   msaitoh  * SUCH DAMAGE.
     92   1.2   msaitoh  *
     93   1.2   msaitoh  *	@(#)com.c	7.5 (Berkeley) 5/16/91
     94   1.2   msaitoh  */
     95   1.2   msaitoh 
     96   1.2   msaitoh /*
     97   1.2   msaitoh  * SH internal serial driver
     98   1.2   msaitoh  *
     99   1.2   msaitoh  * This code is derived from both z8530tty.c and com.c
    100   1.2   msaitoh  */
    101  1.34     lukem 
    102  1.34     lukem #include <sys/cdefs.h>
    103  1.51        ad __KERNEL_RCSID(0, "$NetBSD: scif.c,v 1.51 2007/07/09 20:52:27 ad Exp $");
    104   1.2   msaitoh 
    105  1.17     lukem #include "opt_kgdb.h"
    106   1.1    itojun #include "opt_scif.h"
    107   1.1    itojun 
    108   1.1    itojun #include <sys/param.h>
    109   1.1    itojun #include <sys/systm.h>
    110   1.1    itojun #include <sys/tty.h>
    111   1.1    itojun #include <sys/proc.h>
    112   1.1    itojun #include <sys/conf.h>
    113   1.1    itojun #include <sys/file.h>
    114   1.1    itojun #include <sys/syslog.h>
    115   1.1    itojun #include <sys/kernel.h>
    116   1.1    itojun #include <sys/device.h>
    117   1.1    itojun #include <sys/malloc.h>
    118  1.22       uch #include <sys/kgdb.h>
    119  1.46      elad #include <sys/kauth.h>
    120   1.1    itojun 
    121   1.1    itojun #include <dev/cons.h>
    122   1.1    itojun 
    123  1.21       uch #include <sh3/clock.h>
    124  1.24       uch #include <sh3/exception.h>
    125   1.1    itojun #include <sh3/scifreg.h>
    126  1.24       uch #include <machine/intr.h>
    127  1.24       uch 
    128  1.22       uch #include <sh3/dev/scifvar.h>
    129   1.1    itojun 
    130  1.24       uch #include "locators.h"
    131   1.1    itojun 
    132  1.20       uch static void	scifstart(struct tty *);
    133  1.20       uch static int	scifparam(struct tty *, struct termios *);
    134  1.22       uch static int kgdb_attached;
    135   1.1    itojun 
    136  1.20       uch void scifcnprobe(struct consdev *);
    137  1.20       uch void scifcninit(struct consdev *);
    138  1.20       uch void scifcnputc(dev_t, int);
    139  1.20       uch int scifcngetc(dev_t);
    140  1.20       uch void scifcnpoolc(dev_t, int);
    141  1.20       uch void scif_intr_init(void);
    142  1.20       uch int scifintr(void *);
    143   1.1    itojun 
    144   1.1    itojun struct scif_softc {
    145   1.1    itojun 	struct device sc_dev;		/* boilerplate */
    146   1.1    itojun 	struct tty *sc_tty;
    147  1.24       uch 	void *sc_si;
    148   1.1    itojun 
    149  1.51        ad 	callout_t sc_diag_ch;
    150   1.8   thorpej 
    151   1.1    itojun #if 0
    152   1.1    itojun 	bus_space_tag_t sc_iot;		/* ISA i/o space identifier */
    153   1.1    itojun 	bus_space_handle_t   sc_ioh;	/* ISA io handle */
    154   1.1    itojun 
    155   1.1    itojun 	int sc_drq;
    156   1.1    itojun 
    157   1.1    itojun 	int sc_frequency;
    158   1.1    itojun #endif
    159   1.1    itojun 
    160   1.1    itojun 	u_int sc_overflows,
    161   1.1    itojun 	      sc_floods,
    162   1.1    itojun 	      sc_errors;		/* number of retries so far */
    163   1.1    itojun 	u_char sc_status[7];		/* copy of registers */
    164   1.1    itojun 
    165   1.1    itojun 	int sc_hwflags;
    166   1.1    itojun 	int sc_swflags;
    167   1.1    itojun 	u_int sc_fifolen;
    168   1.1    itojun 
    169   1.1    itojun 	u_int sc_r_hiwat,
    170   1.1    itojun 	      sc_r_lowat;
    171   1.1    itojun 	u_char *volatile sc_rbget,
    172   1.1    itojun 	       *volatile sc_rbput;
    173   1.1    itojun  	volatile u_int sc_rbavail;
    174   1.1    itojun 	u_char *sc_rbuf,
    175   1.1    itojun 	       *sc_ebuf;
    176   1.1    itojun 
    177   1.1    itojun  	u_char *sc_tba;			/* transmit buffer address */
    178   1.1    itojun  	u_int sc_tbc,			/* transmit byte count */
    179   1.1    itojun 	      sc_heldtbc;
    180   1.1    itojun 
    181   1.1    itojun 	volatile u_char sc_rx_flags,
    182   1.1    itojun #define	RX_TTY_BLOCKED		0x01
    183   1.1    itojun #define	RX_TTY_OVERFLOWED	0x02
    184   1.1    itojun #define	RX_IBUF_BLOCKED		0x04
    185   1.1    itojun #define	RX_IBUF_OVERFLOWED	0x08
    186   1.1    itojun #define	RX_ANY_BLOCK		0x0f
    187   1.3   msaitoh 			sc_tx_busy,	/* working on an output chunk */
    188   1.3   msaitoh 			sc_tx_done,	/* done with one output chunk */
    189   1.2   msaitoh 			sc_tx_stopped,	/* H/W level stop (lost CTS) */
    190   1.2   msaitoh 			sc_st_check,	/* got a status interrupt */
    191   1.1    itojun 			sc_rx_ready;
    192   1.1    itojun 
    193   1.1    itojun 	volatile u_char sc_heldchange;
    194   1.1    itojun };
    195   1.1    itojun 
    196   1.1    itojun /* controller driver configuration */
    197  1.20       uch static int scif_match(struct device *, struct cfdata *, void *);
    198  1.20       uch static void scif_attach(struct device *, struct device *, void *);
    199   1.1    itojun 
    200  1.20       uch void	scif_break(struct scif_softc *, int);
    201  1.20       uch void	scif_iflush(struct scif_softc *);
    202   1.1    itojun 
    203   1.1    itojun #define	integrate	static inline
    204  1.20       uch void 	scifsoft(void *);
    205  1.51        ad 
    206  1.20       uch integrate void scif_rxsoft(struct scif_softc *, struct tty *);
    207  1.20       uch integrate void scif_txsoft(struct scif_softc *, struct tty *);
    208  1.20       uch integrate void scif_stsoft(struct scif_softc *, struct tty *);
    209  1.20       uch integrate void scif_schedrx(struct scif_softc *);
    210  1.20       uch void	scifdiag(void *);
    211   1.1    itojun 
    212   1.1    itojun 
    213   1.1    itojun #define	SCIFUNIT_MASK		0x7ffff
    214   1.1    itojun #define	SCIFDIALOUT_MASK	0x80000
    215   1.1    itojun 
    216   1.1    itojun #define	SCIFUNIT(x)	(minor(x) & SCIFUNIT_MASK)
    217   1.1    itojun #define	SCIFDIALOUT(x)	(minor(x) & SCIFDIALOUT_MASK)
    218   1.1    itojun 
    219   1.1    itojun /* Hardware flag masks */
    220   1.1    itojun #define	SCIF_HW_NOIEN	0x01
    221   1.1    itojun #define	SCIF_HW_FIFO	0x02
    222   1.1    itojun #define	SCIF_HW_FLOW	0x08
    223   1.1    itojun #define	SCIF_HW_DEV_OK	0x20
    224   1.1    itojun #define	SCIF_HW_CONSOLE	0x40
    225   1.1    itojun #define	SCIF_HW_KGDB	0x80
    226   1.1    itojun 
    227   1.1    itojun /* Buffer size for character buffer */
    228   1.1    itojun #define	SCIF_RING_SIZE	2048
    229   1.1    itojun 
    230   1.1    itojun /* Stop input when 3/4 of the ring is full; restart when only 1/4 is full. */
    231   1.1    itojun u_int scif_rbuf_hiwat = (SCIF_RING_SIZE * 1) / 4;
    232   1.1    itojun u_int scif_rbuf_lowat = (SCIF_RING_SIZE * 3) / 4;
    233   1.1    itojun 
    234  1.25       uch #define	CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */
    235   1.1    itojun int scifconscflag = CONMODE;
    236   1.9   msaitoh int scifisconsole = 0;
    237   1.1    itojun 
    238   1.7   msaitoh #ifdef SCIFCN_SPEED
    239   1.7   msaitoh unsigned int scifcn_speed = SCIFCN_SPEED;
    240   1.7   msaitoh #else
    241   1.7   msaitoh unsigned int scifcn_speed = 9600;
    242   1.7   msaitoh #endif
    243   1.7   msaitoh 
    244   1.1    itojun #define	divrnd(n, q)	(((n)*2/(q)+1)/2)	/* divide and round off */
    245   1.1    itojun 
    246   1.1    itojun u_int scif_rbuf_size = SCIF_RING_SIZE;
    247   1.1    itojun 
    248  1.31   thorpej CFATTACH_DECL(scif, sizeof(struct scif_softc),
    249  1.32   thorpej     scif_match, scif_attach, NULL, NULL);
    250   1.1    itojun 
    251   1.1    itojun extern struct cfdriver scif_cd;
    252   1.1    itojun 
    253  1.38       chs static int scif_attached;
    254  1.38       chs 
    255  1.28   gehenna dev_type_open(scifopen);
    256  1.28   gehenna dev_type_close(scifclose);
    257  1.28   gehenna dev_type_read(scifread);
    258  1.28   gehenna dev_type_write(scifwrite);
    259  1.28   gehenna dev_type_ioctl(scifioctl);
    260  1.28   gehenna dev_type_stop(scifstop);
    261  1.28   gehenna dev_type_tty(sciftty);
    262  1.28   gehenna dev_type_poll(scifpoll);
    263  1.28   gehenna 
    264  1.28   gehenna const struct cdevsw scif_cdevsw = {
    265  1.28   gehenna 	scifopen, scifclose, scifread, scifwrite, scifioctl,
    266  1.33  jdolecek 	scifstop, sciftty, scifpoll, nommap, ttykqfilter, D_TTY
    267  1.28   gehenna };
    268   1.1    itojun 
    269  1.20       uch void InitializeScif (unsigned int);
    270   1.1    itojun 
    271   1.1    itojun /*
    272   1.1    itojun  * following functions are debugging prupose only
    273   1.1    itojun  */
    274  1.25       uch #define	CR      0x0D
    275  1.25       uch #define	USART_ON (unsigned int)~0x08
    276   1.1    itojun 
    277  1.20       uch void scif_putc(unsigned char);
    278  1.20       uch unsigned char scif_getc(void);
    279  1.20       uch int ScifErrCheck(void);
    280   1.1    itojun 
    281  1.37       uwe 
    282  1.37       uwe /* XXX: uwe
    283  1.37       uwe  * Prepare for bus_spacification.  The difference in access widths is
    284  1.37       uwe  * still handled by the magic definitions in scifreg.h
    285  1.37       uwe  */
    286  1.37       uwe #define scif_smr_read()		SHREG_SCSMR2
    287  1.37       uwe #define scif_smr_write(v)	(SHREG_SCSMR2 = (v))
    288  1.37       uwe 
    289  1.37       uwe #define scif_brr_read()		SHREG_SCBRR2
    290  1.37       uwe #define scif_brr_write(v)	(SHREG_SCBRR2 = (v))
    291  1.37       uwe 
    292  1.37       uwe #define scif_scr_read()		SHREG_SCSCR2
    293  1.37       uwe #define scif_scr_write(v)	(SHREG_SCSCR2 = (v))
    294  1.37       uwe 
    295  1.37       uwe #define scif_ftdr_write(v)	(SHREG_SCFTDR2 = (v))
    296  1.37       uwe 
    297  1.37       uwe #define scif_ssr_read()		SHREG_SCSSR2
    298  1.37       uwe #define scif_ssr_write(v)	(SHREG_SCSSR2 = (v))
    299  1.37       uwe 
    300  1.37       uwe #define scif_frdr_read()	SHREG_SCFRDR2
    301  1.37       uwe 
    302  1.37       uwe #define scif_fcr_read()		SHREG_SCFCR2
    303  1.37       uwe #define scif_fcr_write(v)	(SHREG_SCFCR2 = (v))
    304  1.37       uwe 
    305  1.37       uwe #define scif_fdr_read()		SHREG_SCFDR2
    306  1.37       uwe 
    307  1.37       uwe #ifdef SH4 /* additional registers in sh4 */
    308  1.37       uwe 
    309  1.37       uwe #define scif_sptr_read()	SHREG_SCSPTR2
    310  1.37       uwe #define scif_sptr_write(v)	(SHREG_SCSPTR2 = (v))
    311  1.37       uwe 
    312  1.37       uwe #define scif_lsr_read()		SHREG_SCLSR2
    313  1.37       uwe #define scif_lsr_write(v)	(SHREG_SCLSR2 = (v))
    314  1.37       uwe 
    315  1.37       uwe #endif /* SH4 */
    316  1.37       uwe 
    317  1.37       uwe 
    318   1.1    itojun /*
    319   1.1    itojun  * InitializeScif
    320   1.1    itojun  * : unsigned int bps;
    321   1.1    itojun  * : SCIF(Serial Communication Interface)
    322   1.1    itojun  */
    323   1.1    itojun 
    324   1.1    itojun void
    325  1.20       uch InitializeScif(unsigned int bps)
    326   1.1    itojun {
    327   1.1    itojun 
    328   1.1    itojun 	/* Initialize SCR */
    329  1.37       uwe 	scif_scr_write(0x00);
    330   1.1    itojun 
    331   1.6   msaitoh #if 0
    332  1.37       uwe 	scif_fcr_write(SCFCR2_TFRST | SCFCR2_RFRST | SCFCR2_MCE);
    333   1.6   msaitoh #else
    334  1.37       uwe 	scif_fcr_write(SCFCR2_TFRST | SCFCR2_RFRST);
    335   1.6   msaitoh #endif
    336   1.7   msaitoh 	/* Serial Mode Register */
    337  1.37       uwe 	scif_smr_write(0x00);	/* 8bit,NonParity,Even,1Stop */
    338   1.1    itojun 
    339   1.7   msaitoh 	/* Bit Rate Register */
    340  1.37       uwe 	scif_brr_write(divrnd(sh_clock_get_pclock(), 32 * bps) - 1);
    341   1.1    itojun 
    342   1.7   msaitoh 	/*
    343  1.40  christos 	 * wait 2m Sec, because Send/Recv must begin 1 bit period after
    344   1.7   msaitoh 	 * BRR is set.
    345   1.7   msaitoh 	 */
    346  1.40  christos 	delay(2000);
    347   1.1    itojun 
    348   1.6   msaitoh #if 0
    349  1.37       uwe 	scif_fcr_write(FIFO_RCV_TRIGGER_14 | FIFO_XMT_TRIGGER_1 | SCFCR2_MCE);
    350   1.6   msaitoh #else
    351  1.37       uwe 	scif_fcr_write(FIFO_RCV_TRIGGER_14 | FIFO_XMT_TRIGGER_1);
    352   1.6   msaitoh #endif
    353   1.1    itojun 
    354  1.18       wiz 	/* Send permission, Receive permission ON */
    355  1.37       uwe 	scif_scr_write(SCSCR2_TE | SCSCR2_RE);
    356   1.1    itojun 
    357   1.7   msaitoh 	/* Serial Status Register */
    358  1.37       uwe 	scif_ssr_write(scif_ssr_read() & SCSSR2_TDFE); /* Clear Status */
    359   1.1    itojun }
    360   1.1    itojun 
    361   1.1    itojun 
    362   1.1    itojun /*
    363  1.14   msaitoh  * scif_putc
    364   1.1    itojun  *  : unsigned char c;
    365   1.1    itojun  */
    366   1.1    itojun 
    367   1.1    itojun void
    368  1.20       uch scif_putc(unsigned char c)
    369   1.1    itojun {
    370  1.14   msaitoh 
    371   1.1    itojun 	/* wait for ready */
    372  1.37       uwe 	while ((scif_fdr_read() & SCFDR2_TXCNT) == SCFDR2_TXF_FULL)
    373  1.36       uwe 		continue;
    374   1.1    itojun 
    375   1.1    itojun 	/* write send data to send register */
    376  1.37       uwe 	scif_ftdr_write(c);
    377   1.1    itojun 
    378   1.1    itojun 	/* clear ready flag */
    379  1.37       uwe 	scif_ssr_write(scif_ssr_read() & ~(SCSSR2_TDFE | SCSSR2_TEND));
    380   1.1    itojun }
    381   1.1    itojun 
    382   1.1    itojun /*
    383   1.1    itojun  * : ScifErrCheck
    384   1.1    itojun  *	0x80 = error
    385   1.1    itojun  *	0x08 = frame error
    386   1.1    itojun  *	0x04 = parity error
    387   1.1    itojun  */
    388   1.1    itojun int
    389   1.1    itojun ScifErrCheck(void)
    390   1.1    itojun {
    391   1.1    itojun 
    392  1.37       uwe 	return (scif_ssr_read() & (SCSSR2_ER | SCSSR2_FER | SCSSR2_PER));
    393   1.1    itojun }
    394   1.1    itojun 
    395   1.1    itojun /*
    396  1.14   msaitoh  * scif_getc
    397   1.1    itojun  */
    398   1.1    itojun unsigned char
    399  1.14   msaitoh scif_getc(void)
    400   1.1    itojun {
    401   1.1    itojun 	unsigned char c, err_c;
    402  1.26   msaitoh #ifdef SH4
    403  1.43       uwe 	unsigned short err_c2 = 0; /* XXXGCC: -Wuninitialized */
    404  1.26   msaitoh #endif
    405   1.1    itojun 
    406  1.36       uwe 	for (;;) {
    407  1.12   msaitoh 		/* wait for ready */
    408  1.37       uwe 		while ((scif_fdr_read() & SCFDR2_RECVCNT) == 0)
    409  1.36       uwe 			continue;
    410   1.1    itojun 
    411  1.37       uwe 		c = scif_frdr_read();
    412  1.37       uwe 		err_c = scif_ssr_read();
    413  1.37       uwe 		scif_ssr_write(scif_ssr_read()
    414  1.37       uwe 			& ~(SCSSR2_ER | SCSSR2_BRK | SCSSR2_RDF | SCSSR2_DR));
    415  1.26   msaitoh #ifdef SH4
    416  1.26   msaitoh 		if (CPU_IS_SH4) {
    417  1.37       uwe 			err_c2 = scif_lsr_read();
    418  1.37       uwe 			scif_lsr_write(scif_lsr_read() & ~SCLSR2_ORER);
    419  1.26   msaitoh 		}
    420  1.26   msaitoh #endif
    421  1.12   msaitoh 		if ((err_c & (SCSSR2_ER | SCSSR2_BRK | SCSSR2_FER
    422  1.12   msaitoh 		    | SCSSR2_PER)) == 0) {
    423  1.26   msaitoh #ifdef SH4
    424  1.26   msaitoh 			if (CPU_IS_SH4 && ((err_c2 & SCLSR2_ORER) == 0))
    425  1.26   msaitoh #endif
    426  1.12   msaitoh 			return(c);
    427  1.12   msaitoh 		}
    428  1.12   msaitoh 	}
    429   1.1    itojun 
    430   1.1    itojun }
    431   1.1    itojun 
    432   1.1    itojun static int
    433  1.20       uch scif_match(struct device *parent, struct cfdata *cfp, void *aux)
    434   1.1    itojun {
    435   1.1    itojun 
    436  1.38       chs 	if (strcmp(cfp->cf_name, "scif") || scif_attached)
    437   1.1    itojun 		return 0;
    438   1.1    itojun 
    439   1.1    itojun 	return 1;
    440   1.1    itojun }
    441   1.1    itojun 
    442   1.1    itojun static void
    443  1.20       uch scif_attach(struct device *parent, struct device *self, void *aux)
    444   1.1    itojun {
    445   1.1    itojun 	struct scif_softc *sc = (struct scif_softc *)self;
    446   1.1    itojun 	struct tty *tp;
    447   1.1    itojun 
    448  1.38       chs 	scif_attached = 1;
    449  1.38       chs 
    450   1.1    itojun 	sc->sc_hwflags = 0;	/* XXX */
    451   1.1    itojun 	sc->sc_swflags = 0;	/* XXX */
    452   1.1    itojun 	sc->sc_fifolen = 16;
    453   1.1    itojun 
    454  1.22       uch 	if (scifisconsole || kgdb_attached) {
    455   1.9   msaitoh 		/* InitializeScif(scifcn_speed); */
    456   1.9   msaitoh 		SET(sc->sc_hwflags, SCIF_HW_CONSOLE);
    457   1.9   msaitoh 		SET(sc->sc_swflags, TIOCFLAG_SOFTCAR);
    458  1.22       uch 		if (kgdb_attached) {
    459  1.22       uch 			SET(sc->sc_hwflags, SCIF_HW_KGDB);
    460  1.22       uch 			printf("\n%s: kgdb\n", sc->sc_dev.dv_xname);
    461  1.22       uch 		} else {
    462  1.22       uch 			printf("\n%s: console\n", sc->sc_dev.dv_xname);
    463  1.22       uch 		}
    464   1.9   msaitoh 	} else {
    465   1.9   msaitoh 		InitializeScif(9600);
    466   1.9   msaitoh 		printf("\n");
    467   1.9   msaitoh 	}
    468   1.1    itojun 
    469  1.51        ad 	callout_init(&sc->sc_diag_ch, 0);
    470  1.24       uch #ifdef SH4
    471  1.24       uch 	intc_intr_establish(SH4_INTEVT_SCIF_ERI, IST_LEVEL, IPL_SERIAL,
    472  1.24       uch 	    scifintr, sc);
    473  1.24       uch 	intc_intr_establish(SH4_INTEVT_SCIF_RXI, IST_LEVEL, IPL_SERIAL,
    474  1.24       uch 	    scifintr, sc);
    475  1.24       uch 	intc_intr_establish(SH4_INTEVT_SCIF_BRI, IST_LEVEL, IPL_SERIAL,
    476  1.24       uch 	    scifintr, sc);
    477  1.24       uch 	intc_intr_establish(SH4_INTEVT_SCIF_TXI, IST_LEVEL, IPL_SERIAL,
    478  1.24       uch 	    scifintr, sc);
    479  1.24       uch #else
    480  1.24       uch 	intc_intr_establish(SH7709_INTEVT2_SCIF_ERI, IST_LEVEL, IPL_SERIAL,
    481  1.24       uch 	    scifintr, sc);
    482  1.24       uch 	intc_intr_establish(SH7709_INTEVT2_SCIF_RXI, IST_LEVEL, IPL_SERIAL,
    483  1.24       uch 	    scifintr, sc);
    484  1.24       uch 	intc_intr_establish(SH7709_INTEVT2_SCIF_BRI, IST_LEVEL, IPL_SERIAL,
    485  1.24       uch 	    scifintr, sc);
    486  1.24       uch 	intc_intr_establish(SH7709_INTEVT2_SCIF_TXI, IST_LEVEL, IPL_SERIAL,
    487  1.24       uch 	    scifintr, sc);
    488  1.24       uch #endif
    489   1.8   thorpej 
    490  1.24       uch 	sc->sc_si = softintr_establish(IPL_SOFTSERIAL, scifsoft, sc);
    491   1.9   msaitoh 	SET(sc->sc_hwflags, SCIF_HW_DEV_OK);
    492   1.1    itojun 
    493   1.1    itojun 	tp = ttymalloc();
    494   1.1    itojun 	tp->t_oproc = scifstart;
    495   1.1    itojun 	tp->t_param = scifparam;
    496   1.1    itojun 	tp->t_hwiflow = NULL;
    497   1.1    itojun 
    498   1.1    itojun 	sc->sc_tty = tp;
    499   1.1    itojun 	sc->sc_rbuf = malloc(scif_rbuf_size << 1, M_DEVBUF, M_NOWAIT);
    500   1.1    itojun 	if (sc->sc_rbuf == NULL) {
    501   1.1    itojun 		printf("%s: unable to allocate ring buffer\n",
    502   1.1    itojun 		    sc->sc_dev.dv_xname);
    503   1.1    itojun 		return;
    504   1.1    itojun 	}
    505   1.1    itojun 	sc->sc_ebuf = sc->sc_rbuf + (scif_rbuf_size << 1);
    506   1.1    itojun 
    507   1.1    itojun 	tty_attach(tp);
    508   1.1    itojun }
    509   1.1    itojun 
    510   1.1    itojun /*
    511   1.1    itojun  * Start or restart transmission.
    512   1.1    itojun  */
    513   1.1    itojun static void
    514  1.20       uch scifstart(struct tty *tp)
    515   1.1    itojun {
    516   1.1    itojun 	struct scif_softc *sc = scif_cd.cd_devs[SCIFUNIT(tp->t_dev)];
    517   1.1    itojun 	int s;
    518   1.1    itojun 
    519   1.1    itojun 	s = spltty();
    520   1.1    itojun 	if (ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP))
    521   1.1    itojun 		goto out;
    522   1.1    itojun 	if (sc->sc_tx_stopped)
    523   1.1    itojun 		goto out;
    524   1.1    itojun 
    525   1.1    itojun 	if (tp->t_outq.c_cc <= tp->t_lowat) {
    526   1.1    itojun 		if (ISSET(tp->t_state, TS_ASLEEP)) {
    527   1.1    itojun 			CLR(tp->t_state, TS_ASLEEP);
    528   1.1    itojun 			wakeup(&tp->t_outq);
    529   1.1    itojun 		}
    530   1.1    itojun 		selwakeup(&tp->t_wsel);
    531   1.1    itojun 		if (tp->t_outq.c_cc == 0)
    532   1.1    itojun 			goto out;
    533   1.1    itojun 	}
    534   1.1    itojun 
    535   1.1    itojun 	/* Grab the first contiguous region of buffer space. */
    536   1.1    itojun 	{
    537   1.1    itojun 		u_char *tba;
    538   1.1    itojun 		int tbc;
    539   1.1    itojun 
    540   1.1    itojun 		tba = tp->t_outq.c_cf;
    541   1.1    itojun 		tbc = ndqb(&tp->t_outq, 0);
    542   1.1    itojun 
    543   1.1    itojun 		(void)splserial();
    544   1.1    itojun 
    545   1.1    itojun 		sc->sc_tba = tba;
    546   1.1    itojun 		sc->sc_tbc = tbc;
    547   1.1    itojun 	}
    548   1.1    itojun 
    549   1.1    itojun 	SET(tp->t_state, TS_BUSY);
    550   1.1    itojun 	sc->sc_tx_busy = 1;
    551   1.1    itojun 
    552   1.1    itojun 	/* Enable transmit completion interrupts if necessary. */
    553  1.37       uwe 	scif_scr_write(scif_scr_read() | SCSCR2_TIE | SCSCR2_RIE);
    554   1.1    itojun 
    555   1.1    itojun 	/* Output the first chunk of the contiguous buffer. */
    556   1.1    itojun 	{
    557   1.1    itojun 		int n;
    558  1.39       uwe 		int maxchars;
    559   1.1    itojun 		int i;
    560   1.1    itojun 
    561   1.1    itojun 		n = sc->sc_tbc;
    562  1.39       uwe 		maxchars = sc->sc_fifolen
    563  1.39       uwe 			- ((scif_fdr_read() & SCFDR2_TXCNT) >> 8);
    564  1.39       uwe 		if (n > maxchars)
    565  1.39       uwe 			n = maxchars;
    566   1.1    itojun 
    567   1.1    itojun 		for (i = 0; i < n; i++) {
    568  1.14   msaitoh 			scif_putc(*(sc->sc_tba));
    569   1.1    itojun 			sc->sc_tba++;
    570   1.1    itojun 		}
    571   1.1    itojun 		sc->sc_tbc -= n;
    572   1.1    itojun 	}
    573   1.1    itojun out:
    574   1.1    itojun 	splx(s);
    575   1.1    itojun 	return;
    576   1.1    itojun }
    577   1.1    itojun 
    578   1.1    itojun /*
    579   1.1    itojun  * Set SCIF tty parameters from termios.
    580   1.1    itojun  * XXX - Should just copy the whole termios after
    581   1.1    itojun  * making sure all the changes could be done.
    582   1.1    itojun  */
    583   1.1    itojun static int
    584  1.20       uch scifparam(struct tty *tp, struct termios *t)
    585   1.1    itojun {
    586   1.1    itojun 	struct scif_softc *sc = scif_cd.cd_devs[SCIFUNIT(tp->t_dev)];
    587   1.1    itojun 	int ospeed = t->c_ospeed;
    588   1.1    itojun 	int s;
    589   1.1    itojun 
    590  1.44   thorpej 	if (!device_is_active(&sc->sc_dev))
    591   1.1    itojun 		return (EIO);
    592   1.1    itojun 
    593   1.1    itojun 	/* Check requested parameters. */
    594   1.1    itojun 	if (ospeed < 0)
    595   1.1    itojun 		return (EINVAL);
    596   1.1    itojun 	if (t->c_ispeed && t->c_ispeed != t->c_ospeed)
    597   1.1    itojun 		return (EINVAL);
    598   1.1    itojun 
    599   1.1    itojun 	/*
    600   1.1    itojun 	 * For the console, always force CLOCAL and !HUPCL, so that the port
    601   1.1    itojun 	 * is always active.
    602   1.1    itojun 	 */
    603   1.1    itojun 	if (ISSET(sc->sc_swflags, TIOCFLAG_SOFTCAR) ||
    604   1.1    itojun 	    ISSET(sc->sc_hwflags, SCIF_HW_CONSOLE)) {
    605   1.1    itojun 		SET(t->c_cflag, CLOCAL);
    606   1.1    itojun 		CLR(t->c_cflag, HUPCL);
    607   1.1    itojun 	}
    608   1.1    itojun 
    609   1.1    itojun 	/*
    610   1.1    itojun 	 * If there were no changes, don't do anything.  This avoids dropping
    611   1.1    itojun 	 * input and improves performance when all we did was frob things like
    612   1.1    itojun 	 * VMIN and VTIME.
    613   1.1    itojun 	 */
    614   1.1    itojun 	if (tp->t_ospeed == t->c_ospeed &&
    615   1.1    itojun 	    tp->t_cflag == t->c_cflag)
    616   1.1    itojun 		return (0);
    617   1.1    itojun 
    618   1.1    itojun #if 0
    619   1.1    itojun /* XXX (msaitoh) */
    620   1.1    itojun 	lcr = ISSET(sc->sc_lcr, LCR_SBREAK) | cflag2lcr(t->c_cflag);
    621   1.1    itojun #endif
    622   1.1    itojun 
    623   1.1    itojun 	s = splserial();
    624   1.1    itojun 
    625   1.1    itojun 	/*
    626   1.1    itojun 	 * Set the flow control pins depending on the current flow control
    627   1.1    itojun 	 * mode.
    628   1.1    itojun 	 */
    629   1.1    itojun 	if (ISSET(t->c_cflag, CRTSCTS)) {
    630  1.37       uwe 		scif_fcr_write(scif_fcr_read() | SCFCR2_MCE);
    631   1.1    itojun 	} else {
    632  1.37       uwe 		scif_fcr_write(scif_fcr_read() & ~SCFCR2_MCE);
    633   1.1    itojun 	}
    634   1.1    itojun 
    635  1.37       uwe 	scif_brr_write(divrnd(sh_clock_get_pclock(), 32 * ospeed) -1);
    636   1.1    itojun 
    637   1.1    itojun 	/*
    638   1.1    itojun 	 * Set the FIFO threshold based on the receive speed.
    639   1.1    itojun 	 *
    640   1.1    itojun 	 *  * If it's a low speed, it's probably a mouse or some other
    641   1.1    itojun 	 *    interactive device, so set the threshold low.
    642   1.1    itojun 	 *  * If it's a high speed, trim the trigger level down to prevent
    643   1.1    itojun 	 *    overflows.
    644   1.1    itojun 	 *  * Otherwise set it a bit higher.
    645   1.1    itojun 	 */
    646   1.1    itojun #if 0
    647   1.1    itojun /* XXX (msaitoh) */
    648   1.1    itojun 	if (ISSET(sc->sc_hwflags, SCIF_HW_HAYESP))
    649   1.1    itojun 		sc->sc_fifo = FIFO_DMA_MODE | FIFO_ENABLE | FIFO_TRIGGER_8;
    650   1.1    itojun 	else if (ISSET(sc->sc_hwflags, SCIF_HW_FIFO))
    651   1.1    itojun 		sc->sc_fifo = FIFO_ENABLE |
    652   1.1    itojun 		    (t->c_ospeed <= 1200 ? FIFO_TRIGGER_1 :
    653   1.1    itojun 		     t->c_ospeed <= 38400 ? FIFO_TRIGGER_8 : FIFO_TRIGGER_4);
    654   1.1    itojun 	else
    655   1.1    itojun 		sc->sc_fifo = 0;
    656   1.1    itojun #endif
    657   1.1    itojun 
    658   1.1    itojun 	/* And copy to tty. */
    659   1.1    itojun 	tp->t_ispeed = 0;
    660   1.1    itojun 	tp->t_ospeed = t->c_ospeed;
    661   1.1    itojun 	tp->t_cflag = t->c_cflag;
    662   1.1    itojun 
    663   1.1    itojun 	if (!sc->sc_heldchange) {
    664   1.1    itojun 		if (sc->sc_tx_busy) {
    665   1.1    itojun 			sc->sc_heldtbc = sc->sc_tbc;
    666   1.1    itojun 			sc->sc_tbc = 0;
    667   1.1    itojun 			sc->sc_heldchange = 1;
    668   1.1    itojun 		}
    669   1.1    itojun #if 0
    670   1.1    itojun /* XXX (msaitoh) */
    671   1.1    itojun 		else
    672   1.1    itojun 			scif_loadchannelregs(sc);
    673   1.1    itojun #endif
    674   1.1    itojun 	}
    675   1.1    itojun 
    676   1.1    itojun 	if (!ISSET(t->c_cflag, CHWFLOW)) {
    677   1.1    itojun 		/* Disable the high water mark. */
    678   1.1    itojun 		sc->sc_r_hiwat = 0;
    679   1.1    itojun 		sc->sc_r_lowat = 0;
    680   1.1    itojun 		if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) {
    681   1.1    itojun 			CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED);
    682   1.1    itojun 			scif_schedrx(sc);
    683   1.1    itojun 		}
    684   1.1    itojun 	} else {
    685   1.1    itojun 		sc->sc_r_hiwat = scif_rbuf_hiwat;
    686   1.1    itojun 		sc->sc_r_lowat = scif_rbuf_lowat;
    687   1.1    itojun 	}
    688   1.1    itojun 
    689   1.1    itojun 	splx(s);
    690   1.1    itojun 
    691   1.1    itojun #ifdef SCIF_DEBUG
    692   1.1    itojun 	if (scif_debug)
    693   1.1    itojun 		scifstatus(sc, "scifparam ");
    694   1.1    itojun #endif
    695   1.1    itojun 
    696   1.1    itojun 	if (!ISSET(t->c_cflag, CHWFLOW)) {
    697   1.1    itojun 		if (sc->sc_tx_stopped) {
    698   1.1    itojun 			sc->sc_tx_stopped = 0;
    699   1.1    itojun 			scifstart(tp);
    700   1.1    itojun 		}
    701   1.1    itojun 	}
    702   1.1    itojun 
    703   1.1    itojun 	return (0);
    704   1.1    itojun }
    705   1.1    itojun 
    706   1.1    itojun void
    707  1.20       uch scif_iflush(struct scif_softc *sc)
    708   1.1    itojun {
    709   1.1    itojun 	int i;
    710   1.1    itojun 	unsigned char c;
    711   1.1    itojun 
    712  1.37       uwe 	i = scif_fdr_read() & SCFDR2_RECVCNT;
    713   1.1    itojun 
    714   1.1    itojun 	while (i > 0) {
    715  1.37       uwe 		c = scif_frdr_read();
    716  1.37       uwe 		scif_ssr_write(scif_ssr_read() & ~(SCSSR2_RDF | SCSSR2_DR));
    717   1.1    itojun 		i--;
    718   1.1    itojun 	}
    719   1.1    itojun }
    720   1.1    itojun 
    721   1.1    itojun int
    722  1.42  christos scifopen(dev_t dev, int flag, int mode, struct lwp *l)
    723   1.1    itojun {
    724   1.1    itojun 	int unit = SCIFUNIT(dev);
    725   1.1    itojun 	struct scif_softc *sc;
    726   1.1    itojun 	struct tty *tp;
    727   1.1    itojun 	int s, s2;
    728   1.1    itojun 	int error;
    729   1.1    itojun 
    730   1.1    itojun 	if (unit >= scif_cd.cd_ndevs)
    731   1.1    itojun 		return (ENXIO);
    732   1.1    itojun 	sc = scif_cd.cd_devs[unit];
    733   1.1    itojun 	if (sc == 0 || !ISSET(sc->sc_hwflags, SCIF_HW_DEV_OK) ||
    734   1.1    itojun 	    sc->sc_rbuf == NULL)
    735   1.1    itojun 		return (ENXIO);
    736   1.1    itojun 
    737  1.44   thorpej 	if (!device_is_active(&sc->sc_dev))
    738   1.1    itojun 		return (ENXIO);
    739   1.1    itojun 
    740   1.1    itojun #ifdef KGDB
    741   1.1    itojun 	/*
    742   1.1    itojun 	 * If this is the kgdb port, no other use is permitted.
    743   1.1    itojun 	 */
    744   1.1    itojun 	if (ISSET(sc->sc_hwflags, SCIF_HW_KGDB))
    745   1.1    itojun 		return (EBUSY);
    746  1.22       uch #endif /* KGDB */
    747   1.1    itojun 
    748   1.1    itojun 	tp = sc->sc_tty;
    749   1.1    itojun 
    750  1.48      elad 	if (kauth_authorize_device_tty(l->l_cred, KAUTH_DEVICE_TTY_OPEN, tp))
    751   1.1    itojun 		return (EBUSY);
    752   1.1    itojun 
    753   1.1    itojun 	s = spltty();
    754   1.1    itojun 
    755   1.1    itojun 	/*
    756   1.1    itojun 	 * Do the following iff this is a first open.
    757   1.1    itojun 	 */
    758   1.1    itojun 	if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
    759   1.1    itojun 		struct termios t;
    760   1.1    itojun 
    761   1.1    itojun 		tp->t_dev = dev;
    762   1.1    itojun 
    763   1.1    itojun 		s2 = splserial();
    764   1.1    itojun 
    765   1.1    itojun 		/* Turn on interrupts. */
    766  1.37       uwe 		scif_scr_write(scif_scr_read() | SCSCR2_TIE | SCSCR2_RIE);
    767   1.1    itojun 
    768   1.1    itojun 		splx(s2);
    769   1.1    itojun 
    770   1.1    itojun 		/*
    771   1.1    itojun 		 * Initialize the termios status to the defaults.  Add in the
    772   1.1    itojun 		 * sticky bits from TIOCSFLAGS.
    773   1.1    itojun 		 */
    774   1.1    itojun 		t.c_ispeed = 0;
    775   1.1    itojun 		if (ISSET(sc->sc_hwflags, SCIF_HW_CONSOLE)) {
    776   1.7   msaitoh 			t.c_ospeed = scifcn_speed;	/* XXX (msaitoh) */
    777   1.1    itojun 			t.c_cflag = scifconscflag;
    778   1.1    itojun 		} else {
    779   1.1    itojun 			t.c_ospeed = TTYDEF_SPEED;
    780   1.1    itojun 			t.c_cflag = TTYDEF_CFLAG;
    781   1.1    itojun 		}
    782   1.1    itojun 		if (ISSET(sc->sc_swflags, TIOCFLAG_CLOCAL))
    783   1.1    itojun 			SET(t.c_cflag, CLOCAL);
    784   1.1    itojun 		if (ISSET(sc->sc_swflags, TIOCFLAG_CRTSCTS))
    785   1.1    itojun 			SET(t.c_cflag, CRTSCTS);
    786   1.1    itojun 		if (ISSET(sc->sc_swflags, TIOCFLAG_MDMBUF))
    787   1.1    itojun 			SET(t.c_cflag, MDMBUF);
    788   1.1    itojun 		/* Make sure scifparam() will do something. */
    789   1.1    itojun 		tp->t_ospeed = 0;
    790   1.1    itojun 		(void) scifparam(tp, &t);
    791   1.1    itojun 		tp->t_iflag = TTYDEF_IFLAG;
    792   1.1    itojun 		tp->t_oflag = TTYDEF_OFLAG;
    793   1.1    itojun 		tp->t_lflag = TTYDEF_LFLAG;
    794   1.1    itojun 		ttychars(tp);
    795   1.1    itojun 		ttsetwater(tp);
    796   1.1    itojun 
    797   1.1    itojun 		s2 = splserial();
    798   1.1    itojun 
    799   1.1    itojun 		/* Clear the input ring, and unblock. */
    800   1.1    itojun 		sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf;
    801   1.1    itojun 		sc->sc_rbavail = scif_rbuf_size;
    802   1.1    itojun 		scif_iflush(sc);
    803   1.1    itojun 		CLR(sc->sc_rx_flags, RX_ANY_BLOCK);
    804   1.1    itojun #if 0
    805   1.1    itojun /* XXX (msaitoh) */
    806   1.1    itojun 		scif_hwiflow(sc);
    807   1.1    itojun #endif
    808   1.1    itojun 
    809   1.1    itojun #ifdef SCIF_DEBUG
    810   1.1    itojun 		if (scif_debug)
    811   1.1    itojun 			scifstatus(sc, "scifopen  ");
    812   1.1    itojun #endif
    813   1.1    itojun 
    814   1.1    itojun 		splx(s2);
    815   1.1    itojun 	}
    816   1.1    itojun 
    817   1.1    itojun 	splx(s);
    818   1.1    itojun 
    819   1.1    itojun 	error = ttyopen(tp, SCIFDIALOUT(dev), ISSET(flag, O_NONBLOCK));
    820   1.1    itojun 	if (error)
    821   1.1    itojun 		goto bad;
    822   1.1    itojun 
    823  1.13       eeh 	error = (*tp->t_linesw->l_open)(dev, tp);
    824   1.1    itojun 	if (error)
    825   1.1    itojun 		goto bad;
    826   1.1    itojun 
    827   1.1    itojun 	return (0);
    828   1.1    itojun 
    829   1.1    itojun bad:
    830   1.1    itojun 
    831   1.1    itojun 	return (error);
    832   1.1    itojun }
    833   1.1    itojun 
    834   1.1    itojun int
    835  1.42  christos scifclose(dev_t dev, int flag, int mode, struct lwp *l)
    836   1.1    itojun {
    837   1.1    itojun 	struct scif_softc *sc = scif_cd.cd_devs[SCIFUNIT(dev)];
    838   1.1    itojun 	struct tty *tp = sc->sc_tty;
    839   1.1    itojun 
    840   1.1    itojun 	/* XXX This is for cons.c. */
    841   1.1    itojun 	if (!ISSET(tp->t_state, TS_ISOPEN))
    842   1.1    itojun 		return (0);
    843   1.1    itojun 
    844  1.13       eeh 	(*tp->t_linesw->l_close)(tp, flag);
    845   1.1    itojun 	ttyclose(tp);
    846   1.1    itojun 
    847  1.44   thorpej 	if (!device_is_active(&sc->sc_dev))
    848   1.1    itojun 		return (0);
    849   1.1    itojun 
    850   1.1    itojun 	return (0);
    851   1.1    itojun }
    852   1.1    itojun 
    853   1.1    itojun int
    854  1.20       uch scifread(dev_t dev, struct uio *uio, int flag)
    855   1.1    itojun {
    856   1.1    itojun 	struct scif_softc *sc = scif_cd.cd_devs[SCIFUNIT(dev)];
    857   1.1    itojun 	struct tty *tp = sc->sc_tty;
    858   1.1    itojun 
    859  1.13       eeh 	return ((*tp->t_linesw->l_read)(tp, uio, flag));
    860   1.1    itojun }
    861   1.1    itojun 
    862   1.1    itojun int
    863  1.20       uch scifwrite(dev_t dev, struct uio *uio, int flag)
    864   1.1    itojun {
    865   1.1    itojun 	struct scif_softc *sc = scif_cd.cd_devs[SCIFUNIT(dev)];
    866   1.1    itojun 	struct tty *tp = sc->sc_tty;
    867   1.1    itojun 
    868  1.13       eeh 	return ((*tp->t_linesw->l_write)(tp, uio, flag));
    869  1.16       scw }
    870  1.16       scw 
    871  1.16       scw int
    872  1.42  christos scifpoll(dev_t dev, int events, struct lwp *l)
    873  1.16       scw {
    874  1.16       scw 	struct scif_softc *sc = scif_cd.cd_devs[SCIFUNIT(dev)];
    875  1.16       scw 	struct tty *tp = sc->sc_tty;
    876  1.25       uch 
    877  1.42  christos 	return ((*tp->t_linesw->l_poll)(tp, events, l));
    878   1.1    itojun }
    879   1.1    itojun 
    880   1.1    itojun struct tty *
    881  1.20       uch sciftty(dev_t dev)
    882   1.1    itojun {
    883   1.1    itojun 	struct scif_softc *sc = scif_cd.cd_devs[SCIFUNIT(dev)];
    884   1.1    itojun 	struct tty *tp = sc->sc_tty;
    885   1.1    itojun 
    886   1.1    itojun 	return (tp);
    887   1.1    itojun }
    888   1.1    itojun 
    889   1.1    itojun int
    890  1.50  christos scifioctl(dev_t dev, u_long cmd, void *data, int flag, struct lwp *l)
    891   1.1    itojun {
    892   1.1    itojun 	struct scif_softc *sc = scif_cd.cd_devs[SCIFUNIT(dev)];
    893   1.1    itojun 	struct tty *tp = sc->sc_tty;
    894   1.1    itojun 	int error;
    895   1.1    itojun 	int s;
    896   1.1    itojun 
    897  1.44   thorpej 	if (!device_is_active(&sc->sc_dev))
    898   1.1    itojun 		return (EIO);
    899   1.1    itojun 
    900  1.42  christos 	error = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, l);
    901  1.23    atatat 	if (error != EPASSTHROUGH)
    902   1.1    itojun 		return (error);
    903   1.1    itojun 
    904  1.42  christos 	error = ttioctl(tp, cmd, data, flag, l);
    905  1.23    atatat 	if (error != EPASSTHROUGH)
    906   1.1    itojun 		return (error);
    907   1.1    itojun 
    908   1.1    itojun 	error = 0;
    909   1.1    itojun 
    910   1.1    itojun 	s = splserial();
    911   1.1    itojun 
    912   1.1    itojun 	switch (cmd) {
    913   1.1    itojun 	case TIOCSBRK:
    914   1.1    itojun 		scif_break(sc, 1);
    915   1.1    itojun 		break;
    916   1.1    itojun 
    917   1.1    itojun 	case TIOCCBRK:
    918   1.1    itojun 		scif_break(sc, 0);
    919   1.1    itojun 		break;
    920   1.6   msaitoh 
    921   1.1    itojun 	case TIOCGFLAGS:
    922   1.1    itojun 		*(int *)data = sc->sc_swflags;
    923   1.1    itojun 		break;
    924   1.1    itojun 
    925   1.1    itojun 	case TIOCSFLAGS:
    926  1.49      elad 		error = kauth_authorize_device_tty(l->l_cred,
    927  1.49      elad 		    KAUTH_DEVICE_TTY_PRIVSET, tp);
    928   1.1    itojun 		if (error)
    929   1.1    itojun 			break;
    930   1.1    itojun 		sc->sc_swflags = *(int *)data;
    931   1.1    itojun 		break;
    932   1.1    itojun 
    933   1.1    itojun 	default:
    934  1.23    atatat 		error = EPASSTHROUGH;
    935   1.1    itojun 		break;
    936   1.1    itojun 	}
    937   1.1    itojun 
    938   1.1    itojun 	splx(s);
    939   1.1    itojun 
    940   1.1    itojun 	return (error);
    941   1.1    itojun }
    942   1.1    itojun 
    943   1.1    itojun integrate void
    944  1.20       uch scif_schedrx(struct scif_softc *sc)
    945   1.1    itojun {
    946   1.1    itojun 
    947   1.1    itojun 	sc->sc_rx_ready = 1;
    948   1.1    itojun 
    949   1.1    itojun 	/* Wake up the poller. */
    950   1.1    itojun 	softintr_schedule(sc->sc_si);
    951   1.1    itojun }
    952   1.1    itojun 
    953   1.6   msaitoh void
    954  1.20       uch scif_break(struct scif_softc *sc, int onoff)
    955   1.6   msaitoh {
    956   1.6   msaitoh 
    957   1.6   msaitoh 	if (onoff)
    958  1.37       uwe 		scif_ssr_write(scif_ssr_read() & ~SCSSR2_TDFE);
    959   1.6   msaitoh 	else
    960  1.37       uwe 		scif_ssr_write(scif_ssr_read() | SCSSR2_TDFE);
    961   1.6   msaitoh 
    962   1.6   msaitoh #if 0	/* XXX */
    963   1.6   msaitoh 	if (!sc->sc_heldchange) {
    964   1.6   msaitoh 		if (sc->sc_tx_busy) {
    965   1.6   msaitoh 			sc->sc_heldtbc = sc->sc_tbc;
    966   1.6   msaitoh 			sc->sc_tbc = 0;
    967   1.6   msaitoh 			sc->sc_heldchange = 1;
    968   1.6   msaitoh 		} else
    969   1.6   msaitoh 			scif_loadchannelregs(sc);
    970   1.6   msaitoh 	}
    971   1.6   msaitoh #endif
    972   1.6   msaitoh }
    973   1.6   msaitoh 
    974   1.1    itojun /*
    975   1.1    itojun  * Stop output, e.g., for ^S or output flush.
    976   1.1    itojun  */
    977   1.1    itojun void
    978  1.20       uch scifstop(struct tty *tp, int flag)
    979   1.1    itojun {
    980   1.1    itojun 	struct scif_softc *sc = scif_cd.cd_devs[SCIFUNIT(tp->t_dev)];
    981   1.1    itojun 	int s;
    982   1.1    itojun 
    983   1.1    itojun 	s = splserial();
    984   1.1    itojun 	if (ISSET(tp->t_state, TS_BUSY)) {
    985   1.1    itojun 		/* Stop transmitting at the next chunk. */
    986   1.1    itojun 		sc->sc_tbc = 0;
    987   1.1    itojun 		sc->sc_heldtbc = 0;
    988   1.1    itojun 		if (!ISSET(tp->t_state, TS_TTSTOP))
    989   1.1    itojun 			SET(tp->t_state, TS_FLUSH);
    990   1.1    itojun 	}
    991   1.1    itojun 	splx(s);
    992   1.1    itojun }
    993   1.1    itojun 
    994   1.1    itojun void
    995   1.1    itojun scif_intr_init()
    996   1.1    itojun {
    997   1.1    itojun 	/* XXX */
    998   1.1    itojun }
    999   1.1    itojun 
   1000   1.1    itojun void
   1001  1.20       uch scifdiag(void *arg)
   1002   1.1    itojun {
   1003   1.1    itojun 	struct scif_softc *sc = arg;
   1004   1.1    itojun 	int overflows, floods;
   1005   1.1    itojun 	int s;
   1006   1.1    itojun 
   1007   1.1    itojun 	s = splserial();
   1008   1.1    itojun 	overflows = sc->sc_overflows;
   1009   1.1    itojun 	sc->sc_overflows = 0;
   1010   1.1    itojun 	floods = sc->sc_floods;
   1011   1.1    itojun 	sc->sc_floods = 0;
   1012   1.1    itojun 	sc->sc_errors = 0;
   1013   1.1    itojun 	splx(s);
   1014   1.1    itojun 
   1015   1.1    itojun 	log(LOG_WARNING, "%s: %d silo overflow%s, %d ibuf flood%s\n",
   1016   1.1    itojun 	    sc->sc_dev.dv_xname,
   1017   1.1    itojun 	    overflows, overflows == 1 ? "" : "s",
   1018   1.1    itojun 	    floods, floods == 1 ? "" : "s");
   1019   1.1    itojun }
   1020   1.1    itojun 
   1021   1.1    itojun integrate void
   1022  1.20       uch scif_rxsoft(struct scif_softc *sc, struct tty *tp)
   1023   1.1    itojun {
   1024  1.39       uwe 	int (*rint)(int, struct tty *) = tp->t_linesw->l_rint;
   1025   1.1    itojun 	u_char *get, *end;
   1026   1.1    itojun 	u_int cc, scc;
   1027   1.1    itojun 	u_char ssr2;
   1028   1.1    itojun 	int code;
   1029   1.1    itojun 	int s;
   1030   1.1    itojun 
   1031   1.1    itojun 	end = sc->sc_ebuf;
   1032   1.1    itojun 	get = sc->sc_rbget;
   1033   1.1    itojun 	scc = cc = scif_rbuf_size - sc->sc_rbavail;
   1034   1.1    itojun 
   1035   1.1    itojun 	if (cc == scif_rbuf_size) {
   1036   1.1    itojun 		sc->sc_floods++;
   1037   1.1    itojun 		if (sc->sc_errors++ == 0)
   1038  1.11   msaitoh 			callout_reset(&sc->sc_diag_ch, 60 * hz, scifdiag, sc);
   1039   1.1    itojun 	}
   1040   1.1    itojun 
   1041   1.1    itojun 	while (cc) {
   1042   1.1    itojun 		code = get[0];
   1043   1.1    itojun 		ssr2 = get[1];
   1044   1.6   msaitoh 		if (ISSET(ssr2, SCSSR2_BRK | SCSSR2_FER | SCSSR2_PER)) {
   1045   1.6   msaitoh 			if (ISSET(ssr2, SCSSR2_BRK | SCSSR2_FER))
   1046   1.1    itojun 				SET(code, TTY_FE);
   1047   1.1    itojun 			if (ISSET(ssr2, SCSSR2_PER))
   1048   1.1    itojun 				SET(code, TTY_PE);
   1049   1.1    itojun 		}
   1050   1.1    itojun 		if ((*rint)(code, tp) == -1) {
   1051   1.1    itojun 			/*
   1052   1.1    itojun 			 * The line discipline's buffer is out of space.
   1053   1.1    itojun 			 */
   1054   1.1    itojun 			if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) {
   1055   1.1    itojun 				/*
   1056   1.1    itojun 				 * We're either not using flow control, or the
   1057   1.1    itojun 				 * line discipline didn't tell us to block for
   1058   1.1    itojun 				 * some reason.  Either way, we have no way to
   1059   1.1    itojun 				 * know when there's more space available, so
   1060   1.1    itojun 				 * just drop the rest of the data.
   1061   1.1    itojun 				 */
   1062   1.1    itojun 				get += cc << 1;
   1063   1.1    itojun 				if (get >= end)
   1064   1.1    itojun 					get -= scif_rbuf_size << 1;
   1065   1.1    itojun 				cc = 0;
   1066   1.1    itojun 			} else {
   1067   1.1    itojun 				/*
   1068   1.1    itojun 				 * Don't schedule any more receive processing
   1069   1.1    itojun 				 * until the line discipline tells us there's
   1070   1.1    itojun 				 * space available (through scifhwiflow()).
   1071   1.1    itojun 				 * Leave the rest of the data in the input
   1072   1.1    itojun 				 * buffer.
   1073   1.1    itojun 				 */
   1074   1.1    itojun 				SET(sc->sc_rx_flags, RX_TTY_OVERFLOWED);
   1075   1.1    itojun 			}
   1076   1.1    itojun 			break;
   1077   1.1    itojun 		}
   1078   1.1    itojun 		get += 2;
   1079   1.1    itojun 		if (get >= end)
   1080   1.1    itojun 			get = sc->sc_rbuf;
   1081   1.1    itojun 		cc--;
   1082   1.1    itojun 	}
   1083   1.1    itojun 
   1084   1.1    itojun 	if (cc != scc) {
   1085   1.1    itojun 		sc->sc_rbget = get;
   1086   1.1    itojun 		s = splserial();
   1087   1.1    itojun 		cc = sc->sc_rbavail += scc - cc;
   1088   1.1    itojun 		/* Buffers should be ok again, release possible block. */
   1089   1.1    itojun 		if (cc >= sc->sc_r_lowat) {
   1090   1.1    itojun 			if (ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) {
   1091   1.1    itojun 				CLR(sc->sc_rx_flags, RX_IBUF_OVERFLOWED);
   1092  1.37       uwe 				scif_scr_write(scif_scr_read() | SCSCR2_RIE);
   1093   1.1    itojun 			}
   1094   1.1    itojun #if 0
   1095   1.1    itojun 			if (ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED)) {
   1096   1.1    itojun 				CLR(sc->sc_rx_flags, RX_IBUF_BLOCKED);
   1097   1.1    itojun 				scif_hwiflow(sc);
   1098   1.1    itojun 			}
   1099   1.1    itojun #endif
   1100   1.1    itojun 		}
   1101   1.1    itojun 		splx(s);
   1102   1.1    itojun 	}
   1103   1.1    itojun }
   1104   1.1    itojun 
   1105   1.1    itojun integrate void
   1106  1.20       uch scif_txsoft(struct scif_softc *sc, struct tty *tp)
   1107   1.1    itojun {
   1108   1.1    itojun 
   1109   1.1    itojun 	CLR(tp->t_state, TS_BUSY);
   1110   1.1    itojun 	if (ISSET(tp->t_state, TS_FLUSH))
   1111   1.1    itojun 		CLR(tp->t_state, TS_FLUSH);
   1112   1.1    itojun 	else
   1113   1.1    itojun 		ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf));
   1114  1.13       eeh 	(*tp->t_linesw->l_start)(tp);
   1115   1.1    itojun }
   1116   1.1    itojun 
   1117   1.1    itojun integrate void
   1118  1.20       uch scif_stsoft(struct scif_softc *sc, struct tty *tp)
   1119   1.1    itojun {
   1120   1.1    itojun #if 0
   1121   1.1    itojun /* XXX (msaitoh) */
   1122   1.1    itojun 	u_char msr, delta;
   1123   1.1    itojun 	int s;
   1124   1.1    itojun 
   1125   1.1    itojun 	s = splserial();
   1126   1.1    itojun 	msr = sc->sc_msr;
   1127   1.1    itojun 	delta = sc->sc_msr_delta;
   1128   1.1    itojun 	sc->sc_msr_delta = 0;
   1129   1.1    itojun 	splx(s);
   1130   1.1    itojun 
   1131   1.1    itojun 	if (ISSET(delta, sc->sc_msr_dcd)) {
   1132   1.1    itojun 		/*
   1133   1.1    itojun 		 * Inform the tty layer that carrier detect changed.
   1134   1.1    itojun 		 */
   1135  1.13       eeh 		(void) (*tp->t_linesw->l_modem)(tp, ISSET(msr, MSR_DCD));
   1136   1.1    itojun 	}
   1137   1.1    itojun 
   1138   1.1    itojun 	if (ISSET(delta, sc->sc_msr_cts)) {
   1139   1.1    itojun 		/* Block or unblock output according to flow control. */
   1140   1.1    itojun 		if (ISSET(msr, sc->sc_msr_cts)) {
   1141   1.1    itojun 			sc->sc_tx_stopped = 0;
   1142  1.13       eeh 			(*tp->t_linesw->l_start)(tp);
   1143   1.1    itojun 		} else {
   1144   1.1    itojun 			sc->sc_tx_stopped = 1;
   1145   1.1    itojun 		}
   1146   1.1    itojun 	}
   1147   1.1    itojun 
   1148   1.1    itojun #ifdef SCIF_DEBUG
   1149   1.1    itojun 	if (scif_debug)
   1150   1.1    itojun 		scifstatus(sc, "scif_stsoft");
   1151   1.1    itojun #endif
   1152   1.1    itojun #endif
   1153   1.1    itojun }
   1154   1.1    itojun 
   1155   1.1    itojun void
   1156  1.20       uch scifsoft(void *arg)
   1157   1.1    itojun {
   1158   1.1    itojun 	struct scif_softc *sc = arg;
   1159   1.1    itojun 	struct tty *tp;
   1160   1.1    itojun 
   1161  1.44   thorpej 	if (!device_is_active(&sc->sc_dev))
   1162   1.1    itojun 		return;
   1163   1.1    itojun 
   1164  1.51        ad 	tp = sc->sc_tty;
   1165   1.1    itojun 
   1166  1.51        ad 	if (sc->sc_rx_ready) {
   1167  1.51        ad 		sc->sc_rx_ready = 0;
   1168  1.51        ad 		scif_rxsoft(sc, tp);
   1169  1.51        ad 	}
   1170   1.1    itojun 
   1171   1.1    itojun #if 0
   1172  1.51        ad 	if (sc->sc_st_check) {
   1173  1.51        ad 		sc->sc_st_check = 0;
   1174  1.51        ad 		scif_stsoft(sc, tp);
   1175  1.51        ad 	}
   1176   1.1    itojun #endif
   1177   1.1    itojun 
   1178  1.51        ad 	if (sc->sc_tx_done) {
   1179  1.51        ad 		sc->sc_tx_done = 0;
   1180  1.51        ad 		scif_txsoft(sc, tp);
   1181   1.1    itojun 	}
   1182   1.1    itojun }
   1183   1.1    itojun 
   1184   1.1    itojun int
   1185  1.20       uch scifintr(void *arg)
   1186   1.1    itojun {
   1187   1.1    itojun 	struct scif_softc *sc = arg;
   1188   1.1    itojun 	u_char *put, *end;
   1189   1.1    itojun 	u_int cc;
   1190   1.1    itojun 	u_short ssr2;
   1191   1.1    itojun 	int count;
   1192   1.1    itojun 
   1193  1.44   thorpej 	if (!device_is_active(&sc->sc_dev))
   1194   1.1    itojun 		return (0);
   1195   1.1    itojun 
   1196   1.1    itojun 	end = sc->sc_ebuf;
   1197   1.1    itojun 	put = sc->sc_rbput;
   1198   1.1    itojun 	cc = sc->sc_rbavail;
   1199   1.1    itojun 
   1200  1.26   msaitoh 	do {
   1201  1.37       uwe 		ssr2 = scif_ssr_read();
   1202  1.26   msaitoh 		if (ISSET(ssr2, SCSSR2_BRK)) {
   1203  1.37       uwe 			scif_ssr_write(scif_ssr_read()
   1204  1.37       uwe 				& ~(SCSSR2_ER | SCSSR2_BRK | SCSSR2_DR));
   1205   1.1    itojun #ifdef DDB
   1206  1.26   msaitoh 			if (ISSET(sc->sc_hwflags, SCIF_HW_CONSOLE)) {
   1207  1.26   msaitoh 				console_debugger();
   1208  1.26   msaitoh 			}
   1209  1.22       uch #endif /* DDB */
   1210   1.1    itojun #ifdef KGDB
   1211  1.26   msaitoh 			if (ISSET(sc->sc_hwflags, SCIF_HW_KGDB)) {
   1212  1.26   msaitoh 				kgdb_connect(1);
   1213  1.26   msaitoh 			}
   1214  1.22       uch #endif /* KGDB */
   1215   1.1    itojun 		}
   1216  1.37       uwe 		count = scif_fdr_read() & SCFDR2_RECVCNT;
   1217  1.26   msaitoh 		if (count != 0) {
   1218  1.36       uwe 			for (;;) {
   1219  1.37       uwe 				u_char c = scif_frdr_read();
   1220  1.37       uwe 				u_char err = (u_char)(scif_ssr_read() & 0x00ff);
   1221   1.1    itojun 
   1222  1.37       uwe 				scif_ssr_write(scif_ssr_read()
   1223  1.37       uwe 				    & ~(SCSSR2_ER | SCSSR2_RDF | SCSSR2_DR));
   1224  1.26   msaitoh #ifdef SH4
   1225  1.26   msaitoh 				if (CPU_IS_SH4)
   1226  1.37       uwe 					scif_lsr_write(scif_lsr_read()
   1227  1.37       uwe 						       & ~SCLSR2_ORER);
   1228  1.26   msaitoh #endif
   1229  1.26   msaitoh 				if ((cc > 0) && (count > 0)) {
   1230  1.26   msaitoh 					put[0] = c;
   1231  1.26   msaitoh 					put[1] = err;
   1232  1.26   msaitoh 					put += 2;
   1233  1.26   msaitoh 					if (put >= end)
   1234  1.26   msaitoh 						put = sc->sc_rbuf;
   1235  1.26   msaitoh 					cc--;
   1236  1.26   msaitoh 					count--;
   1237  1.26   msaitoh 				} else
   1238  1.26   msaitoh 					break;
   1239  1.26   msaitoh 			}
   1240  1.26   msaitoh 
   1241  1.26   msaitoh 			/*
   1242  1.26   msaitoh 			 * Current string of incoming characters ended because
   1243  1.26   msaitoh 			 * no more data was available or we ran out of space.
   1244  1.26   msaitoh 			 * Schedule a receive event if any data was received.
   1245  1.26   msaitoh 			 * If we're out of space, turn off receive interrupts.
   1246  1.26   msaitoh 			 */
   1247  1.26   msaitoh 			sc->sc_rbput = put;
   1248  1.26   msaitoh 			sc->sc_rbavail = cc;
   1249  1.26   msaitoh 			if (!ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED))
   1250  1.26   msaitoh 				sc->sc_rx_ready = 1;
   1251   1.1    itojun 
   1252  1.26   msaitoh 			/*
   1253  1.26   msaitoh 			 * See if we are in danger of overflowing a buffer. If
   1254  1.26   msaitoh 			 * so, use hardware flow control to ease the pressure.
   1255  1.26   msaitoh 			 */
   1256  1.26   msaitoh 			if (!ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED) &&
   1257  1.26   msaitoh 			    cc < sc->sc_r_hiwat) {
   1258  1.26   msaitoh 				SET(sc->sc_rx_flags, RX_IBUF_BLOCKED);
   1259   1.1    itojun #if 0
   1260  1.26   msaitoh 				scif_hwiflow(sc);
   1261   1.1    itojun #endif
   1262  1.26   msaitoh 			}
   1263   1.1    itojun 
   1264  1.26   msaitoh 			/*
   1265  1.26   msaitoh 			 * If we're out of space, disable receive interrupts
   1266  1.26   msaitoh 			 * until the queue has drained a bit.
   1267  1.26   msaitoh 			 */
   1268  1.26   msaitoh 			if (!cc) {
   1269  1.26   msaitoh 				SET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED);
   1270  1.37       uwe 				scif_scr_write(scif_scr_read() & ~SCSCR2_RIE);
   1271  1.26   msaitoh 			}
   1272  1.26   msaitoh 		} else {
   1273  1.37       uwe 			if (scif_ssr_read() & (SCSSR2_RDF | SCSSR2_DR)) {
   1274  1.37       uwe 				scif_scr_write(scif_scr_read()
   1275  1.37       uwe 					       & ~(SCSCR2_TIE | SCSCR2_RIE));
   1276  1.26   msaitoh 				delay(10);
   1277  1.37       uwe 				scif_scr_write(scif_scr_read()
   1278  1.37       uwe 					       | SCSCR2_TIE | SCSCR2_RIE);
   1279  1.26   msaitoh 				continue;
   1280  1.26   msaitoh 			}
   1281   1.7   msaitoh 		}
   1282  1.37       uwe 	} while (scif_ssr_read() & (SCSSR2_RDF | SCSSR2_DR));
   1283   1.1    itojun 
   1284   1.1    itojun #if 0
   1285   1.7   msaitoh 	msr = bus_space_read_1(iot, ioh, scif_msr);
   1286   1.7   msaitoh 	delta = msr ^ sc->sc_msr;
   1287   1.7   msaitoh 	sc->sc_msr = msr;
   1288   1.7   msaitoh 	if (ISSET(delta, sc->sc_msr_mask)) {
   1289   1.7   msaitoh 		SET(sc->sc_msr_delta, delta);
   1290   1.1    itojun 
   1291   1.7   msaitoh 		/*
   1292   1.7   msaitoh 		 * Pulse-per-second clock signal on edge of DCD?
   1293   1.7   msaitoh 		 */
   1294   1.7   msaitoh 		if (ISSET(delta, sc->sc_ppsmask)) {
   1295   1.7   msaitoh 			struct timeval tv;
   1296   1.7   msaitoh 			if (ISSET(msr, sc->sc_ppsmask) ==
   1297   1.7   msaitoh 			    sc->sc_ppsassert) {
   1298   1.7   msaitoh 				/* XXX nanotime() */
   1299   1.7   msaitoh 				microtime(&tv);
   1300   1.7   msaitoh 				TIMEVAL_TO_TIMESPEC(&tv,
   1301   1.7   msaitoh 						    &sc->ppsinfo.assert_timestamp);
   1302   1.7   msaitoh 				if (sc->ppsparam.mode & PPS_OFFSETASSERT) {
   1303   1.7   msaitoh 					timespecadd(&sc->ppsinfo.assert_timestamp,
   1304   1.1    itojun 						    &sc->ppsparam.assert_offset,
   1305   1.1    itojun 						    &sc->ppsinfo.assert_timestamp);
   1306   1.7   msaitoh 					TIMESPEC_TO_TIMEVAL(&tv, &sc->ppsinfo.assert_timestamp);
   1307   1.7   msaitoh 				}
   1308   1.1    itojun 
   1309   1.1    itojun #ifdef PPS_SYNC
   1310   1.7   msaitoh 				if (sc->ppsparam.mode & PPS_HARDPPSONASSERT)
   1311   1.7   msaitoh 					hardpps(&tv, tv.tv_usec);
   1312   1.1    itojun #endif
   1313   1.7   msaitoh 				sc->ppsinfo.assert_sequence++;
   1314   1.7   msaitoh 				sc->ppsinfo.current_mode =
   1315   1.7   msaitoh 					sc->ppsparam.mode;
   1316   1.7   msaitoh 
   1317   1.7   msaitoh 			} else if (ISSET(msr, sc->sc_ppsmask) ==
   1318   1.7   msaitoh 				   sc->sc_ppsclear) {
   1319   1.7   msaitoh 				/* XXX nanotime() */
   1320   1.7   msaitoh 				microtime(&tv);
   1321   1.7   msaitoh 				TIMEVAL_TO_TIMESPEC(&tv,
   1322   1.7   msaitoh 						    &sc->ppsinfo.clear_timestamp);
   1323   1.7   msaitoh 				if (sc->ppsparam.mode & PPS_OFFSETCLEAR) {
   1324   1.7   msaitoh 					timespecadd(&sc->ppsinfo.clear_timestamp,
   1325   1.1    itojun 						    &sc->ppsparam.clear_offset,
   1326   1.1    itojun 						    &sc->ppsinfo.clear_timestamp);
   1327   1.7   msaitoh 					TIMESPEC_TO_TIMEVAL(&tv, &sc->ppsinfo.clear_timestamp);
   1328   1.7   msaitoh 				}
   1329   1.1    itojun 
   1330   1.1    itojun #ifdef PPS_SYNC
   1331   1.7   msaitoh 				if (sc->ppsparam.mode & PPS_HARDPPSONCLEAR)
   1332   1.7   msaitoh 					hardpps(&tv, tv.tv_usec);
   1333   1.1    itojun #endif
   1334   1.7   msaitoh 				sc->ppsinfo.clear_sequence++;
   1335   1.7   msaitoh 				sc->ppsinfo.current_mode =
   1336   1.7   msaitoh 					sc->ppsparam.mode;
   1337   1.1    itojun 			}
   1338   1.7   msaitoh 		}
   1339   1.1    itojun 
   1340   1.7   msaitoh 		/*
   1341   1.7   msaitoh 		 * Stop output immediately if we lose the output
   1342   1.7   msaitoh 		 * flow control signal or carrier detect.
   1343   1.7   msaitoh 		 */
   1344   1.7   msaitoh 		if (ISSET(~msr, sc->sc_msr_mask)) {
   1345   1.7   msaitoh 			sc->sc_tbc = 0;
   1346   1.7   msaitoh 			sc->sc_heldtbc = 0;
   1347   1.1    itojun #ifdef SCIF_DEBUG
   1348   1.7   msaitoh 			if (scif_debug)
   1349   1.7   msaitoh 				scifstatus(sc, "scifintr  ");
   1350   1.1    itojun #endif
   1351   1.7   msaitoh 		}
   1352   1.1    itojun 
   1353   1.7   msaitoh 		sc->sc_st_check = 1;
   1354   1.7   msaitoh 	}
   1355   1.1    itojun #endif
   1356   1.1    itojun 
   1357   1.1    itojun 	/*
   1358   1.1    itojun 	 * Done handling any receive interrupts. See if data can be
   1359   1.1    itojun 	 * transmitted as well. Schedule tx done event if no data left
   1360   1.1    itojun 	 * and tty was marked busy.
   1361   1.1    itojun 	 */
   1362  1.37       uwe 	if (((scif_fdr_read() & SCFDR2_TXCNT) >> 8) != 16) { /* XXX (msaitoh) */
   1363   1.1    itojun 		/*
   1364   1.1    itojun 		 * If we've delayed a parameter change, do it now, and restart
   1365   1.1    itojun 		 * output.
   1366   1.1    itojun 		 */
   1367   1.1    itojun 		if (sc->sc_heldchange) {
   1368   1.1    itojun 			sc->sc_heldchange = 0;
   1369   1.1    itojun 			sc->sc_tbc = sc->sc_heldtbc;
   1370   1.1    itojun 			sc->sc_heldtbc = 0;
   1371   1.1    itojun 		}
   1372   1.1    itojun 
   1373   1.1    itojun 		/* Output the next chunk of the contiguous buffer, if any. */
   1374   1.1    itojun 		if (sc->sc_tbc > 0) {
   1375   1.1    itojun 			int n;
   1376  1.39       uwe 			int maxchars;
   1377   1.1    itojun 			int i;
   1378   1.1    itojun 
   1379   1.1    itojun 			n = sc->sc_tbc;
   1380  1.39       uwe 			maxchars = sc->sc_fifolen -
   1381  1.37       uwe 				((scif_fdr_read() & SCFDR2_TXCNT) >> 8);
   1382  1.39       uwe 			if (n > maxchars)
   1383  1.39       uwe 				n = maxchars;
   1384   1.1    itojun 
   1385   1.1    itojun 			for (i = 0; i < n; i++) {
   1386  1.14   msaitoh 				scif_putc(*(sc->sc_tba));
   1387   1.1    itojun 				sc->sc_tba++;
   1388   1.1    itojun 			}
   1389   1.1    itojun 			sc->sc_tbc -= n;
   1390   1.1    itojun 		} else {
   1391   1.1    itojun 			/* Disable transmit completion interrupts if necessary. */
   1392   1.1    itojun #if 0
   1393   1.1    itojun 			if (ISSET(sc->sc_ier, IER_ETXRDY))
   1394   1.1    itojun #endif
   1395  1.37       uwe 				scif_scr_write(scif_scr_read() & ~SCSCR2_TIE);
   1396   1.1    itojun 
   1397   1.1    itojun 			if (sc->sc_tx_busy) {
   1398   1.1    itojun 				sc->sc_tx_busy = 0;
   1399   1.1    itojun 				sc->sc_tx_done = 1;
   1400   1.1    itojun 			}
   1401   1.1    itojun 		}
   1402   1.1    itojun 	}
   1403   1.1    itojun 
   1404   1.1    itojun 	/* Wake up the poller. */
   1405   1.1    itojun 	softintr_schedule(sc->sc_si);
   1406   1.1    itojun 
   1407   1.1    itojun #if NRND > 0 && defined(RND_SCIF)
   1408  1.36       uwe 	rnd_add_uint32(&sc->rnd_source, iir | lsr);
   1409   1.1    itojun #endif
   1410   1.1    itojun 
   1411   1.1    itojun 	return (1);
   1412   1.1    itojun }
   1413   1.1    itojun 
   1414   1.1    itojun void
   1415  1.20       uch scifcnprobe(struct consdev *cp)
   1416   1.1    itojun {
   1417   1.1    itojun 	int maj;
   1418   1.1    itojun 
   1419   1.1    itojun 	/* locate the major number */
   1420  1.28   gehenna 	maj = cdevsw_lookup_major(&scif_cdevsw);
   1421   1.1    itojun 
   1422   1.1    itojun 	/* Initialize required fields. */
   1423   1.1    itojun 	cp->cn_dev = makedev(maj, 0);
   1424   1.4   msaitoh #ifdef SCIFCONSOLE
   1425   1.4   msaitoh 	cp->cn_pri = CN_REMOTE;
   1426   1.4   msaitoh #else
   1427   1.1    itojun 	cp->cn_pri = CN_NORMAL;
   1428   1.1    itojun #endif
   1429   1.1    itojun }
   1430   1.1    itojun 
   1431   1.1    itojun void
   1432  1.20       uch scifcninit(struct consdev *cp)
   1433   1.1    itojun {
   1434   1.1    itojun 
   1435   1.7   msaitoh 	InitializeScif(scifcn_speed);
   1436   1.9   msaitoh 	scifisconsole = 1;
   1437   1.1    itojun }
   1438   1.1    itojun 
   1439   1.1    itojun int
   1440  1.20       uch scifcngetc(dev_t dev)
   1441   1.1    itojun {
   1442   1.1    itojun 	int c;
   1443   1.1    itojun 	int s;
   1444   1.1    itojun 
   1445   1.1    itojun 	s = splserial();
   1446   1.1    itojun 	c = scif_getc();
   1447   1.1    itojun 	splx(s);
   1448   1.1    itojun 
   1449   1.1    itojun 	return (c);
   1450   1.1    itojun }
   1451   1.1    itojun 
   1452   1.1    itojun void
   1453  1.20       uch scifcnputc(dev_t dev, int c)
   1454   1.1    itojun {
   1455   1.1    itojun 	int s;
   1456   1.1    itojun 
   1457   1.1    itojun 	s = splserial();
   1458  1.14   msaitoh 	scif_putc((u_char)c);
   1459   1.1    itojun 	splx(s);
   1460   1.1    itojun }
   1461  1.22       uch 
   1462  1.22       uch #ifdef KGDB
   1463  1.22       uch int
   1464  1.22       uch scif_kgdb_init()
   1465  1.22       uch {
   1466  1.22       uch 
   1467  1.22       uch 	if (strcmp(kgdb_devname, "scif") != 0)
   1468  1.22       uch 		return (1);
   1469  1.22       uch 
   1470  1.22       uch 	if (scifisconsole)
   1471  1.22       uch 		return (1);	/* can't share with console */
   1472  1.22       uch 
   1473  1.22       uch 	InitializeScif(kgdb_rate);
   1474  1.22       uch 
   1475  1.22       uch 	kgdb_attach((int (*)(void *))scifcngetc,
   1476  1.22       uch 	    (void (*)(void *, int))scifcnputc, NULL);
   1477  1.22       uch 	kgdb_dev = 123; /* unneeded, only to satisfy some tests */
   1478  1.22       uch 	kgdb_attached = 1;
   1479  1.25       uch 
   1480  1.22       uch 	return (0);
   1481  1.22       uch }
   1482  1.22       uch #endif /* KGDB */
   1483