scif.c revision 1.66 1 1.66 tsutsui /* $NetBSD: scif.c,v 1.66 2015/12/06 02:21:55 tsutsui Exp $ */
2 1.1 itojun
3 1.1 itojun /*-
4 1.1 itojun * Copyright (C) 1999 T.Horiuchi and SAITOH Masanobu. All rights reserved.
5 1.1 itojun *
6 1.1 itojun * Redistribution and use in source and binary forms, with or without
7 1.1 itojun * modification, are permitted provided that the following conditions
8 1.1 itojun * are met:
9 1.1 itojun * 1. Redistributions of source code must retain the above copyright
10 1.1 itojun * notice, this list of conditions and the following disclaimer.
11 1.1 itojun * 2. Redistributions in binary form must reproduce the above copyright
12 1.1 itojun * notice, this list of conditions and the following disclaimer in the
13 1.1 itojun * documentation and/or other materials provided with the distribution.
14 1.1 itojun * 3. The name of the author may not be used to endorse or promote products
15 1.1 itojun * derived from this software without specific prior written permission.
16 1.1 itojun *
17 1.1 itojun * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 1.1 itojun * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 1.1 itojun * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 1.1 itojun * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 1.1 itojun * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 1.1 itojun * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 1.1 itojun * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 1.1 itojun * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 1.1 itojun * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 1.1 itojun * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 1.1 itojun */
28 1.1 itojun
29 1.2 msaitoh /*-
30 1.2 msaitoh * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc.
31 1.2 msaitoh * All rights reserved.
32 1.2 msaitoh *
33 1.2 msaitoh * This code is derived from software contributed to The NetBSD Foundation
34 1.2 msaitoh * by Charles M. Hannum.
35 1.2 msaitoh *
36 1.2 msaitoh * Redistribution and use in source and binary forms, with or without
37 1.2 msaitoh * modification, are permitted provided that the following conditions
38 1.2 msaitoh * are met:
39 1.2 msaitoh * 1. Redistributions of source code must retain the above copyright
40 1.2 msaitoh * notice, this list of conditions and the following disclaimer.
41 1.2 msaitoh * 2. Redistributions in binary form must reproduce the above copyright
42 1.2 msaitoh * notice, this list of conditions and the following disclaimer in the
43 1.2 msaitoh * documentation and/or other materials provided with the distribution.
44 1.2 msaitoh *
45 1.2 msaitoh * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
46 1.2 msaitoh * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
47 1.2 msaitoh * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
48 1.2 msaitoh * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
49 1.2 msaitoh * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
50 1.2 msaitoh * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
51 1.2 msaitoh * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
52 1.2 msaitoh * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
53 1.2 msaitoh * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
54 1.2 msaitoh * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
55 1.2 msaitoh * POSSIBILITY OF SUCH DAMAGE.
56 1.2 msaitoh */
57 1.2 msaitoh
58 1.2 msaitoh /*
59 1.2 msaitoh * Copyright (c) 1991 The Regents of the University of California.
60 1.2 msaitoh * All rights reserved.
61 1.2 msaitoh *
62 1.2 msaitoh * Redistribution and use in source and binary forms, with or without
63 1.2 msaitoh * modification, are permitted provided that the following conditions
64 1.2 msaitoh * are met:
65 1.2 msaitoh * 1. Redistributions of source code must retain the above copyright
66 1.2 msaitoh * notice, this list of conditions and the following disclaimer.
67 1.2 msaitoh * 2. Redistributions in binary form must reproduce the above copyright
68 1.2 msaitoh * notice, this list of conditions and the following disclaimer in the
69 1.2 msaitoh * documentation and/or other materials provided with the distribution.
70 1.35 agc * 3. Neither the name of the University nor the names of its contributors
71 1.2 msaitoh * may be used to endorse or promote products derived from this software
72 1.2 msaitoh * without specific prior written permission.
73 1.2 msaitoh *
74 1.2 msaitoh * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
75 1.2 msaitoh * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
76 1.2 msaitoh * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
77 1.2 msaitoh * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
78 1.2 msaitoh * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
79 1.2 msaitoh * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
80 1.2 msaitoh * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
81 1.2 msaitoh * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
82 1.2 msaitoh * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
83 1.2 msaitoh * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
84 1.2 msaitoh * SUCH DAMAGE.
85 1.2 msaitoh *
86 1.2 msaitoh * @(#)com.c 7.5 (Berkeley) 5/16/91
87 1.2 msaitoh */
88 1.2 msaitoh
89 1.2 msaitoh /*
90 1.2 msaitoh * SH internal serial driver
91 1.2 msaitoh *
92 1.2 msaitoh * This code is derived from both z8530tty.c and com.c
93 1.2 msaitoh */
94 1.34 lukem
95 1.34 lukem #include <sys/cdefs.h>
96 1.66 tsutsui __KERNEL_RCSID(0, "$NetBSD: scif.c,v 1.66 2015/12/06 02:21:55 tsutsui Exp $");
97 1.2 msaitoh
98 1.17 lukem #include "opt_kgdb.h"
99 1.1 itojun #include "opt_scif.h"
100 1.1 itojun
101 1.1 itojun #include <sys/param.h>
102 1.1 itojun #include <sys/systm.h>
103 1.1 itojun #include <sys/tty.h>
104 1.1 itojun #include <sys/proc.h>
105 1.1 itojun #include <sys/conf.h>
106 1.1 itojun #include <sys/file.h>
107 1.1 itojun #include <sys/syslog.h>
108 1.1 itojun #include <sys/kernel.h>
109 1.1 itojun #include <sys/device.h>
110 1.1 itojun #include <sys/malloc.h>
111 1.22 uch #include <sys/kgdb.h>
112 1.46 elad #include <sys/kauth.h>
113 1.55 ad #include <sys/intr.h>
114 1.1 itojun
115 1.1 itojun #include <dev/cons.h>
116 1.1 itojun
117 1.21 uch #include <sh3/clock.h>
118 1.24 uch #include <sh3/exception.h>
119 1.1 itojun #include <sh3/scifreg.h>
120 1.24 uch
121 1.22 uch #include <sh3/dev/scifvar.h>
122 1.1 itojun
123 1.24 uch #include "locators.h"
124 1.1 itojun
125 1.1 itojun
126 1.1 itojun struct scif_softc {
127 1.56 uwe device_t sc_dev;
128 1.53 uwe
129 1.1 itojun struct tty *sc_tty;
130 1.24 uch void *sc_si;
131 1.1 itojun
132 1.51 ad callout_t sc_diag_ch;
133 1.8 thorpej
134 1.1 itojun #if 0
135 1.1 itojun bus_space_tag_t sc_iot; /* ISA i/o space identifier */
136 1.1 itojun bus_space_handle_t sc_ioh; /* ISA io handle */
137 1.1 itojun
138 1.1 itojun int sc_drq;
139 1.1 itojun
140 1.1 itojun int sc_frequency;
141 1.1 itojun #endif
142 1.1 itojun
143 1.1 itojun u_int sc_overflows,
144 1.1 itojun sc_floods,
145 1.1 itojun sc_errors; /* number of retries so far */
146 1.1 itojun u_char sc_status[7]; /* copy of registers */
147 1.1 itojun
148 1.1 itojun int sc_hwflags;
149 1.1 itojun int sc_swflags;
150 1.1 itojun u_int sc_fifolen;
151 1.1 itojun
152 1.1 itojun u_int sc_r_hiwat,
153 1.1 itojun sc_r_lowat;
154 1.1 itojun u_char *volatile sc_rbget,
155 1.1 itojun *volatile sc_rbput;
156 1.1 itojun volatile u_int sc_rbavail;
157 1.1 itojun u_char *sc_rbuf,
158 1.1 itojun *sc_ebuf;
159 1.1 itojun
160 1.1 itojun u_char *sc_tba; /* transmit buffer address */
161 1.1 itojun u_int sc_tbc, /* transmit byte count */
162 1.1 itojun sc_heldtbc;
163 1.1 itojun
164 1.1 itojun volatile u_char sc_rx_flags,
165 1.1 itojun #define RX_TTY_BLOCKED 0x01
166 1.1 itojun #define RX_TTY_OVERFLOWED 0x02
167 1.1 itojun #define RX_IBUF_BLOCKED 0x04
168 1.1 itojun #define RX_IBUF_OVERFLOWED 0x08
169 1.1 itojun #define RX_ANY_BLOCK 0x0f
170 1.3 msaitoh sc_tx_busy, /* working on an output chunk */
171 1.3 msaitoh sc_tx_done, /* done with one output chunk */
172 1.2 msaitoh sc_tx_stopped, /* H/W level stop (lost CTS) */
173 1.2 msaitoh sc_st_check, /* got a status interrupt */
174 1.1 itojun sc_rx_ready;
175 1.1 itojun
176 1.1 itojun volatile u_char sc_heldchange;
177 1.1 itojun };
178 1.1 itojun
179 1.1 itojun
180 1.56 uwe static int scif_match(device_t, cfdata_t, void *);
181 1.53 uwe static void scif_attach(device_t, device_t, void *);
182 1.53 uwe
183 1.56 uwe CFATTACH_DECL_NEW(scif, sizeof(struct scif_softc),
184 1.53 uwe scif_match, scif_attach, NULL, NULL);
185 1.53 uwe
186 1.53 uwe static int scif_attached = 0; /* XXX: FIXME: don't limit to just one! */
187 1.53 uwe
188 1.53 uwe extern struct cfdriver scif_cd;
189 1.1 itojun
190 1.65 christos #define SCIFUNIT(x) TTUNIT(x)
191 1.65 christos #define SCIFDIALOUT(x) TTDIALOUT(x)
192 1.1 itojun
193 1.53 uwe
194 1.53 uwe /* console */
195 1.53 uwe dev_type_cnprobe(scifcnprobe);
196 1.53 uwe dev_type_cninit(scifcninit);
197 1.53 uwe dev_type_cngetc(scifcngetc);
198 1.53 uwe dev_type_cnputc(scifcnputc);
199 1.53 uwe
200 1.53 uwe
201 1.53 uwe /* cdevsw */
202 1.53 uwe dev_type_open(scifopen);
203 1.53 uwe dev_type_close(scifclose);
204 1.53 uwe dev_type_read(scifread);
205 1.53 uwe dev_type_write(scifwrite);
206 1.53 uwe dev_type_ioctl(scifioctl);
207 1.53 uwe dev_type_stop(scifstop);
208 1.53 uwe dev_type_tty(sciftty);
209 1.53 uwe dev_type_poll(scifpoll);
210 1.53 uwe
211 1.53 uwe const struct cdevsw scif_cdevsw = {
212 1.63 dholland .d_open = scifopen,
213 1.63 dholland .d_close = scifclose,
214 1.63 dholland .d_read = scifread,
215 1.63 dholland .d_write = scifwrite,
216 1.63 dholland .d_ioctl = scifioctl,
217 1.63 dholland .d_stop = scifstop,
218 1.63 dholland .d_tty = sciftty,
219 1.63 dholland .d_poll = scifpoll,
220 1.63 dholland .d_mmap = nommap,
221 1.63 dholland .d_kqfilter = ttykqfilter,
222 1.64 dholland .d_discard = nodiscard,
223 1.63 dholland .d_flag = D_TTY
224 1.53 uwe };
225 1.53 uwe
226 1.66 tsutsui #ifndef SCIFCONSOLE
227 1.66 tsutsui #define SCIFCONSOLE 0
228 1.66 tsutsui #endif
229 1.66 tsutsui int scifconsole = SCIFCONSOLE; /* patchable */
230 1.53 uwe
231 1.53 uwe /* struct tty */
232 1.53 uwe static void scifstart(struct tty *);
233 1.53 uwe static int scifparam(struct tty *, struct termios *);
234 1.53 uwe
235 1.53 uwe
236 1.53 uwe void InitializeScif (unsigned int);
237 1.53 uwe int ScifErrCheck(void);
238 1.53 uwe void scif_putc(unsigned char);
239 1.53 uwe unsigned char scif_getc(void);
240 1.53 uwe
241 1.53 uwe static int scifintr(void *);
242 1.53 uwe static void scifsoft(void *);
243 1.53 uwe static void scif_rxsoft(struct scif_softc *, struct tty *);
244 1.53 uwe static void scif_txsoft(struct scif_softc *, struct tty *);
245 1.53 uwe #if 0
246 1.53 uwe static void scif_stsoft(struct scif_softc *, struct tty *);
247 1.53 uwe #endif
248 1.53 uwe static void scif_schedrx(struct scif_softc *);
249 1.53 uwe static void scifdiag(void *);
250 1.53 uwe
251 1.53 uwe static void scif_break(struct scif_softc *, int);
252 1.53 uwe static void scif_iflush(struct scif_softc *);
253 1.53 uwe
254 1.53 uwe
255 1.53 uwe /* Hardware flag masks (sc_hwflags) */
256 1.1 itojun #define SCIF_HW_NOIEN 0x01
257 1.1 itojun #define SCIF_HW_FIFO 0x02
258 1.1 itojun #define SCIF_HW_FLOW 0x08
259 1.1 itojun #define SCIF_HW_DEV_OK 0x20
260 1.1 itojun #define SCIF_HW_CONSOLE 0x40
261 1.1 itojun #define SCIF_HW_KGDB 0x80
262 1.1 itojun
263 1.53 uwe
264 1.1 itojun /* Buffer size for character buffer */
265 1.1 itojun #define SCIF_RING_SIZE 2048
266 1.53 uwe static unsigned int scif_rbuf_size = SCIF_RING_SIZE;
267 1.1 itojun
268 1.1 itojun /* Stop input when 3/4 of the ring is full; restart when only 1/4 is full. */
269 1.53 uwe static unsigned int scif_rbuf_hiwat = (SCIF_RING_SIZE * 1) / 4;
270 1.53 uwe static unsigned int scif_rbuf_lowat = (SCIF_RING_SIZE * 3) / 4;
271 1.1 itojun
272 1.1 itojun
273 1.7 msaitoh #ifdef SCIFCN_SPEED
274 1.7 msaitoh unsigned int scifcn_speed = SCIFCN_SPEED;
275 1.7 msaitoh #else
276 1.7 msaitoh unsigned int scifcn_speed = 9600;
277 1.7 msaitoh #endif
278 1.7 msaitoh
279 1.53 uwe #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */
280 1.53 uwe int scifconscflag = CONMODE;
281 1.1 itojun
282 1.53 uwe static int scifisconsole = 0;
283 1.1 itojun
284 1.53 uwe #ifdef KGDB
285 1.53 uwe static int kgdb_attached = 0;
286 1.53 uwe #endif
287 1.1 itojun
288 1.1 itojun
289 1.53 uwe #define divrnd(n, q) (((n)*2/(q)+1)/2) /* divide and round off */
290 1.1 itojun
291 1.37 uwe
292 1.37 uwe /* XXX: uwe
293 1.37 uwe * Prepare for bus_spacification. The difference in access widths is
294 1.37 uwe * still handled by the magic definitions in scifreg.h
295 1.37 uwe */
296 1.37 uwe #define scif_smr_read() SHREG_SCSMR2
297 1.37 uwe #define scif_smr_write(v) (SHREG_SCSMR2 = (v))
298 1.37 uwe
299 1.37 uwe #define scif_brr_read() SHREG_SCBRR2
300 1.37 uwe #define scif_brr_write(v) (SHREG_SCBRR2 = (v))
301 1.37 uwe
302 1.37 uwe #define scif_scr_read() SHREG_SCSCR2
303 1.37 uwe #define scif_scr_write(v) (SHREG_SCSCR2 = (v))
304 1.37 uwe
305 1.37 uwe #define scif_ftdr_write(v) (SHREG_SCFTDR2 = (v))
306 1.37 uwe
307 1.37 uwe #define scif_ssr_read() SHREG_SCSSR2
308 1.37 uwe #define scif_ssr_write(v) (SHREG_SCSSR2 = (v))
309 1.37 uwe
310 1.37 uwe #define scif_frdr_read() SHREG_SCFRDR2
311 1.37 uwe
312 1.37 uwe #define scif_fcr_read() SHREG_SCFCR2
313 1.37 uwe #define scif_fcr_write(v) (SHREG_SCFCR2 = (v))
314 1.37 uwe
315 1.37 uwe #define scif_fdr_read() SHREG_SCFDR2
316 1.37 uwe
317 1.37 uwe #ifdef SH4 /* additional registers in sh4 */
318 1.37 uwe
319 1.37 uwe #define scif_sptr_read() SHREG_SCSPTR2
320 1.37 uwe #define scif_sptr_write(v) (SHREG_SCSPTR2 = (v))
321 1.37 uwe
322 1.37 uwe #define scif_lsr_read() SHREG_SCLSR2
323 1.37 uwe #define scif_lsr_write(v) (SHREG_SCLSR2 = (v))
324 1.37 uwe
325 1.37 uwe #endif /* SH4 */
326 1.37 uwe
327 1.37 uwe
328 1.1 itojun void
329 1.20 uch InitializeScif(unsigned int bps)
330 1.1 itojun {
331 1.1 itojun
332 1.1 itojun /* Initialize SCR */
333 1.37 uwe scif_scr_write(0x00);
334 1.1 itojun
335 1.6 msaitoh #if 0
336 1.37 uwe scif_fcr_write(SCFCR2_TFRST | SCFCR2_RFRST | SCFCR2_MCE);
337 1.6 msaitoh #else
338 1.37 uwe scif_fcr_write(SCFCR2_TFRST | SCFCR2_RFRST);
339 1.6 msaitoh #endif
340 1.7 msaitoh /* Serial Mode Register */
341 1.37 uwe scif_smr_write(0x00); /* 8bit,NonParity,Even,1Stop */
342 1.1 itojun
343 1.7 msaitoh /* Bit Rate Register */
344 1.37 uwe scif_brr_write(divrnd(sh_clock_get_pclock(), 32 * bps) - 1);
345 1.1 itojun
346 1.7 msaitoh /*
347 1.40 christos * wait 2m Sec, because Send/Recv must begin 1 bit period after
348 1.7 msaitoh * BRR is set.
349 1.7 msaitoh */
350 1.40 christos delay(2000);
351 1.1 itojun
352 1.6 msaitoh #if 0
353 1.37 uwe scif_fcr_write(FIFO_RCV_TRIGGER_14 | FIFO_XMT_TRIGGER_1 | SCFCR2_MCE);
354 1.6 msaitoh #else
355 1.37 uwe scif_fcr_write(FIFO_RCV_TRIGGER_14 | FIFO_XMT_TRIGGER_1);
356 1.6 msaitoh #endif
357 1.1 itojun
358 1.18 wiz /* Send permission, Receive permission ON */
359 1.37 uwe scif_scr_write(SCSCR2_TE | SCSCR2_RE);
360 1.1 itojun
361 1.7 msaitoh /* Serial Status Register */
362 1.37 uwe scif_ssr_write(scif_ssr_read() & SCSSR2_TDFE); /* Clear Status */
363 1.1 itojun }
364 1.1 itojun
365 1.53 uwe int
366 1.53 uwe ScifErrCheck(void)
367 1.53 uwe {
368 1.1 itojun
369 1.53 uwe return (scif_ssr_read() & (SCSSR2_ER | SCSSR2_FER | SCSSR2_PER));
370 1.53 uwe }
371 1.1 itojun
372 1.1 itojun void
373 1.20 uch scif_putc(unsigned char c)
374 1.1 itojun {
375 1.14 msaitoh
376 1.1 itojun /* wait for ready */
377 1.37 uwe while ((scif_fdr_read() & SCFDR2_TXCNT) == SCFDR2_TXF_FULL)
378 1.36 uwe continue;
379 1.1 itojun
380 1.1 itojun /* write send data to send register */
381 1.37 uwe scif_ftdr_write(c);
382 1.1 itojun
383 1.1 itojun /* clear ready flag */
384 1.37 uwe scif_ssr_write(scif_ssr_read() & ~(SCSSR2_TDFE | SCSSR2_TEND));
385 1.1 itojun }
386 1.1 itojun
387 1.1 itojun unsigned char
388 1.14 msaitoh scif_getc(void)
389 1.1 itojun {
390 1.1 itojun unsigned char c, err_c;
391 1.26 msaitoh #ifdef SH4
392 1.43 uwe unsigned short err_c2 = 0; /* XXXGCC: -Wuninitialized */
393 1.26 msaitoh #endif
394 1.1 itojun
395 1.36 uwe for (;;) {
396 1.12 msaitoh /* wait for ready */
397 1.37 uwe while ((scif_fdr_read() & SCFDR2_RECVCNT) == 0)
398 1.36 uwe continue;
399 1.1 itojun
400 1.37 uwe c = scif_frdr_read();
401 1.37 uwe err_c = scif_ssr_read();
402 1.37 uwe scif_ssr_write(scif_ssr_read()
403 1.37 uwe & ~(SCSSR2_ER | SCSSR2_BRK | SCSSR2_RDF | SCSSR2_DR));
404 1.26 msaitoh #ifdef SH4
405 1.26 msaitoh if (CPU_IS_SH4) {
406 1.37 uwe err_c2 = scif_lsr_read();
407 1.37 uwe scif_lsr_write(scif_lsr_read() & ~SCLSR2_ORER);
408 1.26 msaitoh }
409 1.26 msaitoh #endif
410 1.12 msaitoh if ((err_c & (SCSSR2_ER | SCSSR2_BRK | SCSSR2_FER
411 1.53 uwe | SCSSR2_PER)) == 0)
412 1.53 uwe {
413 1.26 msaitoh #ifdef SH4
414 1.26 msaitoh if (CPU_IS_SH4 && ((err_c2 & SCLSR2_ORER) == 0))
415 1.26 msaitoh #endif
416 1.12 msaitoh return(c);
417 1.12 msaitoh }
418 1.12 msaitoh }
419 1.1 itojun
420 1.1 itojun }
421 1.1 itojun
422 1.1 itojun static int
423 1.56 uwe scif_match(device_t parent, cfdata_t cfp, void *aux)
424 1.1 itojun {
425 1.1 itojun
426 1.53 uwe if (scif_attached)
427 1.53 uwe return 0;
428 1.53 uwe
429 1.53 uwe if (strcmp(cfp->cf_name, "scif") != 0)
430 1.1 itojun return 0;
431 1.1 itojun
432 1.1 itojun return 1;
433 1.1 itojun }
434 1.1 itojun
435 1.1 itojun static void
436 1.53 uwe scif_attach(device_t parent, device_t self, void *aux)
437 1.1 itojun {
438 1.56 uwe struct scif_softc *sc;
439 1.1 itojun struct tty *tp;
440 1.1 itojun
441 1.56 uwe sc = device_private(self);
442 1.56 uwe sc->sc_dev = self;
443 1.56 uwe
444 1.38 chs scif_attached = 1;
445 1.38 chs
446 1.1 itojun sc->sc_hwflags = 0; /* XXX */
447 1.1 itojun sc->sc_swflags = 0; /* XXX */
448 1.1 itojun sc->sc_fifolen = 16;
449 1.1 itojun
450 1.53 uwe aprint_normal("\n");
451 1.53 uwe if (scifisconsole) {
452 1.53 uwe aprint_naive(" (console)\n");
453 1.53 uwe aprint_normal_dev(self, "console\n");
454 1.9 msaitoh SET(sc->sc_hwflags, SCIF_HW_CONSOLE);
455 1.9 msaitoh SET(sc->sc_swflags, TIOCFLAG_SOFTCAR);
456 1.53 uwe }
457 1.53 uwe #ifdef KGDB
458 1.53 uwe else if (kgdb_attached) {
459 1.53 uwe aprint_naive(" (kgdb)\n");
460 1.53 uwe aprint_normal_dev(self, "kgdb\n");
461 1.53 uwe SET(sc->sc_hwflags, SCIF_HW_KGDB);
462 1.53 uwe SET(sc->sc_swflags, TIOCFLAG_SOFTCAR);
463 1.53 uwe }
464 1.53 uwe #endif
465 1.53 uwe else {
466 1.53 uwe aprint_naive("\n");
467 1.53 uwe InitializeScif(9600); /* XXX */
468 1.9 msaitoh }
469 1.1 itojun
470 1.51 ad callout_init(&sc->sc_diag_ch, 0);
471 1.24 uch #ifdef SH4
472 1.24 uch intc_intr_establish(SH4_INTEVT_SCIF_ERI, IST_LEVEL, IPL_SERIAL,
473 1.24 uch scifintr, sc);
474 1.24 uch intc_intr_establish(SH4_INTEVT_SCIF_RXI, IST_LEVEL, IPL_SERIAL,
475 1.24 uch scifintr, sc);
476 1.24 uch intc_intr_establish(SH4_INTEVT_SCIF_BRI, IST_LEVEL, IPL_SERIAL,
477 1.24 uch scifintr, sc);
478 1.24 uch intc_intr_establish(SH4_INTEVT_SCIF_TXI, IST_LEVEL, IPL_SERIAL,
479 1.24 uch scifintr, sc);
480 1.24 uch #else
481 1.24 uch intc_intr_establish(SH7709_INTEVT2_SCIF_ERI, IST_LEVEL, IPL_SERIAL,
482 1.24 uch scifintr, sc);
483 1.24 uch intc_intr_establish(SH7709_INTEVT2_SCIF_RXI, IST_LEVEL, IPL_SERIAL,
484 1.24 uch scifintr, sc);
485 1.24 uch intc_intr_establish(SH7709_INTEVT2_SCIF_BRI, IST_LEVEL, IPL_SERIAL,
486 1.24 uch scifintr, sc);
487 1.24 uch intc_intr_establish(SH7709_INTEVT2_SCIF_TXI, IST_LEVEL, IPL_SERIAL,
488 1.24 uch scifintr, sc);
489 1.24 uch #endif
490 1.8 thorpej
491 1.55 ad sc->sc_si = softint_establish(SOFTINT_SERIAL, scifsoft, sc);
492 1.9 msaitoh SET(sc->sc_hwflags, SCIF_HW_DEV_OK);
493 1.1 itojun
494 1.60 rmind tp = tty_alloc();
495 1.1 itojun tp->t_oproc = scifstart;
496 1.1 itojun tp->t_param = scifparam;
497 1.1 itojun tp->t_hwiflow = NULL;
498 1.1 itojun
499 1.1 itojun sc->sc_tty = tp;
500 1.1 itojun sc->sc_rbuf = malloc(scif_rbuf_size << 1, M_DEVBUF, M_NOWAIT);
501 1.1 itojun if (sc->sc_rbuf == NULL) {
502 1.53 uwe aprint_error_dev(self, "unable to allocate ring buffer\n");
503 1.1 itojun return;
504 1.1 itojun }
505 1.1 itojun sc->sc_ebuf = sc->sc_rbuf + (scif_rbuf_size << 1);
506 1.1 itojun
507 1.1 itojun tty_attach(tp);
508 1.59 uwe
509 1.59 uwe /* XXX: TODO */
510 1.59 uwe if (!pmf_device_register(self, NULL, NULL))
511 1.59 uwe aprint_error_dev(self, "unable to establish power handler\n");
512 1.1 itojun }
513 1.1 itojun
514 1.1 itojun /*
515 1.1 itojun * Start or restart transmission.
516 1.1 itojun */
517 1.1 itojun static void
518 1.20 uch scifstart(struct tty *tp)
519 1.1 itojun {
520 1.56 uwe struct scif_softc *sc;
521 1.1 itojun int s;
522 1.1 itojun
523 1.56 uwe sc = device_lookup_private(&scif_cd, SCIFUNIT(tp->t_dev));
524 1.56 uwe
525 1.1 itojun s = spltty();
526 1.1 itojun if (ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP))
527 1.1 itojun goto out;
528 1.1 itojun if (sc->sc_tx_stopped)
529 1.1 itojun goto out;
530 1.54 ad if (!ttypull(tp))
531 1.54 ad goto out;
532 1.1 itojun
533 1.1 itojun /* Grab the first contiguous region of buffer space. */
534 1.1 itojun {
535 1.1 itojun u_char *tba;
536 1.1 itojun int tbc;
537 1.1 itojun
538 1.1 itojun tba = tp->t_outq.c_cf;
539 1.1 itojun tbc = ndqb(&tp->t_outq, 0);
540 1.1 itojun
541 1.1 itojun (void)splserial();
542 1.1 itojun
543 1.1 itojun sc->sc_tba = tba;
544 1.1 itojun sc->sc_tbc = tbc;
545 1.1 itojun }
546 1.1 itojun
547 1.1 itojun SET(tp->t_state, TS_BUSY);
548 1.1 itojun sc->sc_tx_busy = 1;
549 1.1 itojun
550 1.1 itojun /* Enable transmit completion interrupts if necessary. */
551 1.37 uwe scif_scr_write(scif_scr_read() | SCSCR2_TIE | SCSCR2_RIE);
552 1.1 itojun
553 1.1 itojun /* Output the first chunk of the contiguous buffer. */
554 1.1 itojun {
555 1.1 itojun int n;
556 1.39 uwe int maxchars;
557 1.1 itojun int i;
558 1.1 itojun
559 1.1 itojun n = sc->sc_tbc;
560 1.39 uwe maxchars = sc->sc_fifolen
561 1.39 uwe - ((scif_fdr_read() & SCFDR2_TXCNT) >> 8);
562 1.39 uwe if (n > maxchars)
563 1.39 uwe n = maxchars;
564 1.1 itojun
565 1.1 itojun for (i = 0; i < n; i++) {
566 1.14 msaitoh scif_putc(*(sc->sc_tba));
567 1.1 itojun sc->sc_tba++;
568 1.1 itojun }
569 1.1 itojun sc->sc_tbc -= n;
570 1.1 itojun }
571 1.1 itojun out:
572 1.1 itojun splx(s);
573 1.1 itojun return;
574 1.1 itojun }
575 1.1 itojun
576 1.1 itojun /*
577 1.1 itojun * Set SCIF tty parameters from termios.
578 1.1 itojun * XXX - Should just copy the whole termios after
579 1.1 itojun * making sure all the changes could be done.
580 1.1 itojun */
581 1.1 itojun static int
582 1.20 uch scifparam(struct tty *tp, struct termios *t)
583 1.1 itojun {
584 1.56 uwe struct scif_softc *sc;
585 1.1 itojun int ospeed = t->c_ospeed;
586 1.1 itojun int s;
587 1.1 itojun
588 1.56 uwe sc = device_lookup_private(&scif_cd, SCIFUNIT(tp->t_dev));
589 1.56 uwe if (!device_is_active(sc->sc_dev))
590 1.1 itojun return (EIO);
591 1.1 itojun
592 1.1 itojun /* Check requested parameters. */
593 1.1 itojun if (ospeed < 0)
594 1.1 itojun return (EINVAL);
595 1.1 itojun if (t->c_ispeed && t->c_ispeed != t->c_ospeed)
596 1.1 itojun return (EINVAL);
597 1.1 itojun
598 1.1 itojun /*
599 1.1 itojun * For the console, always force CLOCAL and !HUPCL, so that the port
600 1.1 itojun * is always active.
601 1.1 itojun */
602 1.1 itojun if (ISSET(sc->sc_swflags, TIOCFLAG_SOFTCAR) ||
603 1.1 itojun ISSET(sc->sc_hwflags, SCIF_HW_CONSOLE)) {
604 1.1 itojun SET(t->c_cflag, CLOCAL);
605 1.1 itojun CLR(t->c_cflag, HUPCL);
606 1.1 itojun }
607 1.1 itojun
608 1.1 itojun /*
609 1.1 itojun * If there were no changes, don't do anything. This avoids dropping
610 1.1 itojun * input and improves performance when all we did was frob things like
611 1.1 itojun * VMIN and VTIME.
612 1.1 itojun */
613 1.1 itojun if (tp->t_ospeed == t->c_ospeed &&
614 1.1 itojun tp->t_cflag == t->c_cflag)
615 1.1 itojun return (0);
616 1.1 itojun
617 1.1 itojun #if 0
618 1.1 itojun /* XXX (msaitoh) */
619 1.1 itojun lcr = ISSET(sc->sc_lcr, LCR_SBREAK) | cflag2lcr(t->c_cflag);
620 1.1 itojun #endif
621 1.1 itojun
622 1.1 itojun s = splserial();
623 1.1 itojun
624 1.1 itojun /*
625 1.1 itojun * Set the flow control pins depending on the current flow control
626 1.1 itojun * mode.
627 1.1 itojun */
628 1.1 itojun if (ISSET(t->c_cflag, CRTSCTS)) {
629 1.37 uwe scif_fcr_write(scif_fcr_read() | SCFCR2_MCE);
630 1.1 itojun } else {
631 1.37 uwe scif_fcr_write(scif_fcr_read() & ~SCFCR2_MCE);
632 1.1 itojun }
633 1.1 itojun
634 1.37 uwe scif_brr_write(divrnd(sh_clock_get_pclock(), 32 * ospeed) -1);
635 1.1 itojun
636 1.1 itojun /*
637 1.1 itojun * Set the FIFO threshold based on the receive speed.
638 1.1 itojun *
639 1.1 itojun * * If it's a low speed, it's probably a mouse or some other
640 1.1 itojun * interactive device, so set the threshold low.
641 1.1 itojun * * If it's a high speed, trim the trigger level down to prevent
642 1.1 itojun * overflows.
643 1.1 itojun * * Otherwise set it a bit higher.
644 1.1 itojun */
645 1.1 itojun #if 0
646 1.1 itojun /* XXX (msaitoh) */
647 1.1 itojun if (ISSET(sc->sc_hwflags, SCIF_HW_HAYESP))
648 1.1 itojun sc->sc_fifo = FIFO_DMA_MODE | FIFO_ENABLE | FIFO_TRIGGER_8;
649 1.1 itojun else if (ISSET(sc->sc_hwflags, SCIF_HW_FIFO))
650 1.1 itojun sc->sc_fifo = FIFO_ENABLE |
651 1.1 itojun (t->c_ospeed <= 1200 ? FIFO_TRIGGER_1 :
652 1.1 itojun t->c_ospeed <= 38400 ? FIFO_TRIGGER_8 : FIFO_TRIGGER_4);
653 1.1 itojun else
654 1.1 itojun sc->sc_fifo = 0;
655 1.1 itojun #endif
656 1.1 itojun
657 1.1 itojun /* And copy to tty. */
658 1.1 itojun tp->t_ispeed = 0;
659 1.1 itojun tp->t_ospeed = t->c_ospeed;
660 1.1 itojun tp->t_cflag = t->c_cflag;
661 1.1 itojun
662 1.1 itojun if (!sc->sc_heldchange) {
663 1.1 itojun if (sc->sc_tx_busy) {
664 1.1 itojun sc->sc_heldtbc = sc->sc_tbc;
665 1.1 itojun sc->sc_tbc = 0;
666 1.1 itojun sc->sc_heldchange = 1;
667 1.1 itojun }
668 1.1 itojun #if 0
669 1.1 itojun /* XXX (msaitoh) */
670 1.1 itojun else
671 1.1 itojun scif_loadchannelregs(sc);
672 1.1 itojun #endif
673 1.1 itojun }
674 1.1 itojun
675 1.1 itojun if (!ISSET(t->c_cflag, CHWFLOW)) {
676 1.1 itojun /* Disable the high water mark. */
677 1.1 itojun sc->sc_r_hiwat = 0;
678 1.1 itojun sc->sc_r_lowat = 0;
679 1.1 itojun if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) {
680 1.1 itojun CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED);
681 1.1 itojun scif_schedrx(sc);
682 1.1 itojun }
683 1.1 itojun } else {
684 1.1 itojun sc->sc_r_hiwat = scif_rbuf_hiwat;
685 1.1 itojun sc->sc_r_lowat = scif_rbuf_lowat;
686 1.1 itojun }
687 1.1 itojun
688 1.1 itojun splx(s);
689 1.1 itojun
690 1.1 itojun #ifdef SCIF_DEBUG
691 1.1 itojun if (scif_debug)
692 1.1 itojun scifstatus(sc, "scifparam ");
693 1.1 itojun #endif
694 1.1 itojun
695 1.1 itojun if (!ISSET(t->c_cflag, CHWFLOW)) {
696 1.1 itojun if (sc->sc_tx_stopped) {
697 1.1 itojun sc->sc_tx_stopped = 0;
698 1.1 itojun scifstart(tp);
699 1.1 itojun }
700 1.1 itojun }
701 1.1 itojun
702 1.1 itojun return (0);
703 1.1 itojun }
704 1.1 itojun
705 1.53 uwe static void
706 1.20 uch scif_iflush(struct scif_softc *sc)
707 1.1 itojun {
708 1.1 itojun int i;
709 1.1 itojun
710 1.37 uwe i = scif_fdr_read() & SCFDR2_RECVCNT;
711 1.1 itojun
712 1.1 itojun while (i > 0) {
713 1.62 christos (void)scif_frdr_read();
714 1.37 uwe scif_ssr_write(scif_ssr_read() & ~(SCSSR2_RDF | SCSSR2_DR));
715 1.1 itojun i--;
716 1.1 itojun }
717 1.1 itojun }
718 1.1 itojun
719 1.1 itojun int
720 1.42 christos scifopen(dev_t dev, int flag, int mode, struct lwp *l)
721 1.1 itojun {
722 1.1 itojun struct scif_softc *sc;
723 1.1 itojun struct tty *tp;
724 1.1 itojun int s, s2;
725 1.1 itojun int error;
726 1.1 itojun
727 1.56 uwe sc = device_lookup_private(&scif_cd, SCIFUNIT(dev));
728 1.1 itojun if (sc == 0 || !ISSET(sc->sc_hwflags, SCIF_HW_DEV_OK) ||
729 1.1 itojun sc->sc_rbuf == NULL)
730 1.1 itojun return (ENXIO);
731 1.1 itojun
732 1.56 uwe if (!device_is_active(sc->sc_dev))
733 1.1 itojun return (ENXIO);
734 1.1 itojun
735 1.1 itojun #ifdef KGDB
736 1.1 itojun /*
737 1.1 itojun * If this is the kgdb port, no other use is permitted.
738 1.1 itojun */
739 1.1 itojun if (ISSET(sc->sc_hwflags, SCIF_HW_KGDB))
740 1.1 itojun return (EBUSY);
741 1.22 uch #endif /* KGDB */
742 1.1 itojun
743 1.1 itojun tp = sc->sc_tty;
744 1.1 itojun
745 1.48 elad if (kauth_authorize_device_tty(l->l_cred, KAUTH_DEVICE_TTY_OPEN, tp))
746 1.1 itojun return (EBUSY);
747 1.1 itojun
748 1.1 itojun s = spltty();
749 1.1 itojun
750 1.1 itojun /*
751 1.1 itojun * Do the following iff this is a first open.
752 1.1 itojun */
753 1.1 itojun if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
754 1.1 itojun struct termios t;
755 1.1 itojun
756 1.1 itojun tp->t_dev = dev;
757 1.1 itojun
758 1.1 itojun s2 = splserial();
759 1.1 itojun
760 1.1 itojun /* Turn on interrupts. */
761 1.37 uwe scif_scr_write(scif_scr_read() | SCSCR2_TIE | SCSCR2_RIE);
762 1.1 itojun
763 1.1 itojun splx(s2);
764 1.1 itojun
765 1.1 itojun /*
766 1.1 itojun * Initialize the termios status to the defaults. Add in the
767 1.1 itojun * sticky bits from TIOCSFLAGS.
768 1.1 itojun */
769 1.1 itojun t.c_ispeed = 0;
770 1.1 itojun if (ISSET(sc->sc_hwflags, SCIF_HW_CONSOLE)) {
771 1.7 msaitoh t.c_ospeed = scifcn_speed; /* XXX (msaitoh) */
772 1.1 itojun t.c_cflag = scifconscflag;
773 1.1 itojun } else {
774 1.1 itojun t.c_ospeed = TTYDEF_SPEED;
775 1.1 itojun t.c_cflag = TTYDEF_CFLAG;
776 1.1 itojun }
777 1.1 itojun if (ISSET(sc->sc_swflags, TIOCFLAG_CLOCAL))
778 1.1 itojun SET(t.c_cflag, CLOCAL);
779 1.1 itojun if (ISSET(sc->sc_swflags, TIOCFLAG_CRTSCTS))
780 1.1 itojun SET(t.c_cflag, CRTSCTS);
781 1.1 itojun if (ISSET(sc->sc_swflags, TIOCFLAG_MDMBUF))
782 1.1 itojun SET(t.c_cflag, MDMBUF);
783 1.1 itojun /* Make sure scifparam() will do something. */
784 1.1 itojun tp->t_ospeed = 0;
785 1.1 itojun (void) scifparam(tp, &t);
786 1.1 itojun tp->t_iflag = TTYDEF_IFLAG;
787 1.1 itojun tp->t_oflag = TTYDEF_OFLAG;
788 1.1 itojun tp->t_lflag = TTYDEF_LFLAG;
789 1.1 itojun ttychars(tp);
790 1.1 itojun ttsetwater(tp);
791 1.1 itojun
792 1.1 itojun s2 = splserial();
793 1.1 itojun
794 1.1 itojun /* Clear the input ring, and unblock. */
795 1.1 itojun sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf;
796 1.1 itojun sc->sc_rbavail = scif_rbuf_size;
797 1.1 itojun scif_iflush(sc);
798 1.1 itojun CLR(sc->sc_rx_flags, RX_ANY_BLOCK);
799 1.1 itojun #if 0
800 1.1 itojun /* XXX (msaitoh) */
801 1.1 itojun scif_hwiflow(sc);
802 1.1 itojun #endif
803 1.1 itojun
804 1.1 itojun #ifdef SCIF_DEBUG
805 1.1 itojun if (scif_debug)
806 1.1 itojun scifstatus(sc, "scifopen ");
807 1.1 itojun #endif
808 1.1 itojun
809 1.1 itojun splx(s2);
810 1.1 itojun }
811 1.1 itojun
812 1.1 itojun splx(s);
813 1.1 itojun
814 1.1 itojun error = ttyopen(tp, SCIFDIALOUT(dev), ISSET(flag, O_NONBLOCK));
815 1.1 itojun if (error)
816 1.1 itojun goto bad;
817 1.1 itojun
818 1.13 eeh error = (*tp->t_linesw->l_open)(dev, tp);
819 1.1 itojun if (error)
820 1.1 itojun goto bad;
821 1.1 itojun
822 1.1 itojun return (0);
823 1.1 itojun
824 1.1 itojun bad:
825 1.1 itojun
826 1.1 itojun return (error);
827 1.1 itojun }
828 1.1 itojun
829 1.1 itojun int
830 1.42 christos scifclose(dev_t dev, int flag, int mode, struct lwp *l)
831 1.1 itojun {
832 1.56 uwe struct scif_softc *sc;
833 1.56 uwe struct tty *tp;
834 1.56 uwe
835 1.56 uwe sc = device_lookup_private(&scif_cd, SCIFUNIT(dev));
836 1.56 uwe tp = sc->sc_tty;
837 1.1 itojun
838 1.1 itojun /* XXX This is for cons.c. */
839 1.1 itojun if (!ISSET(tp->t_state, TS_ISOPEN))
840 1.1 itojun return (0);
841 1.1 itojun
842 1.13 eeh (*tp->t_linesw->l_close)(tp, flag);
843 1.1 itojun ttyclose(tp);
844 1.1 itojun
845 1.56 uwe if (!device_is_active(sc->sc_dev))
846 1.1 itojun return (0);
847 1.1 itojun
848 1.1 itojun return (0);
849 1.1 itojun }
850 1.1 itojun
851 1.1 itojun int
852 1.20 uch scifread(dev_t dev, struct uio *uio, int flag)
853 1.1 itojun {
854 1.56 uwe struct scif_softc *sc;
855 1.56 uwe struct tty *tp;
856 1.56 uwe
857 1.56 uwe sc = device_lookup_private(&scif_cd, SCIFUNIT(dev));
858 1.56 uwe tp = sc->sc_tty;
859 1.1 itojun
860 1.13 eeh return ((*tp->t_linesw->l_read)(tp, uio, flag));
861 1.1 itojun }
862 1.1 itojun
863 1.1 itojun int
864 1.20 uch scifwrite(dev_t dev, struct uio *uio, int flag)
865 1.1 itojun {
866 1.56 uwe struct scif_softc *sc;
867 1.56 uwe struct tty *tp;
868 1.56 uwe
869 1.56 uwe sc = device_lookup_private(&scif_cd, SCIFUNIT(dev));
870 1.56 uwe tp = sc->sc_tty;
871 1.1 itojun
872 1.13 eeh return ((*tp->t_linesw->l_write)(tp, uio, flag));
873 1.16 scw }
874 1.16 scw
875 1.16 scw int
876 1.42 christos scifpoll(dev_t dev, int events, struct lwp *l)
877 1.16 scw {
878 1.56 uwe struct scif_softc *sc;
879 1.56 uwe struct tty *tp;
880 1.56 uwe
881 1.56 uwe sc = device_lookup_private(&scif_cd, SCIFUNIT(dev));
882 1.56 uwe tp = sc->sc_tty;
883 1.25 uch
884 1.42 christos return ((*tp->t_linesw->l_poll)(tp, events, l));
885 1.1 itojun }
886 1.1 itojun
887 1.1 itojun struct tty *
888 1.20 uch sciftty(dev_t dev)
889 1.1 itojun {
890 1.56 uwe struct scif_softc *sc;
891 1.56 uwe struct tty *tp;
892 1.56 uwe
893 1.56 uwe sc = device_lookup_private(&scif_cd, SCIFUNIT(dev));
894 1.56 uwe tp = sc->sc_tty;
895 1.1 itojun
896 1.1 itojun return (tp);
897 1.1 itojun }
898 1.1 itojun
899 1.1 itojun int
900 1.50 christos scifioctl(dev_t dev, u_long cmd, void *data, int flag, struct lwp *l)
901 1.1 itojun {
902 1.56 uwe struct scif_softc *sc;
903 1.56 uwe struct tty *tp;
904 1.1 itojun int error;
905 1.1 itojun int s;
906 1.1 itojun
907 1.56 uwe sc = device_lookup_private(&scif_cd, SCIFUNIT(dev));
908 1.56 uwe if (!device_is_active(sc->sc_dev))
909 1.1 itojun return (EIO);
910 1.1 itojun
911 1.56 uwe tp = sc->sc_tty;
912 1.42 christos error = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, l);
913 1.23 atatat if (error != EPASSTHROUGH)
914 1.1 itojun return (error);
915 1.1 itojun
916 1.42 christos error = ttioctl(tp, cmd, data, flag, l);
917 1.23 atatat if (error != EPASSTHROUGH)
918 1.1 itojun return (error);
919 1.1 itojun
920 1.1 itojun error = 0;
921 1.1 itojun
922 1.1 itojun s = splserial();
923 1.1 itojun
924 1.1 itojun switch (cmd) {
925 1.1 itojun case TIOCSBRK:
926 1.1 itojun scif_break(sc, 1);
927 1.1 itojun break;
928 1.1 itojun
929 1.1 itojun case TIOCCBRK:
930 1.1 itojun scif_break(sc, 0);
931 1.1 itojun break;
932 1.6 msaitoh
933 1.1 itojun case TIOCGFLAGS:
934 1.1 itojun *(int *)data = sc->sc_swflags;
935 1.1 itojun break;
936 1.1 itojun
937 1.1 itojun case TIOCSFLAGS:
938 1.49 elad error = kauth_authorize_device_tty(l->l_cred,
939 1.49 elad KAUTH_DEVICE_TTY_PRIVSET, tp);
940 1.1 itojun if (error)
941 1.1 itojun break;
942 1.1 itojun sc->sc_swflags = *(int *)data;
943 1.1 itojun break;
944 1.1 itojun
945 1.1 itojun default:
946 1.23 atatat error = EPASSTHROUGH;
947 1.1 itojun break;
948 1.1 itojun }
949 1.1 itojun
950 1.1 itojun splx(s);
951 1.1 itojun
952 1.1 itojun return (error);
953 1.1 itojun }
954 1.1 itojun
955 1.53 uwe static void
956 1.20 uch scif_schedrx(struct scif_softc *sc)
957 1.1 itojun {
958 1.1 itojun
959 1.1 itojun sc->sc_rx_ready = 1;
960 1.1 itojun
961 1.1 itojun /* Wake up the poller. */
962 1.55 ad softint_schedule(sc->sc_si);
963 1.1 itojun }
964 1.1 itojun
965 1.53 uwe static void
966 1.20 uch scif_break(struct scif_softc *sc, int onoff)
967 1.6 msaitoh {
968 1.6 msaitoh
969 1.6 msaitoh if (onoff)
970 1.37 uwe scif_ssr_write(scif_ssr_read() & ~SCSSR2_TDFE);
971 1.6 msaitoh else
972 1.37 uwe scif_ssr_write(scif_ssr_read() | SCSSR2_TDFE);
973 1.6 msaitoh
974 1.6 msaitoh #if 0 /* XXX */
975 1.6 msaitoh if (!sc->sc_heldchange) {
976 1.6 msaitoh if (sc->sc_tx_busy) {
977 1.6 msaitoh sc->sc_heldtbc = sc->sc_tbc;
978 1.6 msaitoh sc->sc_tbc = 0;
979 1.6 msaitoh sc->sc_heldchange = 1;
980 1.6 msaitoh } else
981 1.6 msaitoh scif_loadchannelregs(sc);
982 1.6 msaitoh }
983 1.6 msaitoh #endif
984 1.6 msaitoh }
985 1.6 msaitoh
986 1.1 itojun /*
987 1.1 itojun * Stop output, e.g., for ^S or output flush.
988 1.1 itojun */
989 1.1 itojun void
990 1.20 uch scifstop(struct tty *tp, int flag)
991 1.1 itojun {
992 1.56 uwe struct scif_softc *sc;
993 1.1 itojun int s;
994 1.1 itojun
995 1.56 uwe sc = device_lookup_private(&scif_cd, SCIFUNIT(tp->t_dev));
996 1.56 uwe
997 1.1 itojun s = splserial();
998 1.1 itojun if (ISSET(tp->t_state, TS_BUSY)) {
999 1.1 itojun /* Stop transmitting at the next chunk. */
1000 1.1 itojun sc->sc_tbc = 0;
1001 1.1 itojun sc->sc_heldtbc = 0;
1002 1.1 itojun if (!ISSET(tp->t_state, TS_TTSTOP))
1003 1.1 itojun SET(tp->t_state, TS_FLUSH);
1004 1.1 itojun }
1005 1.1 itojun splx(s);
1006 1.1 itojun }
1007 1.1 itojun
1008 1.53 uwe static void
1009 1.20 uch scifdiag(void *arg)
1010 1.1 itojun {
1011 1.1 itojun struct scif_softc *sc = arg;
1012 1.1 itojun int overflows, floods;
1013 1.1 itojun int s;
1014 1.1 itojun
1015 1.1 itojun s = splserial();
1016 1.1 itojun overflows = sc->sc_overflows;
1017 1.1 itojun sc->sc_overflows = 0;
1018 1.1 itojun floods = sc->sc_floods;
1019 1.1 itojun sc->sc_floods = 0;
1020 1.1 itojun sc->sc_errors = 0;
1021 1.1 itojun splx(s);
1022 1.1 itojun
1023 1.1 itojun log(LOG_WARNING, "%s: %d silo overflow%s, %d ibuf flood%s\n",
1024 1.56 uwe device_xname(sc->sc_dev),
1025 1.1 itojun overflows, overflows == 1 ? "" : "s",
1026 1.1 itojun floods, floods == 1 ? "" : "s");
1027 1.1 itojun }
1028 1.1 itojun
1029 1.53 uwe static void
1030 1.20 uch scif_rxsoft(struct scif_softc *sc, struct tty *tp)
1031 1.1 itojun {
1032 1.39 uwe int (*rint)(int, struct tty *) = tp->t_linesw->l_rint;
1033 1.1 itojun u_char *get, *end;
1034 1.1 itojun u_int cc, scc;
1035 1.1 itojun u_char ssr2;
1036 1.1 itojun int code;
1037 1.1 itojun int s;
1038 1.1 itojun
1039 1.1 itojun end = sc->sc_ebuf;
1040 1.1 itojun get = sc->sc_rbget;
1041 1.1 itojun scc = cc = scif_rbuf_size - sc->sc_rbavail;
1042 1.1 itojun
1043 1.1 itojun if (cc == scif_rbuf_size) {
1044 1.1 itojun sc->sc_floods++;
1045 1.1 itojun if (sc->sc_errors++ == 0)
1046 1.11 msaitoh callout_reset(&sc->sc_diag_ch, 60 * hz, scifdiag, sc);
1047 1.1 itojun }
1048 1.1 itojun
1049 1.1 itojun while (cc) {
1050 1.1 itojun code = get[0];
1051 1.1 itojun ssr2 = get[1];
1052 1.6 msaitoh if (ISSET(ssr2, SCSSR2_BRK | SCSSR2_FER | SCSSR2_PER)) {
1053 1.6 msaitoh if (ISSET(ssr2, SCSSR2_BRK | SCSSR2_FER))
1054 1.1 itojun SET(code, TTY_FE);
1055 1.1 itojun if (ISSET(ssr2, SCSSR2_PER))
1056 1.1 itojun SET(code, TTY_PE);
1057 1.1 itojun }
1058 1.1 itojun if ((*rint)(code, tp) == -1) {
1059 1.1 itojun /*
1060 1.1 itojun * The line discipline's buffer is out of space.
1061 1.1 itojun */
1062 1.1 itojun if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) {
1063 1.1 itojun /*
1064 1.1 itojun * We're either not using flow control, or the
1065 1.1 itojun * line discipline didn't tell us to block for
1066 1.1 itojun * some reason. Either way, we have no way to
1067 1.1 itojun * know when there's more space available, so
1068 1.1 itojun * just drop the rest of the data.
1069 1.1 itojun */
1070 1.1 itojun get += cc << 1;
1071 1.1 itojun if (get >= end)
1072 1.1 itojun get -= scif_rbuf_size << 1;
1073 1.1 itojun cc = 0;
1074 1.1 itojun } else {
1075 1.1 itojun /*
1076 1.1 itojun * Don't schedule any more receive processing
1077 1.1 itojun * until the line discipline tells us there's
1078 1.1 itojun * space available (through scifhwiflow()).
1079 1.1 itojun * Leave the rest of the data in the input
1080 1.1 itojun * buffer.
1081 1.1 itojun */
1082 1.1 itojun SET(sc->sc_rx_flags, RX_TTY_OVERFLOWED);
1083 1.1 itojun }
1084 1.1 itojun break;
1085 1.1 itojun }
1086 1.1 itojun get += 2;
1087 1.1 itojun if (get >= end)
1088 1.1 itojun get = sc->sc_rbuf;
1089 1.1 itojun cc--;
1090 1.1 itojun }
1091 1.1 itojun
1092 1.1 itojun if (cc != scc) {
1093 1.1 itojun sc->sc_rbget = get;
1094 1.1 itojun s = splserial();
1095 1.1 itojun cc = sc->sc_rbavail += scc - cc;
1096 1.1 itojun /* Buffers should be ok again, release possible block. */
1097 1.1 itojun if (cc >= sc->sc_r_lowat) {
1098 1.1 itojun if (ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) {
1099 1.1 itojun CLR(sc->sc_rx_flags, RX_IBUF_OVERFLOWED);
1100 1.37 uwe scif_scr_write(scif_scr_read() | SCSCR2_RIE);
1101 1.1 itojun }
1102 1.1 itojun #if 0
1103 1.1 itojun if (ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED)) {
1104 1.1 itojun CLR(sc->sc_rx_flags, RX_IBUF_BLOCKED);
1105 1.1 itojun scif_hwiflow(sc);
1106 1.1 itojun }
1107 1.1 itojun #endif
1108 1.1 itojun }
1109 1.1 itojun splx(s);
1110 1.1 itojun }
1111 1.1 itojun }
1112 1.1 itojun
1113 1.53 uwe static void
1114 1.20 uch scif_txsoft(struct scif_softc *sc, struct tty *tp)
1115 1.1 itojun {
1116 1.1 itojun
1117 1.1 itojun CLR(tp->t_state, TS_BUSY);
1118 1.1 itojun if (ISSET(tp->t_state, TS_FLUSH))
1119 1.1 itojun CLR(tp->t_state, TS_FLUSH);
1120 1.1 itojun else
1121 1.1 itojun ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf));
1122 1.13 eeh (*tp->t_linesw->l_start)(tp);
1123 1.1 itojun }
1124 1.1 itojun
1125 1.53 uwe #if 0 /* XXX (msaitoh) */
1126 1.53 uwe static void
1127 1.20 uch scif_stsoft(struct scif_softc *sc, struct tty *tp)
1128 1.1 itojun {
1129 1.1 itojun u_char msr, delta;
1130 1.1 itojun int s;
1131 1.1 itojun
1132 1.1 itojun s = splserial();
1133 1.1 itojun msr = sc->sc_msr;
1134 1.1 itojun delta = sc->sc_msr_delta;
1135 1.1 itojun sc->sc_msr_delta = 0;
1136 1.1 itojun splx(s);
1137 1.1 itojun
1138 1.1 itojun if (ISSET(delta, sc->sc_msr_dcd)) {
1139 1.1 itojun /*
1140 1.1 itojun * Inform the tty layer that carrier detect changed.
1141 1.1 itojun */
1142 1.13 eeh (void) (*tp->t_linesw->l_modem)(tp, ISSET(msr, MSR_DCD));
1143 1.1 itojun }
1144 1.1 itojun
1145 1.1 itojun if (ISSET(delta, sc->sc_msr_cts)) {
1146 1.1 itojun /* Block or unblock output according to flow control. */
1147 1.1 itojun if (ISSET(msr, sc->sc_msr_cts)) {
1148 1.1 itojun sc->sc_tx_stopped = 0;
1149 1.13 eeh (*tp->t_linesw->l_start)(tp);
1150 1.1 itojun } else {
1151 1.1 itojun sc->sc_tx_stopped = 1;
1152 1.1 itojun }
1153 1.1 itojun }
1154 1.1 itojun
1155 1.1 itojun #ifdef SCIF_DEBUG
1156 1.1 itojun if (scif_debug)
1157 1.1 itojun scifstatus(sc, "scif_stsoft");
1158 1.1 itojun #endif
1159 1.1 itojun }
1160 1.53 uwe #endif /* 0 */
1161 1.1 itojun
1162 1.53 uwe static void
1163 1.20 uch scifsoft(void *arg)
1164 1.1 itojun {
1165 1.1 itojun struct scif_softc *sc = arg;
1166 1.1 itojun struct tty *tp;
1167 1.1 itojun
1168 1.56 uwe if (!device_is_active(sc->sc_dev))
1169 1.1 itojun return;
1170 1.1 itojun
1171 1.51 ad tp = sc->sc_tty;
1172 1.1 itojun
1173 1.51 ad if (sc->sc_rx_ready) {
1174 1.51 ad sc->sc_rx_ready = 0;
1175 1.51 ad scif_rxsoft(sc, tp);
1176 1.51 ad }
1177 1.1 itojun
1178 1.1 itojun #if 0
1179 1.51 ad if (sc->sc_st_check) {
1180 1.51 ad sc->sc_st_check = 0;
1181 1.51 ad scif_stsoft(sc, tp);
1182 1.51 ad }
1183 1.1 itojun #endif
1184 1.1 itojun
1185 1.51 ad if (sc->sc_tx_done) {
1186 1.51 ad sc->sc_tx_done = 0;
1187 1.51 ad scif_txsoft(sc, tp);
1188 1.1 itojun }
1189 1.1 itojun }
1190 1.1 itojun
1191 1.53 uwe static int
1192 1.20 uch scifintr(void *arg)
1193 1.1 itojun {
1194 1.1 itojun struct scif_softc *sc = arg;
1195 1.1 itojun u_char *put, *end;
1196 1.1 itojun u_int cc;
1197 1.1 itojun u_short ssr2;
1198 1.1 itojun int count;
1199 1.1 itojun
1200 1.56 uwe if (!device_is_active(sc->sc_dev))
1201 1.1 itojun return (0);
1202 1.1 itojun
1203 1.1 itojun end = sc->sc_ebuf;
1204 1.1 itojun put = sc->sc_rbput;
1205 1.1 itojun cc = sc->sc_rbavail;
1206 1.1 itojun
1207 1.26 msaitoh do {
1208 1.37 uwe ssr2 = scif_ssr_read();
1209 1.26 msaitoh if (ISSET(ssr2, SCSSR2_BRK)) {
1210 1.37 uwe scif_ssr_write(scif_ssr_read()
1211 1.37 uwe & ~(SCSSR2_ER | SCSSR2_BRK | SCSSR2_DR));
1212 1.1 itojun #ifdef DDB
1213 1.26 msaitoh if (ISSET(sc->sc_hwflags, SCIF_HW_CONSOLE)) {
1214 1.26 msaitoh console_debugger();
1215 1.26 msaitoh }
1216 1.22 uch #endif /* DDB */
1217 1.1 itojun #ifdef KGDB
1218 1.26 msaitoh if (ISSET(sc->sc_hwflags, SCIF_HW_KGDB)) {
1219 1.26 msaitoh kgdb_connect(1);
1220 1.26 msaitoh }
1221 1.22 uch #endif /* KGDB */
1222 1.1 itojun }
1223 1.37 uwe count = scif_fdr_read() & SCFDR2_RECVCNT;
1224 1.26 msaitoh if (count != 0) {
1225 1.36 uwe for (;;) {
1226 1.37 uwe u_char c = scif_frdr_read();
1227 1.37 uwe u_char err = (u_char)(scif_ssr_read() & 0x00ff);
1228 1.1 itojun
1229 1.37 uwe scif_ssr_write(scif_ssr_read()
1230 1.37 uwe & ~(SCSSR2_ER | SCSSR2_RDF | SCSSR2_DR));
1231 1.26 msaitoh #ifdef SH4
1232 1.26 msaitoh if (CPU_IS_SH4)
1233 1.37 uwe scif_lsr_write(scif_lsr_read()
1234 1.37 uwe & ~SCLSR2_ORER);
1235 1.26 msaitoh #endif
1236 1.26 msaitoh if ((cc > 0) && (count > 0)) {
1237 1.26 msaitoh put[0] = c;
1238 1.26 msaitoh put[1] = err;
1239 1.26 msaitoh put += 2;
1240 1.26 msaitoh if (put >= end)
1241 1.26 msaitoh put = sc->sc_rbuf;
1242 1.26 msaitoh cc--;
1243 1.26 msaitoh count--;
1244 1.26 msaitoh } else
1245 1.26 msaitoh break;
1246 1.26 msaitoh }
1247 1.26 msaitoh
1248 1.26 msaitoh /*
1249 1.26 msaitoh * Current string of incoming characters ended because
1250 1.26 msaitoh * no more data was available or we ran out of space.
1251 1.26 msaitoh * Schedule a receive event if any data was received.
1252 1.26 msaitoh * If we're out of space, turn off receive interrupts.
1253 1.26 msaitoh */
1254 1.26 msaitoh sc->sc_rbput = put;
1255 1.26 msaitoh sc->sc_rbavail = cc;
1256 1.26 msaitoh if (!ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED))
1257 1.26 msaitoh sc->sc_rx_ready = 1;
1258 1.1 itojun
1259 1.26 msaitoh /*
1260 1.26 msaitoh * See if we are in danger of overflowing a buffer. If
1261 1.26 msaitoh * so, use hardware flow control to ease the pressure.
1262 1.26 msaitoh */
1263 1.26 msaitoh if (!ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED) &&
1264 1.26 msaitoh cc < sc->sc_r_hiwat) {
1265 1.26 msaitoh SET(sc->sc_rx_flags, RX_IBUF_BLOCKED);
1266 1.1 itojun #if 0
1267 1.26 msaitoh scif_hwiflow(sc);
1268 1.1 itojun #endif
1269 1.26 msaitoh }
1270 1.1 itojun
1271 1.26 msaitoh /*
1272 1.26 msaitoh * If we're out of space, disable receive interrupts
1273 1.26 msaitoh * until the queue has drained a bit.
1274 1.26 msaitoh */
1275 1.26 msaitoh if (!cc) {
1276 1.26 msaitoh SET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED);
1277 1.37 uwe scif_scr_write(scif_scr_read() & ~SCSCR2_RIE);
1278 1.26 msaitoh }
1279 1.26 msaitoh } else {
1280 1.37 uwe if (scif_ssr_read() & (SCSSR2_RDF | SCSSR2_DR)) {
1281 1.37 uwe scif_scr_write(scif_scr_read()
1282 1.37 uwe & ~(SCSCR2_TIE | SCSCR2_RIE));
1283 1.26 msaitoh delay(10);
1284 1.37 uwe scif_scr_write(scif_scr_read()
1285 1.37 uwe | SCSCR2_TIE | SCSCR2_RIE);
1286 1.26 msaitoh continue;
1287 1.26 msaitoh }
1288 1.7 msaitoh }
1289 1.37 uwe } while (scif_ssr_read() & (SCSSR2_RDF | SCSSR2_DR));
1290 1.1 itojun
1291 1.1 itojun #if 0
1292 1.7 msaitoh msr = bus_space_read_1(iot, ioh, scif_msr);
1293 1.7 msaitoh delta = msr ^ sc->sc_msr;
1294 1.7 msaitoh sc->sc_msr = msr;
1295 1.7 msaitoh if (ISSET(delta, sc->sc_msr_mask)) {
1296 1.7 msaitoh SET(sc->sc_msr_delta, delta);
1297 1.1 itojun
1298 1.7 msaitoh /*
1299 1.7 msaitoh * Pulse-per-second clock signal on edge of DCD?
1300 1.7 msaitoh */
1301 1.7 msaitoh if (ISSET(delta, sc->sc_ppsmask)) {
1302 1.7 msaitoh struct timeval tv;
1303 1.7 msaitoh if (ISSET(msr, sc->sc_ppsmask) ==
1304 1.7 msaitoh sc->sc_ppsassert) {
1305 1.7 msaitoh /* XXX nanotime() */
1306 1.7 msaitoh microtime(&tv);
1307 1.7 msaitoh TIMEVAL_TO_TIMESPEC(&tv,
1308 1.7 msaitoh &sc->ppsinfo.assert_timestamp);
1309 1.7 msaitoh if (sc->ppsparam.mode & PPS_OFFSETASSERT) {
1310 1.7 msaitoh timespecadd(&sc->ppsinfo.assert_timestamp,
1311 1.1 itojun &sc->ppsparam.assert_offset,
1312 1.1 itojun &sc->ppsinfo.assert_timestamp);
1313 1.7 msaitoh TIMESPEC_TO_TIMEVAL(&tv, &sc->ppsinfo.assert_timestamp);
1314 1.7 msaitoh }
1315 1.1 itojun
1316 1.1 itojun #ifdef PPS_SYNC
1317 1.7 msaitoh if (sc->ppsparam.mode & PPS_HARDPPSONASSERT)
1318 1.7 msaitoh hardpps(&tv, tv.tv_usec);
1319 1.1 itojun #endif
1320 1.7 msaitoh sc->ppsinfo.assert_sequence++;
1321 1.7 msaitoh sc->ppsinfo.current_mode =
1322 1.7 msaitoh sc->ppsparam.mode;
1323 1.7 msaitoh
1324 1.7 msaitoh } else if (ISSET(msr, sc->sc_ppsmask) ==
1325 1.7 msaitoh sc->sc_ppsclear) {
1326 1.7 msaitoh /* XXX nanotime() */
1327 1.7 msaitoh microtime(&tv);
1328 1.7 msaitoh TIMEVAL_TO_TIMESPEC(&tv,
1329 1.7 msaitoh &sc->ppsinfo.clear_timestamp);
1330 1.7 msaitoh if (sc->ppsparam.mode & PPS_OFFSETCLEAR) {
1331 1.7 msaitoh timespecadd(&sc->ppsinfo.clear_timestamp,
1332 1.1 itojun &sc->ppsparam.clear_offset,
1333 1.1 itojun &sc->ppsinfo.clear_timestamp);
1334 1.7 msaitoh TIMESPEC_TO_TIMEVAL(&tv, &sc->ppsinfo.clear_timestamp);
1335 1.7 msaitoh }
1336 1.1 itojun
1337 1.1 itojun #ifdef PPS_SYNC
1338 1.7 msaitoh if (sc->ppsparam.mode & PPS_HARDPPSONCLEAR)
1339 1.7 msaitoh hardpps(&tv, tv.tv_usec);
1340 1.1 itojun #endif
1341 1.7 msaitoh sc->ppsinfo.clear_sequence++;
1342 1.7 msaitoh sc->ppsinfo.current_mode =
1343 1.7 msaitoh sc->ppsparam.mode;
1344 1.1 itojun }
1345 1.7 msaitoh }
1346 1.1 itojun
1347 1.7 msaitoh /*
1348 1.7 msaitoh * Stop output immediately if we lose the output
1349 1.7 msaitoh * flow control signal or carrier detect.
1350 1.7 msaitoh */
1351 1.7 msaitoh if (ISSET(~msr, sc->sc_msr_mask)) {
1352 1.7 msaitoh sc->sc_tbc = 0;
1353 1.7 msaitoh sc->sc_heldtbc = 0;
1354 1.1 itojun #ifdef SCIF_DEBUG
1355 1.7 msaitoh if (scif_debug)
1356 1.7 msaitoh scifstatus(sc, "scifintr ");
1357 1.1 itojun #endif
1358 1.7 msaitoh }
1359 1.1 itojun
1360 1.7 msaitoh sc->sc_st_check = 1;
1361 1.7 msaitoh }
1362 1.1 itojun #endif
1363 1.1 itojun
1364 1.1 itojun /*
1365 1.1 itojun * Done handling any receive interrupts. See if data can be
1366 1.1 itojun * transmitted as well. Schedule tx done event if no data left
1367 1.1 itojun * and tty was marked busy.
1368 1.1 itojun */
1369 1.37 uwe if (((scif_fdr_read() & SCFDR2_TXCNT) >> 8) != 16) { /* XXX (msaitoh) */
1370 1.1 itojun /*
1371 1.1 itojun * If we've delayed a parameter change, do it now, and restart
1372 1.1 itojun * output.
1373 1.1 itojun */
1374 1.1 itojun if (sc->sc_heldchange) {
1375 1.1 itojun sc->sc_heldchange = 0;
1376 1.1 itojun sc->sc_tbc = sc->sc_heldtbc;
1377 1.1 itojun sc->sc_heldtbc = 0;
1378 1.1 itojun }
1379 1.1 itojun
1380 1.1 itojun /* Output the next chunk of the contiguous buffer, if any. */
1381 1.1 itojun if (sc->sc_tbc > 0) {
1382 1.1 itojun int n;
1383 1.39 uwe int maxchars;
1384 1.1 itojun int i;
1385 1.1 itojun
1386 1.1 itojun n = sc->sc_tbc;
1387 1.39 uwe maxchars = sc->sc_fifolen -
1388 1.37 uwe ((scif_fdr_read() & SCFDR2_TXCNT) >> 8);
1389 1.39 uwe if (n > maxchars)
1390 1.39 uwe n = maxchars;
1391 1.1 itojun
1392 1.1 itojun for (i = 0; i < n; i++) {
1393 1.14 msaitoh scif_putc(*(sc->sc_tba));
1394 1.1 itojun sc->sc_tba++;
1395 1.1 itojun }
1396 1.1 itojun sc->sc_tbc -= n;
1397 1.1 itojun } else {
1398 1.1 itojun /* Disable transmit completion interrupts if necessary. */
1399 1.1 itojun #if 0
1400 1.1 itojun if (ISSET(sc->sc_ier, IER_ETXRDY))
1401 1.1 itojun #endif
1402 1.37 uwe scif_scr_write(scif_scr_read() & ~SCSCR2_TIE);
1403 1.1 itojun
1404 1.1 itojun if (sc->sc_tx_busy) {
1405 1.1 itojun sc->sc_tx_busy = 0;
1406 1.1 itojun sc->sc_tx_done = 1;
1407 1.1 itojun }
1408 1.1 itojun }
1409 1.1 itojun }
1410 1.1 itojun
1411 1.1 itojun /* Wake up the poller. */
1412 1.55 ad softint_schedule(sc->sc_si);
1413 1.1 itojun
1414 1.61 tls #ifdef RND_SCIF
1415 1.36 uwe rnd_add_uint32(&sc->rnd_source, iir | lsr);
1416 1.1 itojun #endif
1417 1.1 itojun
1418 1.1 itojun return (1);
1419 1.1 itojun }
1420 1.1 itojun
1421 1.1 itojun void
1422 1.20 uch scifcnprobe(struct consdev *cp)
1423 1.1 itojun {
1424 1.1 itojun int maj;
1425 1.1 itojun
1426 1.1 itojun /* locate the major number */
1427 1.28 gehenna maj = cdevsw_lookup_major(&scif_cdevsw);
1428 1.1 itojun
1429 1.1 itojun /* Initialize required fields. */
1430 1.1 itojun cp->cn_dev = makedev(maj, 0);
1431 1.66 tsutsui if (scifconsole)
1432 1.66 tsutsui cp->cn_pri = CN_REMOTE;
1433 1.66 tsutsui else
1434 1.66 tsutsui cp->cn_pri = CN_NORMAL;
1435 1.1 itojun }
1436 1.1 itojun
1437 1.1 itojun void
1438 1.20 uch scifcninit(struct consdev *cp)
1439 1.1 itojun {
1440 1.1 itojun
1441 1.7 msaitoh InitializeScif(scifcn_speed);
1442 1.9 msaitoh scifisconsole = 1;
1443 1.1 itojun }
1444 1.1 itojun
1445 1.1 itojun int
1446 1.20 uch scifcngetc(dev_t dev)
1447 1.1 itojun {
1448 1.1 itojun int c;
1449 1.1 itojun int s;
1450 1.1 itojun
1451 1.1 itojun s = splserial();
1452 1.1 itojun c = scif_getc();
1453 1.1 itojun splx(s);
1454 1.1 itojun
1455 1.1 itojun return (c);
1456 1.1 itojun }
1457 1.1 itojun
1458 1.1 itojun void
1459 1.20 uch scifcnputc(dev_t dev, int c)
1460 1.1 itojun {
1461 1.1 itojun int s;
1462 1.1 itojun
1463 1.1 itojun s = splserial();
1464 1.14 msaitoh scif_putc((u_char)c);
1465 1.1 itojun splx(s);
1466 1.1 itojun }
1467 1.22 uch
1468 1.22 uch #ifdef KGDB
1469 1.22 uch int
1470 1.58 cegger scif_kgdb_init(void)
1471 1.22 uch {
1472 1.22 uch
1473 1.22 uch if (strcmp(kgdb_devname, "scif") != 0)
1474 1.22 uch return (1);
1475 1.22 uch
1476 1.22 uch if (scifisconsole)
1477 1.22 uch return (1); /* can't share with console */
1478 1.22 uch
1479 1.22 uch InitializeScif(kgdb_rate);
1480 1.22 uch
1481 1.22 uch kgdb_attach((int (*)(void *))scifcngetc,
1482 1.22 uch (void (*)(void *, int))scifcnputc, NULL);
1483 1.22 uch kgdb_dev = 123; /* unneeded, only to satisfy some tests */
1484 1.22 uch kgdb_attached = 1;
1485 1.25 uch
1486 1.22 uch return (0);
1487 1.22 uch }
1488 1.22 uch #endif /* KGDB */
1489