scif.c revision 1.69 1 1.69 andvar /* $NetBSD: scif.c,v 1.69 2023/09/15 20:59:56 andvar Exp $ */
2 1.1 itojun
3 1.1 itojun /*-
4 1.1 itojun * Copyright (C) 1999 T.Horiuchi and SAITOH Masanobu. All rights reserved.
5 1.1 itojun *
6 1.1 itojun * Redistribution and use in source and binary forms, with or without
7 1.1 itojun * modification, are permitted provided that the following conditions
8 1.1 itojun * are met:
9 1.1 itojun * 1. Redistributions of source code must retain the above copyright
10 1.1 itojun * notice, this list of conditions and the following disclaimer.
11 1.1 itojun * 2. Redistributions in binary form must reproduce the above copyright
12 1.1 itojun * notice, this list of conditions and the following disclaimer in the
13 1.1 itojun * documentation and/or other materials provided with the distribution.
14 1.1 itojun * 3. The name of the author may not be used to endorse or promote products
15 1.1 itojun * derived from this software without specific prior written permission.
16 1.1 itojun *
17 1.1 itojun * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 1.1 itojun * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 1.1 itojun * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 1.1 itojun * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 1.1 itojun * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 1.1 itojun * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 1.1 itojun * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 1.1 itojun * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 1.1 itojun * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 1.1 itojun * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 1.1 itojun */
28 1.1 itojun
29 1.2 msaitoh /*-
30 1.2 msaitoh * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc.
31 1.2 msaitoh * All rights reserved.
32 1.2 msaitoh *
33 1.2 msaitoh * This code is derived from software contributed to The NetBSD Foundation
34 1.2 msaitoh * by Charles M. Hannum.
35 1.2 msaitoh *
36 1.2 msaitoh * Redistribution and use in source and binary forms, with or without
37 1.2 msaitoh * modification, are permitted provided that the following conditions
38 1.2 msaitoh * are met:
39 1.2 msaitoh * 1. Redistributions of source code must retain the above copyright
40 1.2 msaitoh * notice, this list of conditions and the following disclaimer.
41 1.2 msaitoh * 2. Redistributions in binary form must reproduce the above copyright
42 1.2 msaitoh * notice, this list of conditions and the following disclaimer in the
43 1.2 msaitoh * documentation and/or other materials provided with the distribution.
44 1.2 msaitoh *
45 1.2 msaitoh * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
46 1.2 msaitoh * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
47 1.2 msaitoh * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
48 1.2 msaitoh * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
49 1.2 msaitoh * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
50 1.2 msaitoh * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
51 1.2 msaitoh * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
52 1.2 msaitoh * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
53 1.2 msaitoh * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
54 1.2 msaitoh * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
55 1.2 msaitoh * POSSIBILITY OF SUCH DAMAGE.
56 1.2 msaitoh */
57 1.2 msaitoh
58 1.2 msaitoh /*
59 1.2 msaitoh * Copyright (c) 1991 The Regents of the University of California.
60 1.2 msaitoh * All rights reserved.
61 1.2 msaitoh *
62 1.2 msaitoh * Redistribution and use in source and binary forms, with or without
63 1.2 msaitoh * modification, are permitted provided that the following conditions
64 1.2 msaitoh * are met:
65 1.2 msaitoh * 1. Redistributions of source code must retain the above copyright
66 1.2 msaitoh * notice, this list of conditions and the following disclaimer.
67 1.2 msaitoh * 2. Redistributions in binary form must reproduce the above copyright
68 1.2 msaitoh * notice, this list of conditions and the following disclaimer in the
69 1.2 msaitoh * documentation and/or other materials provided with the distribution.
70 1.35 agc * 3. Neither the name of the University nor the names of its contributors
71 1.2 msaitoh * may be used to endorse or promote products derived from this software
72 1.2 msaitoh * without specific prior written permission.
73 1.2 msaitoh *
74 1.2 msaitoh * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
75 1.2 msaitoh * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
76 1.2 msaitoh * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
77 1.2 msaitoh * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
78 1.2 msaitoh * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
79 1.2 msaitoh * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
80 1.2 msaitoh * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
81 1.2 msaitoh * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
82 1.2 msaitoh * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
83 1.2 msaitoh * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
84 1.2 msaitoh * SUCH DAMAGE.
85 1.2 msaitoh *
86 1.2 msaitoh * @(#)com.c 7.5 (Berkeley) 5/16/91
87 1.2 msaitoh */
88 1.2 msaitoh
89 1.2 msaitoh /*
90 1.2 msaitoh * SH internal serial driver
91 1.2 msaitoh *
92 1.2 msaitoh * This code is derived from both z8530tty.c and com.c
93 1.2 msaitoh */
94 1.34 lukem
95 1.34 lukem #include <sys/cdefs.h>
96 1.69 andvar __KERNEL_RCSID(0, "$NetBSD: scif.c,v 1.69 2023/09/15 20:59:56 andvar Exp $");
97 1.2 msaitoh
98 1.17 lukem #include "opt_kgdb.h"
99 1.1 itojun #include "opt_scif.h"
100 1.1 itojun
101 1.1 itojun #include <sys/param.h>
102 1.1 itojun #include <sys/systm.h>
103 1.1 itojun #include <sys/tty.h>
104 1.1 itojun #include <sys/proc.h>
105 1.1 itojun #include <sys/conf.h>
106 1.1 itojun #include <sys/file.h>
107 1.1 itojun #include <sys/syslog.h>
108 1.1 itojun #include <sys/kernel.h>
109 1.1 itojun #include <sys/device.h>
110 1.68 thorpej #include <sys/kmem.h>
111 1.22 uch #include <sys/kgdb.h>
112 1.46 elad #include <sys/kauth.h>
113 1.55 ad #include <sys/intr.h>
114 1.1 itojun
115 1.1 itojun #include <dev/cons.h>
116 1.1 itojun
117 1.21 uch #include <sh3/clock.h>
118 1.24 uch #include <sh3/exception.h>
119 1.1 itojun #include <sh3/scifreg.h>
120 1.24 uch
121 1.22 uch #include <sh3/dev/scifvar.h>
122 1.1 itojun
123 1.24 uch #include "locators.h"
124 1.1 itojun
125 1.1 itojun
126 1.1 itojun struct scif_softc {
127 1.56 uwe device_t sc_dev;
128 1.53 uwe
129 1.1 itojun struct tty *sc_tty;
130 1.24 uch void *sc_si;
131 1.1 itojun
132 1.51 ad callout_t sc_diag_ch;
133 1.8 thorpej
134 1.1 itojun #if 0
135 1.1 itojun bus_space_tag_t sc_iot; /* ISA i/o space identifier */
136 1.1 itojun bus_space_handle_t sc_ioh; /* ISA io handle */
137 1.1 itojun
138 1.1 itojun int sc_drq;
139 1.1 itojun
140 1.1 itojun int sc_frequency;
141 1.1 itojun #endif
142 1.1 itojun
143 1.1 itojun u_int sc_overflows,
144 1.1 itojun sc_floods,
145 1.1 itojun sc_errors; /* number of retries so far */
146 1.1 itojun u_char sc_status[7]; /* copy of registers */
147 1.1 itojun
148 1.1 itojun int sc_hwflags;
149 1.1 itojun int sc_swflags;
150 1.1 itojun u_int sc_fifolen;
151 1.1 itojun
152 1.1 itojun u_int sc_r_hiwat,
153 1.1 itojun sc_r_lowat;
154 1.1 itojun u_char *volatile sc_rbget,
155 1.1 itojun *volatile sc_rbput;
156 1.1 itojun volatile u_int sc_rbavail;
157 1.1 itojun u_char *sc_rbuf,
158 1.1 itojun *sc_ebuf;
159 1.1 itojun
160 1.1 itojun u_char *sc_tba; /* transmit buffer address */
161 1.1 itojun u_int sc_tbc, /* transmit byte count */
162 1.1 itojun sc_heldtbc;
163 1.1 itojun
164 1.1 itojun volatile u_char sc_rx_flags,
165 1.1 itojun #define RX_TTY_BLOCKED 0x01
166 1.1 itojun #define RX_TTY_OVERFLOWED 0x02
167 1.1 itojun #define RX_IBUF_BLOCKED 0x04
168 1.1 itojun #define RX_IBUF_OVERFLOWED 0x08
169 1.1 itojun #define RX_ANY_BLOCK 0x0f
170 1.3 msaitoh sc_tx_busy, /* working on an output chunk */
171 1.3 msaitoh sc_tx_done, /* done with one output chunk */
172 1.2 msaitoh sc_tx_stopped, /* H/W level stop (lost CTS) */
173 1.2 msaitoh sc_st_check, /* got a status interrupt */
174 1.1 itojun sc_rx_ready;
175 1.1 itojun
176 1.1 itojun volatile u_char sc_heldchange;
177 1.1 itojun };
178 1.1 itojun
179 1.69 andvar #ifdef SCIF_DEBUG
180 1.69 andvar #define DPRINTF_ENABLE
181 1.69 andvar #define DPRINTF_DEBUG scif_debug
182 1.69 andvar #endif
183 1.69 andvar #include <machine/debug.h>
184 1.1 itojun
185 1.56 uwe static int scif_match(device_t, cfdata_t, void *);
186 1.53 uwe static void scif_attach(device_t, device_t, void *);
187 1.53 uwe
188 1.56 uwe CFATTACH_DECL_NEW(scif, sizeof(struct scif_softc),
189 1.53 uwe scif_match, scif_attach, NULL, NULL);
190 1.53 uwe
191 1.53 uwe static int scif_attached = 0; /* XXX: FIXME: don't limit to just one! */
192 1.53 uwe
193 1.53 uwe extern struct cfdriver scif_cd;
194 1.1 itojun
195 1.65 christos #define SCIFUNIT(x) TTUNIT(x)
196 1.65 christos #define SCIFDIALOUT(x) TTDIALOUT(x)
197 1.1 itojun
198 1.53 uwe
199 1.53 uwe /* console */
200 1.53 uwe dev_type_cnprobe(scifcnprobe);
201 1.53 uwe dev_type_cninit(scifcninit);
202 1.53 uwe dev_type_cngetc(scifcngetc);
203 1.53 uwe dev_type_cnputc(scifcnputc);
204 1.53 uwe
205 1.53 uwe
206 1.53 uwe /* cdevsw */
207 1.53 uwe dev_type_open(scifopen);
208 1.53 uwe dev_type_close(scifclose);
209 1.53 uwe dev_type_read(scifread);
210 1.53 uwe dev_type_write(scifwrite);
211 1.53 uwe dev_type_ioctl(scifioctl);
212 1.53 uwe dev_type_stop(scifstop);
213 1.53 uwe dev_type_tty(sciftty);
214 1.53 uwe dev_type_poll(scifpoll);
215 1.53 uwe
216 1.53 uwe const struct cdevsw scif_cdevsw = {
217 1.63 dholland .d_open = scifopen,
218 1.63 dholland .d_close = scifclose,
219 1.63 dholland .d_read = scifread,
220 1.63 dholland .d_write = scifwrite,
221 1.63 dholland .d_ioctl = scifioctl,
222 1.63 dholland .d_stop = scifstop,
223 1.63 dholland .d_tty = sciftty,
224 1.63 dholland .d_poll = scifpoll,
225 1.63 dholland .d_mmap = nommap,
226 1.63 dholland .d_kqfilter = ttykqfilter,
227 1.64 dholland .d_discard = nodiscard,
228 1.63 dholland .d_flag = D_TTY
229 1.53 uwe };
230 1.53 uwe
231 1.66 tsutsui #ifndef SCIFCONSOLE
232 1.66 tsutsui #define SCIFCONSOLE 0
233 1.66 tsutsui #endif
234 1.66 tsutsui int scifconsole = SCIFCONSOLE; /* patchable */
235 1.53 uwe
236 1.53 uwe /* struct tty */
237 1.53 uwe static void scifstart(struct tty *);
238 1.53 uwe static int scifparam(struct tty *, struct termios *);
239 1.53 uwe
240 1.53 uwe
241 1.53 uwe void InitializeScif (unsigned int);
242 1.53 uwe int ScifErrCheck(void);
243 1.53 uwe void scif_putc(unsigned char);
244 1.53 uwe unsigned char scif_getc(void);
245 1.53 uwe
246 1.53 uwe static int scifintr(void *);
247 1.53 uwe static void scifsoft(void *);
248 1.53 uwe static void scif_rxsoft(struct scif_softc *, struct tty *);
249 1.53 uwe static void scif_txsoft(struct scif_softc *, struct tty *);
250 1.53 uwe #if 0
251 1.53 uwe static void scif_stsoft(struct scif_softc *, struct tty *);
252 1.53 uwe #endif
253 1.53 uwe static void scif_schedrx(struct scif_softc *);
254 1.53 uwe static void scifdiag(void *);
255 1.53 uwe
256 1.53 uwe static void scif_break(struct scif_softc *, int);
257 1.53 uwe static void scif_iflush(struct scif_softc *);
258 1.53 uwe
259 1.53 uwe
260 1.53 uwe /* Hardware flag masks (sc_hwflags) */
261 1.1 itojun #define SCIF_HW_NOIEN 0x01
262 1.1 itojun #define SCIF_HW_FIFO 0x02
263 1.1 itojun #define SCIF_HW_FLOW 0x08
264 1.1 itojun #define SCIF_HW_DEV_OK 0x20
265 1.1 itojun #define SCIF_HW_CONSOLE 0x40
266 1.1 itojun #define SCIF_HW_KGDB 0x80
267 1.1 itojun
268 1.53 uwe
269 1.1 itojun /* Buffer size for character buffer */
270 1.1 itojun #define SCIF_RING_SIZE 2048
271 1.53 uwe static unsigned int scif_rbuf_size = SCIF_RING_SIZE;
272 1.1 itojun
273 1.1 itojun /* Stop input when 3/4 of the ring is full; restart when only 1/4 is full. */
274 1.53 uwe static unsigned int scif_rbuf_hiwat = (SCIF_RING_SIZE * 1) / 4;
275 1.53 uwe static unsigned int scif_rbuf_lowat = (SCIF_RING_SIZE * 3) / 4;
276 1.1 itojun
277 1.1 itojun
278 1.7 msaitoh #ifdef SCIFCN_SPEED
279 1.7 msaitoh unsigned int scifcn_speed = SCIFCN_SPEED;
280 1.7 msaitoh #else
281 1.7 msaitoh unsigned int scifcn_speed = 9600;
282 1.7 msaitoh #endif
283 1.7 msaitoh
284 1.53 uwe #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */
285 1.53 uwe int scifconscflag = CONMODE;
286 1.1 itojun
287 1.53 uwe static int scifisconsole = 0;
288 1.1 itojun
289 1.53 uwe #ifdef KGDB
290 1.53 uwe static int kgdb_attached = 0;
291 1.53 uwe #endif
292 1.1 itojun
293 1.1 itojun
294 1.53 uwe #define divrnd(n, q) (((n)*2/(q)+1)/2) /* divide and round off */
295 1.1 itojun
296 1.37 uwe
297 1.37 uwe /* XXX: uwe
298 1.37 uwe * Prepare for bus_spacification. The difference in access widths is
299 1.37 uwe * still handled by the magic definitions in scifreg.h
300 1.37 uwe */
301 1.37 uwe #define scif_smr_read() SHREG_SCSMR2
302 1.37 uwe #define scif_smr_write(v) (SHREG_SCSMR2 = (v))
303 1.37 uwe
304 1.37 uwe #define scif_brr_read() SHREG_SCBRR2
305 1.37 uwe #define scif_brr_write(v) (SHREG_SCBRR2 = (v))
306 1.37 uwe
307 1.37 uwe #define scif_scr_read() SHREG_SCSCR2
308 1.37 uwe #define scif_scr_write(v) (SHREG_SCSCR2 = (v))
309 1.37 uwe
310 1.37 uwe #define scif_ftdr_write(v) (SHREG_SCFTDR2 = (v))
311 1.37 uwe
312 1.37 uwe #define scif_ssr_read() SHREG_SCSSR2
313 1.37 uwe #define scif_ssr_write(v) (SHREG_SCSSR2 = (v))
314 1.37 uwe
315 1.37 uwe #define scif_frdr_read() SHREG_SCFRDR2
316 1.37 uwe
317 1.37 uwe #define scif_fcr_read() SHREG_SCFCR2
318 1.37 uwe #define scif_fcr_write(v) (SHREG_SCFCR2 = (v))
319 1.37 uwe
320 1.37 uwe #define scif_fdr_read() SHREG_SCFDR2
321 1.37 uwe
322 1.37 uwe #ifdef SH4 /* additional registers in sh4 */
323 1.37 uwe
324 1.37 uwe #define scif_sptr_read() SHREG_SCSPTR2
325 1.37 uwe #define scif_sptr_write(v) (SHREG_SCSPTR2 = (v))
326 1.37 uwe
327 1.37 uwe #define scif_lsr_read() SHREG_SCLSR2
328 1.37 uwe #define scif_lsr_write(v) (SHREG_SCLSR2 = (v))
329 1.37 uwe
330 1.37 uwe #endif /* SH4 */
331 1.37 uwe
332 1.37 uwe
333 1.1 itojun void
334 1.20 uch InitializeScif(unsigned int bps)
335 1.1 itojun {
336 1.1 itojun
337 1.1 itojun /* Initialize SCR */
338 1.37 uwe scif_scr_write(0x00);
339 1.1 itojun
340 1.6 msaitoh #if 0
341 1.37 uwe scif_fcr_write(SCFCR2_TFRST | SCFCR2_RFRST | SCFCR2_MCE);
342 1.6 msaitoh #else
343 1.37 uwe scif_fcr_write(SCFCR2_TFRST | SCFCR2_RFRST);
344 1.6 msaitoh #endif
345 1.7 msaitoh /* Serial Mode Register */
346 1.37 uwe scif_smr_write(0x00); /* 8bit,NonParity,Even,1Stop */
347 1.1 itojun
348 1.7 msaitoh /* Bit Rate Register */
349 1.37 uwe scif_brr_write(divrnd(sh_clock_get_pclock(), 32 * bps) - 1);
350 1.1 itojun
351 1.7 msaitoh /*
352 1.40 christos * wait 2m Sec, because Send/Recv must begin 1 bit period after
353 1.7 msaitoh * BRR is set.
354 1.7 msaitoh */
355 1.40 christos delay(2000);
356 1.1 itojun
357 1.6 msaitoh #if 0
358 1.37 uwe scif_fcr_write(FIFO_RCV_TRIGGER_14 | FIFO_XMT_TRIGGER_1 | SCFCR2_MCE);
359 1.6 msaitoh #else
360 1.37 uwe scif_fcr_write(FIFO_RCV_TRIGGER_14 | FIFO_XMT_TRIGGER_1);
361 1.6 msaitoh #endif
362 1.1 itojun
363 1.18 wiz /* Send permission, Receive permission ON */
364 1.37 uwe scif_scr_write(SCSCR2_TE | SCSCR2_RE);
365 1.1 itojun
366 1.7 msaitoh /* Serial Status Register */
367 1.37 uwe scif_ssr_write(scif_ssr_read() & SCSSR2_TDFE); /* Clear Status */
368 1.1 itojun }
369 1.1 itojun
370 1.53 uwe int
371 1.53 uwe ScifErrCheck(void)
372 1.53 uwe {
373 1.1 itojun
374 1.53 uwe return (scif_ssr_read() & (SCSSR2_ER | SCSSR2_FER | SCSSR2_PER));
375 1.53 uwe }
376 1.1 itojun
377 1.1 itojun void
378 1.20 uch scif_putc(unsigned char c)
379 1.1 itojun {
380 1.14 msaitoh
381 1.1 itojun /* wait for ready */
382 1.37 uwe while ((scif_fdr_read() & SCFDR2_TXCNT) == SCFDR2_TXF_FULL)
383 1.36 uwe continue;
384 1.1 itojun
385 1.1 itojun /* write send data to send register */
386 1.37 uwe scif_ftdr_write(c);
387 1.1 itojun
388 1.1 itojun /* clear ready flag */
389 1.37 uwe scif_ssr_write(scif_ssr_read() & ~(SCSSR2_TDFE | SCSSR2_TEND));
390 1.1 itojun }
391 1.1 itojun
392 1.1 itojun unsigned char
393 1.14 msaitoh scif_getc(void)
394 1.1 itojun {
395 1.1 itojun unsigned char c, err_c;
396 1.26 msaitoh #ifdef SH4
397 1.43 uwe unsigned short err_c2 = 0; /* XXXGCC: -Wuninitialized */
398 1.26 msaitoh #endif
399 1.1 itojun
400 1.36 uwe for (;;) {
401 1.12 msaitoh /* wait for ready */
402 1.37 uwe while ((scif_fdr_read() & SCFDR2_RECVCNT) == 0)
403 1.36 uwe continue;
404 1.1 itojun
405 1.37 uwe c = scif_frdr_read();
406 1.37 uwe err_c = scif_ssr_read();
407 1.37 uwe scif_ssr_write(scif_ssr_read()
408 1.37 uwe & ~(SCSSR2_ER | SCSSR2_BRK | SCSSR2_RDF | SCSSR2_DR));
409 1.26 msaitoh #ifdef SH4
410 1.26 msaitoh if (CPU_IS_SH4) {
411 1.37 uwe err_c2 = scif_lsr_read();
412 1.37 uwe scif_lsr_write(scif_lsr_read() & ~SCLSR2_ORER);
413 1.26 msaitoh }
414 1.26 msaitoh #endif
415 1.12 msaitoh if ((err_c & (SCSSR2_ER | SCSSR2_BRK | SCSSR2_FER
416 1.53 uwe | SCSSR2_PER)) == 0)
417 1.53 uwe {
418 1.26 msaitoh #ifdef SH4
419 1.26 msaitoh if (CPU_IS_SH4 && ((err_c2 & SCLSR2_ORER) == 0))
420 1.26 msaitoh #endif
421 1.12 msaitoh return(c);
422 1.12 msaitoh }
423 1.12 msaitoh }
424 1.1 itojun
425 1.1 itojun }
426 1.1 itojun
427 1.1 itojun static int
428 1.56 uwe scif_match(device_t parent, cfdata_t cfp, void *aux)
429 1.1 itojun {
430 1.1 itojun
431 1.53 uwe if (scif_attached)
432 1.53 uwe return 0;
433 1.53 uwe
434 1.53 uwe if (strcmp(cfp->cf_name, "scif") != 0)
435 1.1 itojun return 0;
436 1.1 itojun
437 1.1 itojun return 1;
438 1.1 itojun }
439 1.1 itojun
440 1.1 itojun static void
441 1.53 uwe scif_attach(device_t parent, device_t self, void *aux)
442 1.1 itojun {
443 1.56 uwe struct scif_softc *sc;
444 1.1 itojun struct tty *tp;
445 1.1 itojun
446 1.56 uwe sc = device_private(self);
447 1.56 uwe sc->sc_dev = self;
448 1.56 uwe
449 1.38 chs scif_attached = 1;
450 1.38 chs
451 1.1 itojun sc->sc_hwflags = 0; /* XXX */
452 1.1 itojun sc->sc_swflags = 0; /* XXX */
453 1.1 itojun sc->sc_fifolen = 16;
454 1.1 itojun
455 1.53 uwe aprint_normal("\n");
456 1.53 uwe if (scifisconsole) {
457 1.53 uwe aprint_naive(" (console)\n");
458 1.53 uwe aprint_normal_dev(self, "console\n");
459 1.9 msaitoh SET(sc->sc_hwflags, SCIF_HW_CONSOLE);
460 1.9 msaitoh SET(sc->sc_swflags, TIOCFLAG_SOFTCAR);
461 1.53 uwe }
462 1.53 uwe #ifdef KGDB
463 1.53 uwe else if (kgdb_attached) {
464 1.53 uwe aprint_naive(" (kgdb)\n");
465 1.53 uwe aprint_normal_dev(self, "kgdb\n");
466 1.53 uwe SET(sc->sc_hwflags, SCIF_HW_KGDB);
467 1.53 uwe SET(sc->sc_swflags, TIOCFLAG_SOFTCAR);
468 1.53 uwe }
469 1.53 uwe #endif
470 1.53 uwe else {
471 1.53 uwe aprint_naive("\n");
472 1.53 uwe InitializeScif(9600); /* XXX */
473 1.9 msaitoh }
474 1.1 itojun
475 1.51 ad callout_init(&sc->sc_diag_ch, 0);
476 1.24 uch #ifdef SH4
477 1.24 uch intc_intr_establish(SH4_INTEVT_SCIF_ERI, IST_LEVEL, IPL_SERIAL,
478 1.24 uch scifintr, sc);
479 1.24 uch intc_intr_establish(SH4_INTEVT_SCIF_RXI, IST_LEVEL, IPL_SERIAL,
480 1.24 uch scifintr, sc);
481 1.24 uch intc_intr_establish(SH4_INTEVT_SCIF_BRI, IST_LEVEL, IPL_SERIAL,
482 1.24 uch scifintr, sc);
483 1.24 uch intc_intr_establish(SH4_INTEVT_SCIF_TXI, IST_LEVEL, IPL_SERIAL,
484 1.24 uch scifintr, sc);
485 1.24 uch #else
486 1.24 uch intc_intr_establish(SH7709_INTEVT2_SCIF_ERI, IST_LEVEL, IPL_SERIAL,
487 1.24 uch scifintr, sc);
488 1.24 uch intc_intr_establish(SH7709_INTEVT2_SCIF_RXI, IST_LEVEL, IPL_SERIAL,
489 1.24 uch scifintr, sc);
490 1.24 uch intc_intr_establish(SH7709_INTEVT2_SCIF_BRI, IST_LEVEL, IPL_SERIAL,
491 1.24 uch scifintr, sc);
492 1.24 uch intc_intr_establish(SH7709_INTEVT2_SCIF_TXI, IST_LEVEL, IPL_SERIAL,
493 1.24 uch scifintr, sc);
494 1.24 uch #endif
495 1.8 thorpej
496 1.55 ad sc->sc_si = softint_establish(SOFTINT_SERIAL, scifsoft, sc);
497 1.9 msaitoh SET(sc->sc_hwflags, SCIF_HW_DEV_OK);
498 1.1 itojun
499 1.60 rmind tp = tty_alloc();
500 1.1 itojun tp->t_oproc = scifstart;
501 1.1 itojun tp->t_param = scifparam;
502 1.1 itojun tp->t_hwiflow = NULL;
503 1.1 itojun
504 1.1 itojun sc->sc_tty = tp;
505 1.68 thorpej sc->sc_rbuf = kmem_alloc(scif_rbuf_size << 1, KM_SLEEP);
506 1.1 itojun sc->sc_ebuf = sc->sc_rbuf + (scif_rbuf_size << 1);
507 1.1 itojun
508 1.1 itojun tty_attach(tp);
509 1.59 uwe
510 1.59 uwe /* XXX: TODO */
511 1.59 uwe if (!pmf_device_register(self, NULL, NULL))
512 1.59 uwe aprint_error_dev(self, "unable to establish power handler\n");
513 1.1 itojun }
514 1.1 itojun
515 1.1 itojun /*
516 1.1 itojun * Start or restart transmission.
517 1.1 itojun */
518 1.1 itojun static void
519 1.20 uch scifstart(struct tty *tp)
520 1.1 itojun {
521 1.56 uwe struct scif_softc *sc;
522 1.1 itojun int s;
523 1.1 itojun
524 1.56 uwe sc = device_lookup_private(&scif_cd, SCIFUNIT(tp->t_dev));
525 1.56 uwe
526 1.1 itojun s = spltty();
527 1.1 itojun if (ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP))
528 1.1 itojun goto out;
529 1.1 itojun if (sc->sc_tx_stopped)
530 1.1 itojun goto out;
531 1.54 ad if (!ttypull(tp))
532 1.54 ad goto out;
533 1.1 itojun
534 1.1 itojun /* Grab the first contiguous region of buffer space. */
535 1.1 itojun {
536 1.1 itojun u_char *tba;
537 1.1 itojun int tbc;
538 1.1 itojun
539 1.1 itojun tba = tp->t_outq.c_cf;
540 1.1 itojun tbc = ndqb(&tp->t_outq, 0);
541 1.1 itojun
542 1.1 itojun (void)splserial();
543 1.1 itojun
544 1.1 itojun sc->sc_tba = tba;
545 1.1 itojun sc->sc_tbc = tbc;
546 1.1 itojun }
547 1.1 itojun
548 1.1 itojun SET(tp->t_state, TS_BUSY);
549 1.1 itojun sc->sc_tx_busy = 1;
550 1.1 itojun
551 1.1 itojun /* Enable transmit completion interrupts if necessary. */
552 1.37 uwe scif_scr_write(scif_scr_read() | SCSCR2_TIE | SCSCR2_RIE);
553 1.1 itojun
554 1.1 itojun /* Output the first chunk of the contiguous buffer. */
555 1.1 itojun {
556 1.1 itojun int n;
557 1.39 uwe int maxchars;
558 1.1 itojun int i;
559 1.1 itojun
560 1.1 itojun n = sc->sc_tbc;
561 1.39 uwe maxchars = sc->sc_fifolen
562 1.39 uwe - ((scif_fdr_read() & SCFDR2_TXCNT) >> 8);
563 1.39 uwe if (n > maxchars)
564 1.39 uwe n = maxchars;
565 1.1 itojun
566 1.1 itojun for (i = 0; i < n; i++) {
567 1.14 msaitoh scif_putc(*(sc->sc_tba));
568 1.1 itojun sc->sc_tba++;
569 1.1 itojun }
570 1.1 itojun sc->sc_tbc -= n;
571 1.1 itojun }
572 1.1 itojun out:
573 1.1 itojun splx(s);
574 1.1 itojun return;
575 1.1 itojun }
576 1.1 itojun
577 1.1 itojun /*
578 1.1 itojun * Set SCIF tty parameters from termios.
579 1.1 itojun * XXX - Should just copy the whole termios after
580 1.1 itojun * making sure all the changes could be done.
581 1.1 itojun */
582 1.1 itojun static int
583 1.20 uch scifparam(struct tty *tp, struct termios *t)
584 1.1 itojun {
585 1.56 uwe struct scif_softc *sc;
586 1.1 itojun int ospeed = t->c_ospeed;
587 1.1 itojun int s;
588 1.1 itojun
589 1.56 uwe sc = device_lookup_private(&scif_cd, SCIFUNIT(tp->t_dev));
590 1.56 uwe if (!device_is_active(sc->sc_dev))
591 1.1 itojun return (EIO);
592 1.1 itojun
593 1.1 itojun /* Check requested parameters. */
594 1.1 itojun if (ospeed < 0)
595 1.1 itojun return (EINVAL);
596 1.1 itojun if (t->c_ispeed && t->c_ispeed != t->c_ospeed)
597 1.1 itojun return (EINVAL);
598 1.1 itojun
599 1.1 itojun /*
600 1.1 itojun * For the console, always force CLOCAL and !HUPCL, so that the port
601 1.1 itojun * is always active.
602 1.1 itojun */
603 1.1 itojun if (ISSET(sc->sc_swflags, TIOCFLAG_SOFTCAR) ||
604 1.1 itojun ISSET(sc->sc_hwflags, SCIF_HW_CONSOLE)) {
605 1.1 itojun SET(t->c_cflag, CLOCAL);
606 1.1 itojun CLR(t->c_cflag, HUPCL);
607 1.1 itojun }
608 1.1 itojun
609 1.1 itojun /*
610 1.1 itojun * If there were no changes, don't do anything. This avoids dropping
611 1.1 itojun * input and improves performance when all we did was frob things like
612 1.1 itojun * VMIN and VTIME.
613 1.1 itojun */
614 1.1 itojun if (tp->t_ospeed == t->c_ospeed &&
615 1.1 itojun tp->t_cflag == t->c_cflag)
616 1.1 itojun return (0);
617 1.1 itojun
618 1.1 itojun #if 0
619 1.1 itojun /* XXX (msaitoh) */
620 1.1 itojun lcr = ISSET(sc->sc_lcr, LCR_SBREAK) | cflag2lcr(t->c_cflag);
621 1.1 itojun #endif
622 1.1 itojun
623 1.1 itojun s = splserial();
624 1.1 itojun
625 1.1 itojun /*
626 1.1 itojun * Set the flow control pins depending on the current flow control
627 1.1 itojun * mode.
628 1.1 itojun */
629 1.1 itojun if (ISSET(t->c_cflag, CRTSCTS)) {
630 1.37 uwe scif_fcr_write(scif_fcr_read() | SCFCR2_MCE);
631 1.1 itojun } else {
632 1.37 uwe scif_fcr_write(scif_fcr_read() & ~SCFCR2_MCE);
633 1.1 itojun }
634 1.1 itojun
635 1.37 uwe scif_brr_write(divrnd(sh_clock_get_pclock(), 32 * ospeed) -1);
636 1.1 itojun
637 1.1 itojun /*
638 1.1 itojun * Set the FIFO threshold based on the receive speed.
639 1.1 itojun *
640 1.1 itojun * * If it's a low speed, it's probably a mouse or some other
641 1.1 itojun * interactive device, so set the threshold low.
642 1.1 itojun * * If it's a high speed, trim the trigger level down to prevent
643 1.1 itojun * overflows.
644 1.1 itojun * * Otherwise set it a bit higher.
645 1.1 itojun */
646 1.1 itojun #if 0
647 1.1 itojun /* XXX (msaitoh) */
648 1.1 itojun if (ISSET(sc->sc_hwflags, SCIF_HW_HAYESP))
649 1.1 itojun sc->sc_fifo = FIFO_DMA_MODE | FIFO_ENABLE | FIFO_TRIGGER_8;
650 1.1 itojun else if (ISSET(sc->sc_hwflags, SCIF_HW_FIFO))
651 1.1 itojun sc->sc_fifo = FIFO_ENABLE |
652 1.1 itojun (t->c_ospeed <= 1200 ? FIFO_TRIGGER_1 :
653 1.1 itojun t->c_ospeed <= 38400 ? FIFO_TRIGGER_8 : FIFO_TRIGGER_4);
654 1.1 itojun else
655 1.1 itojun sc->sc_fifo = 0;
656 1.1 itojun #endif
657 1.1 itojun
658 1.1 itojun /* And copy to tty. */
659 1.1 itojun tp->t_ispeed = 0;
660 1.1 itojun tp->t_ospeed = t->c_ospeed;
661 1.1 itojun tp->t_cflag = t->c_cflag;
662 1.1 itojun
663 1.1 itojun if (!sc->sc_heldchange) {
664 1.1 itojun if (sc->sc_tx_busy) {
665 1.1 itojun sc->sc_heldtbc = sc->sc_tbc;
666 1.1 itojun sc->sc_tbc = 0;
667 1.1 itojun sc->sc_heldchange = 1;
668 1.1 itojun }
669 1.1 itojun #if 0
670 1.1 itojun /* XXX (msaitoh) */
671 1.1 itojun else
672 1.1 itojun scif_loadchannelregs(sc);
673 1.1 itojun #endif
674 1.1 itojun }
675 1.1 itojun
676 1.1 itojun if (!ISSET(t->c_cflag, CHWFLOW)) {
677 1.1 itojun /* Disable the high water mark. */
678 1.1 itojun sc->sc_r_hiwat = 0;
679 1.1 itojun sc->sc_r_lowat = 0;
680 1.1 itojun if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) {
681 1.1 itojun CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED);
682 1.1 itojun scif_schedrx(sc);
683 1.1 itojun }
684 1.1 itojun } else {
685 1.1 itojun sc->sc_r_hiwat = scif_rbuf_hiwat;
686 1.1 itojun sc->sc_r_lowat = scif_rbuf_lowat;
687 1.1 itojun }
688 1.1 itojun
689 1.1 itojun splx(s);
690 1.1 itojun
691 1.69 andvar DPRINTF("%s: scifparam\n", device_xname(sc->sc_dev));
692 1.1 itojun
693 1.1 itojun if (!ISSET(t->c_cflag, CHWFLOW)) {
694 1.1 itojun if (sc->sc_tx_stopped) {
695 1.1 itojun sc->sc_tx_stopped = 0;
696 1.1 itojun scifstart(tp);
697 1.1 itojun }
698 1.1 itojun }
699 1.1 itojun
700 1.1 itojun return (0);
701 1.1 itojun }
702 1.1 itojun
703 1.53 uwe static void
704 1.20 uch scif_iflush(struct scif_softc *sc)
705 1.1 itojun {
706 1.1 itojun int i;
707 1.1 itojun
708 1.37 uwe i = scif_fdr_read() & SCFDR2_RECVCNT;
709 1.1 itojun
710 1.1 itojun while (i > 0) {
711 1.62 christos (void)scif_frdr_read();
712 1.37 uwe scif_ssr_write(scif_ssr_read() & ~(SCSSR2_RDF | SCSSR2_DR));
713 1.1 itojun i--;
714 1.1 itojun }
715 1.1 itojun }
716 1.1 itojun
717 1.1 itojun int
718 1.42 christos scifopen(dev_t dev, int flag, int mode, struct lwp *l)
719 1.1 itojun {
720 1.1 itojun struct scif_softc *sc;
721 1.1 itojun struct tty *tp;
722 1.1 itojun int s, s2;
723 1.1 itojun int error;
724 1.1 itojun
725 1.56 uwe sc = device_lookup_private(&scif_cd, SCIFUNIT(dev));
726 1.1 itojun if (sc == 0 || !ISSET(sc->sc_hwflags, SCIF_HW_DEV_OK) ||
727 1.1 itojun sc->sc_rbuf == NULL)
728 1.1 itojun return (ENXIO);
729 1.1 itojun
730 1.56 uwe if (!device_is_active(sc->sc_dev))
731 1.1 itojun return (ENXIO);
732 1.1 itojun
733 1.1 itojun #ifdef KGDB
734 1.1 itojun /*
735 1.1 itojun * If this is the kgdb port, no other use is permitted.
736 1.1 itojun */
737 1.1 itojun if (ISSET(sc->sc_hwflags, SCIF_HW_KGDB))
738 1.1 itojun return (EBUSY);
739 1.22 uch #endif /* KGDB */
740 1.1 itojun
741 1.1 itojun tp = sc->sc_tty;
742 1.1 itojun
743 1.48 elad if (kauth_authorize_device_tty(l->l_cred, KAUTH_DEVICE_TTY_OPEN, tp))
744 1.1 itojun return (EBUSY);
745 1.1 itojun
746 1.1 itojun s = spltty();
747 1.1 itojun
748 1.1 itojun /*
749 1.1 itojun * Do the following iff this is a first open.
750 1.1 itojun */
751 1.1 itojun if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
752 1.1 itojun struct termios t;
753 1.1 itojun
754 1.1 itojun tp->t_dev = dev;
755 1.1 itojun
756 1.1 itojun s2 = splserial();
757 1.1 itojun
758 1.1 itojun /* Turn on interrupts. */
759 1.37 uwe scif_scr_write(scif_scr_read() | SCSCR2_TIE | SCSCR2_RIE);
760 1.1 itojun
761 1.1 itojun splx(s2);
762 1.1 itojun
763 1.1 itojun /*
764 1.1 itojun * Initialize the termios status to the defaults. Add in the
765 1.1 itojun * sticky bits from TIOCSFLAGS.
766 1.1 itojun */
767 1.1 itojun t.c_ispeed = 0;
768 1.1 itojun if (ISSET(sc->sc_hwflags, SCIF_HW_CONSOLE)) {
769 1.7 msaitoh t.c_ospeed = scifcn_speed; /* XXX (msaitoh) */
770 1.1 itojun t.c_cflag = scifconscflag;
771 1.1 itojun } else {
772 1.1 itojun t.c_ospeed = TTYDEF_SPEED;
773 1.1 itojun t.c_cflag = TTYDEF_CFLAG;
774 1.1 itojun }
775 1.1 itojun if (ISSET(sc->sc_swflags, TIOCFLAG_CLOCAL))
776 1.1 itojun SET(t.c_cflag, CLOCAL);
777 1.1 itojun if (ISSET(sc->sc_swflags, TIOCFLAG_CRTSCTS))
778 1.1 itojun SET(t.c_cflag, CRTSCTS);
779 1.1 itojun if (ISSET(sc->sc_swflags, TIOCFLAG_MDMBUF))
780 1.1 itojun SET(t.c_cflag, MDMBUF);
781 1.1 itojun /* Make sure scifparam() will do something. */
782 1.1 itojun tp->t_ospeed = 0;
783 1.1 itojun (void) scifparam(tp, &t);
784 1.1 itojun tp->t_iflag = TTYDEF_IFLAG;
785 1.1 itojun tp->t_oflag = TTYDEF_OFLAG;
786 1.1 itojun tp->t_lflag = TTYDEF_LFLAG;
787 1.1 itojun ttychars(tp);
788 1.1 itojun ttsetwater(tp);
789 1.1 itojun
790 1.1 itojun s2 = splserial();
791 1.1 itojun
792 1.1 itojun /* Clear the input ring, and unblock. */
793 1.1 itojun sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf;
794 1.1 itojun sc->sc_rbavail = scif_rbuf_size;
795 1.1 itojun scif_iflush(sc);
796 1.1 itojun CLR(sc->sc_rx_flags, RX_ANY_BLOCK);
797 1.1 itojun #if 0
798 1.1 itojun /* XXX (msaitoh) */
799 1.1 itojun scif_hwiflow(sc);
800 1.1 itojun #endif
801 1.1 itojun
802 1.69 andvar DPRINTF("%s: scifopen\n", device_xname(sc->sc_dev));
803 1.1 itojun
804 1.1 itojun splx(s2);
805 1.1 itojun }
806 1.1 itojun
807 1.1 itojun splx(s);
808 1.1 itojun
809 1.1 itojun error = ttyopen(tp, SCIFDIALOUT(dev), ISSET(flag, O_NONBLOCK));
810 1.1 itojun if (error)
811 1.1 itojun goto bad;
812 1.1 itojun
813 1.13 eeh error = (*tp->t_linesw->l_open)(dev, tp);
814 1.1 itojun if (error)
815 1.1 itojun goto bad;
816 1.1 itojun
817 1.1 itojun return (0);
818 1.1 itojun
819 1.1 itojun bad:
820 1.1 itojun
821 1.1 itojun return (error);
822 1.1 itojun }
823 1.1 itojun
824 1.1 itojun int
825 1.42 christos scifclose(dev_t dev, int flag, int mode, struct lwp *l)
826 1.1 itojun {
827 1.56 uwe struct scif_softc *sc;
828 1.56 uwe struct tty *tp;
829 1.56 uwe
830 1.56 uwe sc = device_lookup_private(&scif_cd, SCIFUNIT(dev));
831 1.56 uwe tp = sc->sc_tty;
832 1.1 itojun
833 1.1 itojun /* XXX This is for cons.c. */
834 1.1 itojun if (!ISSET(tp->t_state, TS_ISOPEN))
835 1.1 itojun return (0);
836 1.1 itojun
837 1.13 eeh (*tp->t_linesw->l_close)(tp, flag);
838 1.1 itojun ttyclose(tp);
839 1.1 itojun
840 1.56 uwe if (!device_is_active(sc->sc_dev))
841 1.1 itojun return (0);
842 1.1 itojun
843 1.1 itojun return (0);
844 1.1 itojun }
845 1.1 itojun
846 1.1 itojun int
847 1.20 uch scifread(dev_t dev, struct uio *uio, int flag)
848 1.1 itojun {
849 1.56 uwe struct scif_softc *sc;
850 1.56 uwe struct tty *tp;
851 1.56 uwe
852 1.56 uwe sc = device_lookup_private(&scif_cd, SCIFUNIT(dev));
853 1.56 uwe tp = sc->sc_tty;
854 1.1 itojun
855 1.13 eeh return ((*tp->t_linesw->l_read)(tp, uio, flag));
856 1.1 itojun }
857 1.1 itojun
858 1.1 itojun int
859 1.20 uch scifwrite(dev_t dev, struct uio *uio, int flag)
860 1.1 itojun {
861 1.56 uwe struct scif_softc *sc;
862 1.56 uwe struct tty *tp;
863 1.56 uwe
864 1.56 uwe sc = device_lookup_private(&scif_cd, SCIFUNIT(dev));
865 1.56 uwe tp = sc->sc_tty;
866 1.1 itojun
867 1.13 eeh return ((*tp->t_linesw->l_write)(tp, uio, flag));
868 1.16 scw }
869 1.16 scw
870 1.16 scw int
871 1.42 christos scifpoll(dev_t dev, int events, struct lwp *l)
872 1.16 scw {
873 1.56 uwe struct scif_softc *sc;
874 1.56 uwe struct tty *tp;
875 1.56 uwe
876 1.56 uwe sc = device_lookup_private(&scif_cd, SCIFUNIT(dev));
877 1.56 uwe tp = sc->sc_tty;
878 1.25 uch
879 1.42 christos return ((*tp->t_linesw->l_poll)(tp, events, l));
880 1.1 itojun }
881 1.1 itojun
882 1.1 itojun struct tty *
883 1.20 uch sciftty(dev_t dev)
884 1.1 itojun {
885 1.56 uwe struct scif_softc *sc;
886 1.56 uwe struct tty *tp;
887 1.56 uwe
888 1.56 uwe sc = device_lookup_private(&scif_cd, SCIFUNIT(dev));
889 1.56 uwe tp = sc->sc_tty;
890 1.1 itojun
891 1.1 itojun return (tp);
892 1.1 itojun }
893 1.1 itojun
894 1.1 itojun int
895 1.50 christos scifioctl(dev_t dev, u_long cmd, void *data, int flag, struct lwp *l)
896 1.1 itojun {
897 1.56 uwe struct scif_softc *sc;
898 1.56 uwe struct tty *tp;
899 1.1 itojun int error;
900 1.1 itojun int s;
901 1.1 itojun
902 1.56 uwe sc = device_lookup_private(&scif_cd, SCIFUNIT(dev));
903 1.56 uwe if (!device_is_active(sc->sc_dev))
904 1.1 itojun return (EIO);
905 1.1 itojun
906 1.56 uwe tp = sc->sc_tty;
907 1.42 christos error = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, l);
908 1.23 atatat if (error != EPASSTHROUGH)
909 1.1 itojun return (error);
910 1.1 itojun
911 1.42 christos error = ttioctl(tp, cmd, data, flag, l);
912 1.23 atatat if (error != EPASSTHROUGH)
913 1.1 itojun return (error);
914 1.1 itojun
915 1.1 itojun error = 0;
916 1.1 itojun
917 1.1 itojun s = splserial();
918 1.1 itojun
919 1.1 itojun switch (cmd) {
920 1.1 itojun case TIOCSBRK:
921 1.1 itojun scif_break(sc, 1);
922 1.1 itojun break;
923 1.1 itojun
924 1.1 itojun case TIOCCBRK:
925 1.1 itojun scif_break(sc, 0);
926 1.1 itojun break;
927 1.6 msaitoh
928 1.1 itojun case TIOCGFLAGS:
929 1.1 itojun *(int *)data = sc->sc_swflags;
930 1.1 itojun break;
931 1.1 itojun
932 1.1 itojun case TIOCSFLAGS:
933 1.49 elad error = kauth_authorize_device_tty(l->l_cred,
934 1.49 elad KAUTH_DEVICE_TTY_PRIVSET, tp);
935 1.1 itojun if (error)
936 1.1 itojun break;
937 1.1 itojun sc->sc_swflags = *(int *)data;
938 1.1 itojun break;
939 1.1 itojun
940 1.1 itojun default:
941 1.23 atatat error = EPASSTHROUGH;
942 1.1 itojun break;
943 1.1 itojun }
944 1.1 itojun
945 1.1 itojun splx(s);
946 1.1 itojun
947 1.1 itojun return (error);
948 1.1 itojun }
949 1.1 itojun
950 1.53 uwe static void
951 1.20 uch scif_schedrx(struct scif_softc *sc)
952 1.1 itojun {
953 1.1 itojun
954 1.1 itojun sc->sc_rx_ready = 1;
955 1.1 itojun
956 1.1 itojun /* Wake up the poller. */
957 1.55 ad softint_schedule(sc->sc_si);
958 1.1 itojun }
959 1.1 itojun
960 1.53 uwe static void
961 1.20 uch scif_break(struct scif_softc *sc, int onoff)
962 1.6 msaitoh {
963 1.6 msaitoh
964 1.6 msaitoh if (onoff)
965 1.37 uwe scif_ssr_write(scif_ssr_read() & ~SCSSR2_TDFE);
966 1.6 msaitoh else
967 1.37 uwe scif_ssr_write(scif_ssr_read() | SCSSR2_TDFE);
968 1.6 msaitoh
969 1.6 msaitoh #if 0 /* XXX */
970 1.6 msaitoh if (!sc->sc_heldchange) {
971 1.6 msaitoh if (sc->sc_tx_busy) {
972 1.6 msaitoh sc->sc_heldtbc = sc->sc_tbc;
973 1.6 msaitoh sc->sc_tbc = 0;
974 1.6 msaitoh sc->sc_heldchange = 1;
975 1.6 msaitoh } else
976 1.6 msaitoh scif_loadchannelregs(sc);
977 1.6 msaitoh }
978 1.6 msaitoh #endif
979 1.6 msaitoh }
980 1.6 msaitoh
981 1.1 itojun /*
982 1.1 itojun * Stop output, e.g., for ^S or output flush.
983 1.1 itojun */
984 1.1 itojun void
985 1.20 uch scifstop(struct tty *tp, int flag)
986 1.1 itojun {
987 1.56 uwe struct scif_softc *sc;
988 1.1 itojun int s;
989 1.1 itojun
990 1.56 uwe sc = device_lookup_private(&scif_cd, SCIFUNIT(tp->t_dev));
991 1.56 uwe
992 1.1 itojun s = splserial();
993 1.1 itojun if (ISSET(tp->t_state, TS_BUSY)) {
994 1.1 itojun /* Stop transmitting at the next chunk. */
995 1.1 itojun sc->sc_tbc = 0;
996 1.1 itojun sc->sc_heldtbc = 0;
997 1.1 itojun if (!ISSET(tp->t_state, TS_TTSTOP))
998 1.1 itojun SET(tp->t_state, TS_FLUSH);
999 1.1 itojun }
1000 1.1 itojun splx(s);
1001 1.1 itojun }
1002 1.1 itojun
1003 1.53 uwe static void
1004 1.20 uch scifdiag(void *arg)
1005 1.1 itojun {
1006 1.1 itojun struct scif_softc *sc = arg;
1007 1.1 itojun int overflows, floods;
1008 1.1 itojun int s;
1009 1.1 itojun
1010 1.1 itojun s = splserial();
1011 1.1 itojun overflows = sc->sc_overflows;
1012 1.1 itojun sc->sc_overflows = 0;
1013 1.1 itojun floods = sc->sc_floods;
1014 1.1 itojun sc->sc_floods = 0;
1015 1.1 itojun sc->sc_errors = 0;
1016 1.1 itojun splx(s);
1017 1.1 itojun
1018 1.1 itojun log(LOG_WARNING, "%s: %d silo overflow%s, %d ibuf flood%s\n",
1019 1.56 uwe device_xname(sc->sc_dev),
1020 1.1 itojun overflows, overflows == 1 ? "" : "s",
1021 1.1 itojun floods, floods == 1 ? "" : "s");
1022 1.1 itojun }
1023 1.1 itojun
1024 1.53 uwe static void
1025 1.20 uch scif_rxsoft(struct scif_softc *sc, struct tty *tp)
1026 1.1 itojun {
1027 1.39 uwe int (*rint)(int, struct tty *) = tp->t_linesw->l_rint;
1028 1.1 itojun u_char *get, *end;
1029 1.1 itojun u_int cc, scc;
1030 1.1 itojun u_char ssr2;
1031 1.1 itojun int code;
1032 1.1 itojun int s;
1033 1.1 itojun
1034 1.1 itojun end = sc->sc_ebuf;
1035 1.1 itojun get = sc->sc_rbget;
1036 1.1 itojun scc = cc = scif_rbuf_size - sc->sc_rbavail;
1037 1.1 itojun
1038 1.1 itojun if (cc == scif_rbuf_size) {
1039 1.1 itojun sc->sc_floods++;
1040 1.1 itojun if (sc->sc_errors++ == 0)
1041 1.11 msaitoh callout_reset(&sc->sc_diag_ch, 60 * hz, scifdiag, sc);
1042 1.1 itojun }
1043 1.1 itojun
1044 1.1 itojun while (cc) {
1045 1.1 itojun code = get[0];
1046 1.1 itojun ssr2 = get[1];
1047 1.6 msaitoh if (ISSET(ssr2, SCSSR2_BRK | SCSSR2_FER | SCSSR2_PER)) {
1048 1.6 msaitoh if (ISSET(ssr2, SCSSR2_BRK | SCSSR2_FER))
1049 1.1 itojun SET(code, TTY_FE);
1050 1.1 itojun if (ISSET(ssr2, SCSSR2_PER))
1051 1.1 itojun SET(code, TTY_PE);
1052 1.1 itojun }
1053 1.1 itojun if ((*rint)(code, tp) == -1) {
1054 1.1 itojun /*
1055 1.1 itojun * The line discipline's buffer is out of space.
1056 1.1 itojun */
1057 1.1 itojun if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) {
1058 1.1 itojun /*
1059 1.1 itojun * We're either not using flow control, or the
1060 1.1 itojun * line discipline didn't tell us to block for
1061 1.1 itojun * some reason. Either way, we have no way to
1062 1.1 itojun * know when there's more space available, so
1063 1.1 itojun * just drop the rest of the data.
1064 1.1 itojun */
1065 1.1 itojun get += cc << 1;
1066 1.1 itojun if (get >= end)
1067 1.1 itojun get -= scif_rbuf_size << 1;
1068 1.1 itojun cc = 0;
1069 1.1 itojun } else {
1070 1.1 itojun /*
1071 1.1 itojun * Don't schedule any more receive processing
1072 1.1 itojun * until the line discipline tells us there's
1073 1.1 itojun * space available (through scifhwiflow()).
1074 1.1 itojun * Leave the rest of the data in the input
1075 1.1 itojun * buffer.
1076 1.1 itojun */
1077 1.1 itojun SET(sc->sc_rx_flags, RX_TTY_OVERFLOWED);
1078 1.1 itojun }
1079 1.1 itojun break;
1080 1.1 itojun }
1081 1.1 itojun get += 2;
1082 1.1 itojun if (get >= end)
1083 1.1 itojun get = sc->sc_rbuf;
1084 1.1 itojun cc--;
1085 1.1 itojun }
1086 1.1 itojun
1087 1.1 itojun if (cc != scc) {
1088 1.1 itojun sc->sc_rbget = get;
1089 1.1 itojun s = splserial();
1090 1.1 itojun cc = sc->sc_rbavail += scc - cc;
1091 1.1 itojun /* Buffers should be ok again, release possible block. */
1092 1.1 itojun if (cc >= sc->sc_r_lowat) {
1093 1.1 itojun if (ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) {
1094 1.1 itojun CLR(sc->sc_rx_flags, RX_IBUF_OVERFLOWED);
1095 1.37 uwe scif_scr_write(scif_scr_read() | SCSCR2_RIE);
1096 1.1 itojun }
1097 1.1 itojun #if 0
1098 1.1 itojun if (ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED)) {
1099 1.1 itojun CLR(sc->sc_rx_flags, RX_IBUF_BLOCKED);
1100 1.1 itojun scif_hwiflow(sc);
1101 1.1 itojun }
1102 1.1 itojun #endif
1103 1.1 itojun }
1104 1.1 itojun splx(s);
1105 1.1 itojun }
1106 1.1 itojun }
1107 1.1 itojun
1108 1.53 uwe static void
1109 1.20 uch scif_txsoft(struct scif_softc *sc, struct tty *tp)
1110 1.1 itojun {
1111 1.1 itojun
1112 1.1 itojun CLR(tp->t_state, TS_BUSY);
1113 1.1 itojun if (ISSET(tp->t_state, TS_FLUSH))
1114 1.1 itojun CLR(tp->t_state, TS_FLUSH);
1115 1.1 itojun else
1116 1.1 itojun ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf));
1117 1.13 eeh (*tp->t_linesw->l_start)(tp);
1118 1.1 itojun }
1119 1.1 itojun
1120 1.53 uwe #if 0 /* XXX (msaitoh) */
1121 1.53 uwe static void
1122 1.20 uch scif_stsoft(struct scif_softc *sc, struct tty *tp)
1123 1.1 itojun {
1124 1.1 itojun u_char msr, delta;
1125 1.1 itojun int s;
1126 1.1 itojun
1127 1.1 itojun s = splserial();
1128 1.1 itojun msr = sc->sc_msr;
1129 1.1 itojun delta = sc->sc_msr_delta;
1130 1.1 itojun sc->sc_msr_delta = 0;
1131 1.1 itojun splx(s);
1132 1.1 itojun
1133 1.1 itojun if (ISSET(delta, sc->sc_msr_dcd)) {
1134 1.1 itojun /*
1135 1.1 itojun * Inform the tty layer that carrier detect changed.
1136 1.1 itojun */
1137 1.13 eeh (void) (*tp->t_linesw->l_modem)(tp, ISSET(msr, MSR_DCD));
1138 1.1 itojun }
1139 1.1 itojun
1140 1.1 itojun if (ISSET(delta, sc->sc_msr_cts)) {
1141 1.1 itojun /* Block or unblock output according to flow control. */
1142 1.1 itojun if (ISSET(msr, sc->sc_msr_cts)) {
1143 1.1 itojun sc->sc_tx_stopped = 0;
1144 1.13 eeh (*tp->t_linesw->l_start)(tp);
1145 1.1 itojun } else {
1146 1.1 itojun sc->sc_tx_stopped = 1;
1147 1.1 itojun }
1148 1.1 itojun }
1149 1.1 itojun
1150 1.69 andvar DPRINTF("%s: scif_stsoft\n", device_xname(sc->sc_dev));
1151 1.1 itojun }
1152 1.53 uwe #endif /* 0 */
1153 1.1 itojun
1154 1.53 uwe static void
1155 1.20 uch scifsoft(void *arg)
1156 1.1 itojun {
1157 1.1 itojun struct scif_softc *sc = arg;
1158 1.1 itojun struct tty *tp;
1159 1.1 itojun
1160 1.56 uwe if (!device_is_active(sc->sc_dev))
1161 1.1 itojun return;
1162 1.1 itojun
1163 1.51 ad tp = sc->sc_tty;
1164 1.1 itojun
1165 1.51 ad if (sc->sc_rx_ready) {
1166 1.51 ad sc->sc_rx_ready = 0;
1167 1.51 ad scif_rxsoft(sc, tp);
1168 1.51 ad }
1169 1.1 itojun
1170 1.1 itojun #if 0
1171 1.51 ad if (sc->sc_st_check) {
1172 1.51 ad sc->sc_st_check = 0;
1173 1.51 ad scif_stsoft(sc, tp);
1174 1.51 ad }
1175 1.1 itojun #endif
1176 1.1 itojun
1177 1.51 ad if (sc->sc_tx_done) {
1178 1.51 ad sc->sc_tx_done = 0;
1179 1.51 ad scif_txsoft(sc, tp);
1180 1.1 itojun }
1181 1.1 itojun }
1182 1.1 itojun
1183 1.53 uwe static int
1184 1.20 uch scifintr(void *arg)
1185 1.1 itojun {
1186 1.1 itojun struct scif_softc *sc = arg;
1187 1.1 itojun u_char *put, *end;
1188 1.1 itojun u_int cc;
1189 1.1 itojun u_short ssr2;
1190 1.1 itojun int count;
1191 1.1 itojun
1192 1.56 uwe if (!device_is_active(sc->sc_dev))
1193 1.1 itojun return (0);
1194 1.1 itojun
1195 1.1 itojun end = sc->sc_ebuf;
1196 1.1 itojun put = sc->sc_rbput;
1197 1.1 itojun cc = sc->sc_rbavail;
1198 1.1 itojun
1199 1.26 msaitoh do {
1200 1.37 uwe ssr2 = scif_ssr_read();
1201 1.26 msaitoh if (ISSET(ssr2, SCSSR2_BRK)) {
1202 1.37 uwe scif_ssr_write(scif_ssr_read()
1203 1.37 uwe & ~(SCSSR2_ER | SCSSR2_BRK | SCSSR2_DR));
1204 1.1 itojun #ifdef DDB
1205 1.26 msaitoh if (ISSET(sc->sc_hwflags, SCIF_HW_CONSOLE)) {
1206 1.26 msaitoh console_debugger();
1207 1.26 msaitoh }
1208 1.22 uch #endif /* DDB */
1209 1.1 itojun #ifdef KGDB
1210 1.26 msaitoh if (ISSET(sc->sc_hwflags, SCIF_HW_KGDB)) {
1211 1.26 msaitoh kgdb_connect(1);
1212 1.26 msaitoh }
1213 1.22 uch #endif /* KGDB */
1214 1.1 itojun }
1215 1.37 uwe count = scif_fdr_read() & SCFDR2_RECVCNT;
1216 1.26 msaitoh if (count != 0) {
1217 1.36 uwe for (;;) {
1218 1.37 uwe u_char c = scif_frdr_read();
1219 1.37 uwe u_char err = (u_char)(scif_ssr_read() & 0x00ff);
1220 1.1 itojun
1221 1.37 uwe scif_ssr_write(scif_ssr_read()
1222 1.37 uwe & ~(SCSSR2_ER | SCSSR2_RDF | SCSSR2_DR));
1223 1.26 msaitoh #ifdef SH4
1224 1.26 msaitoh if (CPU_IS_SH4)
1225 1.37 uwe scif_lsr_write(scif_lsr_read()
1226 1.37 uwe & ~SCLSR2_ORER);
1227 1.26 msaitoh #endif
1228 1.26 msaitoh if ((cc > 0) && (count > 0)) {
1229 1.26 msaitoh put[0] = c;
1230 1.26 msaitoh put[1] = err;
1231 1.26 msaitoh put += 2;
1232 1.26 msaitoh if (put >= end)
1233 1.26 msaitoh put = sc->sc_rbuf;
1234 1.26 msaitoh cc--;
1235 1.26 msaitoh count--;
1236 1.26 msaitoh } else
1237 1.26 msaitoh break;
1238 1.26 msaitoh }
1239 1.26 msaitoh
1240 1.26 msaitoh /*
1241 1.26 msaitoh * Current string of incoming characters ended because
1242 1.26 msaitoh * no more data was available or we ran out of space.
1243 1.26 msaitoh * Schedule a receive event if any data was received.
1244 1.26 msaitoh * If we're out of space, turn off receive interrupts.
1245 1.26 msaitoh */
1246 1.26 msaitoh sc->sc_rbput = put;
1247 1.26 msaitoh sc->sc_rbavail = cc;
1248 1.26 msaitoh if (!ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED))
1249 1.26 msaitoh sc->sc_rx_ready = 1;
1250 1.1 itojun
1251 1.26 msaitoh /*
1252 1.26 msaitoh * See if we are in danger of overflowing a buffer. If
1253 1.26 msaitoh * so, use hardware flow control to ease the pressure.
1254 1.26 msaitoh */
1255 1.26 msaitoh if (!ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED) &&
1256 1.26 msaitoh cc < sc->sc_r_hiwat) {
1257 1.26 msaitoh SET(sc->sc_rx_flags, RX_IBUF_BLOCKED);
1258 1.1 itojun #if 0
1259 1.26 msaitoh scif_hwiflow(sc);
1260 1.1 itojun #endif
1261 1.26 msaitoh }
1262 1.1 itojun
1263 1.26 msaitoh /*
1264 1.26 msaitoh * If we're out of space, disable receive interrupts
1265 1.26 msaitoh * until the queue has drained a bit.
1266 1.26 msaitoh */
1267 1.26 msaitoh if (!cc) {
1268 1.26 msaitoh SET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED);
1269 1.37 uwe scif_scr_write(scif_scr_read() & ~SCSCR2_RIE);
1270 1.26 msaitoh }
1271 1.26 msaitoh } else {
1272 1.37 uwe if (scif_ssr_read() & (SCSSR2_RDF | SCSSR2_DR)) {
1273 1.37 uwe scif_scr_write(scif_scr_read()
1274 1.37 uwe & ~(SCSCR2_TIE | SCSCR2_RIE));
1275 1.26 msaitoh delay(10);
1276 1.37 uwe scif_scr_write(scif_scr_read()
1277 1.37 uwe | SCSCR2_TIE | SCSCR2_RIE);
1278 1.26 msaitoh continue;
1279 1.26 msaitoh }
1280 1.7 msaitoh }
1281 1.37 uwe } while (scif_ssr_read() & (SCSSR2_RDF | SCSSR2_DR));
1282 1.1 itojun
1283 1.1 itojun #if 0
1284 1.7 msaitoh msr = bus_space_read_1(iot, ioh, scif_msr);
1285 1.7 msaitoh delta = msr ^ sc->sc_msr;
1286 1.7 msaitoh sc->sc_msr = msr;
1287 1.7 msaitoh if (ISSET(delta, sc->sc_msr_mask)) {
1288 1.7 msaitoh SET(sc->sc_msr_delta, delta);
1289 1.1 itojun
1290 1.7 msaitoh /*
1291 1.7 msaitoh * Pulse-per-second clock signal on edge of DCD?
1292 1.7 msaitoh */
1293 1.7 msaitoh if (ISSET(delta, sc->sc_ppsmask)) {
1294 1.7 msaitoh struct timeval tv;
1295 1.7 msaitoh if (ISSET(msr, sc->sc_ppsmask) ==
1296 1.7 msaitoh sc->sc_ppsassert) {
1297 1.7 msaitoh /* XXX nanotime() */
1298 1.7 msaitoh microtime(&tv);
1299 1.7 msaitoh TIMEVAL_TO_TIMESPEC(&tv,
1300 1.7 msaitoh &sc->ppsinfo.assert_timestamp);
1301 1.7 msaitoh if (sc->ppsparam.mode & PPS_OFFSETASSERT) {
1302 1.7 msaitoh timespecadd(&sc->ppsinfo.assert_timestamp,
1303 1.1 itojun &sc->ppsparam.assert_offset,
1304 1.1 itojun &sc->ppsinfo.assert_timestamp);
1305 1.7 msaitoh TIMESPEC_TO_TIMEVAL(&tv, &sc->ppsinfo.assert_timestamp);
1306 1.7 msaitoh }
1307 1.1 itojun
1308 1.1 itojun #ifdef PPS_SYNC
1309 1.7 msaitoh if (sc->ppsparam.mode & PPS_HARDPPSONASSERT)
1310 1.7 msaitoh hardpps(&tv, tv.tv_usec);
1311 1.1 itojun #endif
1312 1.7 msaitoh sc->ppsinfo.assert_sequence++;
1313 1.7 msaitoh sc->ppsinfo.current_mode =
1314 1.7 msaitoh sc->ppsparam.mode;
1315 1.7 msaitoh
1316 1.7 msaitoh } else if (ISSET(msr, sc->sc_ppsmask) ==
1317 1.7 msaitoh sc->sc_ppsclear) {
1318 1.7 msaitoh /* XXX nanotime() */
1319 1.7 msaitoh microtime(&tv);
1320 1.7 msaitoh TIMEVAL_TO_TIMESPEC(&tv,
1321 1.7 msaitoh &sc->ppsinfo.clear_timestamp);
1322 1.7 msaitoh if (sc->ppsparam.mode & PPS_OFFSETCLEAR) {
1323 1.7 msaitoh timespecadd(&sc->ppsinfo.clear_timestamp,
1324 1.1 itojun &sc->ppsparam.clear_offset,
1325 1.1 itojun &sc->ppsinfo.clear_timestamp);
1326 1.7 msaitoh TIMESPEC_TO_TIMEVAL(&tv, &sc->ppsinfo.clear_timestamp);
1327 1.7 msaitoh }
1328 1.1 itojun
1329 1.1 itojun #ifdef PPS_SYNC
1330 1.7 msaitoh if (sc->ppsparam.mode & PPS_HARDPPSONCLEAR)
1331 1.7 msaitoh hardpps(&tv, tv.tv_usec);
1332 1.1 itojun #endif
1333 1.7 msaitoh sc->ppsinfo.clear_sequence++;
1334 1.7 msaitoh sc->ppsinfo.current_mode =
1335 1.7 msaitoh sc->ppsparam.mode;
1336 1.1 itojun }
1337 1.7 msaitoh }
1338 1.1 itojun
1339 1.7 msaitoh /*
1340 1.7 msaitoh * Stop output immediately if we lose the output
1341 1.7 msaitoh * flow control signal or carrier detect.
1342 1.7 msaitoh */
1343 1.7 msaitoh if (ISSET(~msr, sc->sc_msr_mask)) {
1344 1.7 msaitoh sc->sc_tbc = 0;
1345 1.7 msaitoh sc->sc_heldtbc = 0;
1346 1.69 andvar DPRINTF("%s: scifintr\n", device_xname(sc->sc_dev));
1347 1.7 msaitoh }
1348 1.1 itojun
1349 1.7 msaitoh sc->sc_st_check = 1;
1350 1.7 msaitoh }
1351 1.1 itojun #endif
1352 1.1 itojun
1353 1.1 itojun /*
1354 1.1 itojun * Done handling any receive interrupts. See if data can be
1355 1.1 itojun * transmitted as well. Schedule tx done event if no data left
1356 1.1 itojun * and tty was marked busy.
1357 1.1 itojun */
1358 1.37 uwe if (((scif_fdr_read() & SCFDR2_TXCNT) >> 8) != 16) { /* XXX (msaitoh) */
1359 1.1 itojun /*
1360 1.1 itojun * If we've delayed a parameter change, do it now, and restart
1361 1.1 itojun * output.
1362 1.1 itojun */
1363 1.1 itojun if (sc->sc_heldchange) {
1364 1.1 itojun sc->sc_heldchange = 0;
1365 1.1 itojun sc->sc_tbc = sc->sc_heldtbc;
1366 1.1 itojun sc->sc_heldtbc = 0;
1367 1.1 itojun }
1368 1.1 itojun
1369 1.1 itojun /* Output the next chunk of the contiguous buffer, if any. */
1370 1.1 itojun if (sc->sc_tbc > 0) {
1371 1.1 itojun int n;
1372 1.39 uwe int maxchars;
1373 1.1 itojun int i;
1374 1.1 itojun
1375 1.1 itojun n = sc->sc_tbc;
1376 1.39 uwe maxchars = sc->sc_fifolen -
1377 1.37 uwe ((scif_fdr_read() & SCFDR2_TXCNT) >> 8);
1378 1.39 uwe if (n > maxchars)
1379 1.39 uwe n = maxchars;
1380 1.1 itojun
1381 1.1 itojun for (i = 0; i < n; i++) {
1382 1.14 msaitoh scif_putc(*(sc->sc_tba));
1383 1.1 itojun sc->sc_tba++;
1384 1.1 itojun }
1385 1.1 itojun sc->sc_tbc -= n;
1386 1.1 itojun } else {
1387 1.1 itojun /* Disable transmit completion interrupts if necessary. */
1388 1.1 itojun #if 0
1389 1.1 itojun if (ISSET(sc->sc_ier, IER_ETXRDY))
1390 1.1 itojun #endif
1391 1.37 uwe scif_scr_write(scif_scr_read() & ~SCSCR2_TIE);
1392 1.1 itojun
1393 1.1 itojun if (sc->sc_tx_busy) {
1394 1.1 itojun sc->sc_tx_busy = 0;
1395 1.1 itojun sc->sc_tx_done = 1;
1396 1.1 itojun }
1397 1.1 itojun }
1398 1.1 itojun }
1399 1.1 itojun
1400 1.1 itojun /* Wake up the poller. */
1401 1.55 ad softint_schedule(sc->sc_si);
1402 1.1 itojun
1403 1.61 tls #ifdef RND_SCIF
1404 1.36 uwe rnd_add_uint32(&sc->rnd_source, iir | lsr);
1405 1.1 itojun #endif
1406 1.1 itojun
1407 1.1 itojun return (1);
1408 1.1 itojun }
1409 1.1 itojun
1410 1.1 itojun void
1411 1.20 uch scifcnprobe(struct consdev *cp)
1412 1.1 itojun {
1413 1.1 itojun int maj;
1414 1.1 itojun
1415 1.1 itojun /* locate the major number */
1416 1.28 gehenna maj = cdevsw_lookup_major(&scif_cdevsw);
1417 1.1 itojun
1418 1.1 itojun /* Initialize required fields. */
1419 1.1 itojun cp->cn_dev = makedev(maj, 0);
1420 1.66 tsutsui if (scifconsole)
1421 1.66 tsutsui cp->cn_pri = CN_REMOTE;
1422 1.66 tsutsui else
1423 1.66 tsutsui cp->cn_pri = CN_NORMAL;
1424 1.1 itojun }
1425 1.1 itojun
1426 1.1 itojun void
1427 1.20 uch scifcninit(struct consdev *cp)
1428 1.1 itojun {
1429 1.1 itojun
1430 1.7 msaitoh InitializeScif(scifcn_speed);
1431 1.9 msaitoh scifisconsole = 1;
1432 1.1 itojun }
1433 1.1 itojun
1434 1.1 itojun int
1435 1.20 uch scifcngetc(dev_t dev)
1436 1.1 itojun {
1437 1.1 itojun int c;
1438 1.1 itojun int s;
1439 1.1 itojun
1440 1.1 itojun s = splserial();
1441 1.1 itojun c = scif_getc();
1442 1.1 itojun splx(s);
1443 1.1 itojun
1444 1.1 itojun return (c);
1445 1.1 itojun }
1446 1.1 itojun
1447 1.1 itojun void
1448 1.20 uch scifcnputc(dev_t dev, int c)
1449 1.1 itojun {
1450 1.1 itojun int s;
1451 1.1 itojun
1452 1.1 itojun s = splserial();
1453 1.14 msaitoh scif_putc((u_char)c);
1454 1.1 itojun splx(s);
1455 1.1 itojun }
1456 1.22 uch
1457 1.22 uch #ifdef KGDB
1458 1.22 uch int
1459 1.58 cegger scif_kgdb_init(void)
1460 1.22 uch {
1461 1.22 uch
1462 1.22 uch if (strcmp(kgdb_devname, "scif") != 0)
1463 1.22 uch return (1);
1464 1.22 uch
1465 1.22 uch if (scifisconsole)
1466 1.22 uch return (1); /* can't share with console */
1467 1.22 uch
1468 1.22 uch InitializeScif(kgdb_rate);
1469 1.22 uch
1470 1.22 uch kgdb_attach((int (*)(void *))scifcngetc,
1471 1.22 uch (void (*)(void *, int))scifcnputc, NULL);
1472 1.22 uch kgdb_dev = 123; /* unneeded, only to satisfy some tests */
1473 1.22 uch kgdb_attached = 1;
1474 1.25 uch
1475 1.22 uch return (0);
1476 1.22 uch }
1477 1.22 uch #endif /* KGDB */
1478